Commit 9ca8b8f8 authored by Alex Bee's avatar Alex Bee Committed by Heiko Stuebner

ARM: dts: rockchip: Add GPU node for RK3128

RK3128 SoCs have Mali400 MP2 GPU.
Add the respective device tree node and the correspondending opp-table.

The frequencies and voltages of the opp-table have been taken from
downstream kernel.
Signed-off-by: default avatarAlex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231204153547.97877-3-knaerzche@gmail.comSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent edc4802d
......@@ -101,6 +101,27 @@ opp-1200000000 {
};
};
gpu_opp_table: opp-table-1 {
compatible = "operating-points-v2";
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <975000 975000 1250000>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1050000 1050000 1250000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1150000 1150000 1250000>;
};
opp-480000000 {
opp-hz = /bits/ 64 <480000000>;
opp-microvolt = <1250000 1250000 1250000>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
......@@ -131,6 +152,29 @@ smp-sram@0 {
};
};
gpu: gpu@10090000 {
compatible = "rockchip,rk3128-mali", "arm,mali-400";
reg = <0x10090000 0x10000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1";
clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
clock-names = "bus", "core";
operating-points-v2 = <&gpu_opp_table>;
resets = <&cru SRST_GPU>;
power-domains = <&power RK3128_PD_GPU>;
status = "disabled";
};
pmu: syscon@100a0000 {
compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
reg = <0x100a0000 0x1000>;
......
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