Commit a3813329 authored by Linus Torvalds's avatar Linus Torvalds
parents 97d26b80 70aa488c
...@@ -825,14 +825,16 @@ apply_relocate_add (Elf64_Shdr *sechdrs, const char *strtab, unsigned int symind ...@@ -825,14 +825,16 @@ apply_relocate_add (Elf64_Shdr *sechdrs, const char *strtab, unsigned int symind
* XXX Should have an arch-hook for running this after final section * XXX Should have an arch-hook for running this after final section
* addresses have been selected... * addresses have been selected...
*/ */
/* See if gp can cover the entire core module: */ uint64_t gp;
uint64_t gp = (uint64_t) mod->module_core + MAX_LTOFF / 2; if (mod->core_size > MAX_LTOFF)
if (mod->core_size >= MAX_LTOFF)
/* /*
* This takes advantage of fact that SHF_ARCH_SMALL gets allocated * This takes advantage of fact that SHF_ARCH_SMALL gets allocated
* at the end of the module. * at the end of the module.
*/ */
gp = (uint64_t) mod->module_core + mod->core_size - MAX_LTOFF / 2; gp = mod->core_size - MAX_LTOFF / 2;
else
gp = mod->core_size / 2;
gp = (uint64_t) mod->module_core + ((gp + 7) & -8);
mod->arch.gp = gp; mod->arch.gp = gp;
DEBUGP("%s: placing gp at 0x%lx\n", __FUNCTION__, gp); DEBUGP("%s: placing gp at 0x%lx\n", __FUNCTION__, gp);
} }
......
...@@ -720,7 +720,8 @@ cpu_init (void) ...@@ -720,7 +720,8 @@ cpu_init (void)
ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page))); ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
/* /*
* Initialize default control register to defer all speculative faults. The * Initialize default control register to defer speculative faults except
* for those arising from TLB misses, which are not deferred. The
* kernel MUST NOT depend on a particular setting of these bits (in other words, * kernel MUST NOT depend on a particular setting of these bits (in other words,
* the kernel must have recovery code for all speculative accesses). Turn on * the kernel must have recovery code for all speculative accesses). Turn on
* dcr.lc as per recommendation by the architecture team. Most IA-32 apps * dcr.lc as per recommendation by the architecture team. Most IA-32 apps
......
...@@ -111,6 +111,24 @@ ia64_bad_break (unsigned long break_num, struct pt_regs *regs) ...@@ -111,6 +111,24 @@ ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
siginfo_t siginfo; siginfo_t siginfo;
int sig, code; int sig, code;
/* break.b always sets cr.iim to 0, which causes problems for
* debuggers. Get the real break number from the original instruction,
* but only for kernel code. User space break.b is left alone, to
* preserve the existing behaviour. All break codings have the same
* format, so there is no need to check the slot type.
*/
if (break_num == 0 && !user_mode(regs)) {
struct ia64_psr *ipsr = ia64_psr(regs);
unsigned long *bundle = (unsigned long *)regs->cr_iip;
unsigned long slot;
switch (ipsr->ri) {
case 0: slot = (bundle[0] >> 5); break;
case 1: slot = (bundle[0] >> 46) | (bundle[1] << 18); break;
default: slot = (bundle[1] >> 23); break;
}
break_num = ((slot >> 36 & 1) << 20) | (slot >> 6 & 0xfffff);
}
/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */ /* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri); siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
siginfo.si_imm = break_num; siginfo.si_imm = break_num;
......
...@@ -305,8 +305,9 @@ setup_gate (void) ...@@ -305,8 +305,9 @@ setup_gate (void)
struct page *page; struct page *page;
/* /*
* Map the gate page twice: once read-only to export the ELF headers etc. and once * Map the gate page twice: once read-only to export the ELF
* execute-only page to enable privilege-promotion via "epc": * headers etc. and once execute-only page to enable
* privilege-promotion via "epc":
*/ */
page = virt_to_page(ia64_imva(__start_gate_section)); page = virt_to_page(ia64_imva(__start_gate_section));
put_kernel_page(page, GATE_ADDR, PAGE_READONLY); put_kernel_page(page, GATE_ADDR, PAGE_READONLY);
...@@ -315,6 +316,20 @@ setup_gate (void) ...@@ -315,6 +316,20 @@ setup_gate (void)
put_kernel_page(page, GATE_ADDR + PAGE_SIZE, PAGE_GATE); put_kernel_page(page, GATE_ADDR + PAGE_SIZE, PAGE_GATE);
#else #else
put_kernel_page(page, GATE_ADDR + PERCPU_PAGE_SIZE, PAGE_GATE); put_kernel_page(page, GATE_ADDR + PERCPU_PAGE_SIZE, PAGE_GATE);
/* Fill in the holes (if any) with read-only zero pages: */
{
unsigned long addr;
for (addr = GATE_ADDR + PAGE_SIZE;
addr < GATE_ADDR + PERCPU_PAGE_SIZE;
addr += PAGE_SIZE)
{
put_kernel_page(ZERO_PAGE(0), addr,
PAGE_READONLY);
put_kernel_page(ZERO_PAGE(0), addr + PERCPU_PAGE_SIZE,
PAGE_READONLY);
}
}
#endif #endif
ia64_patch_gate(); ia64_patch_gate();
} }
......
...@@ -222,7 +222,7 @@ void __init early_sn_setup(void) ...@@ -222,7 +222,7 @@ void __init early_sn_setup(void)
extern int platform_intr_list[]; extern int platform_intr_list[];
extern nasid_t master_nasid; extern nasid_t master_nasid;
static int shub_1_1_found __initdata; static int __initdata shub_1_1_found = 0;
/* /*
* sn_check_for_wars * sn_check_for_wars
...@@ -251,7 +251,7 @@ static void __init sn_check_for_wars(void) ...@@ -251,7 +251,7 @@ static void __init sn_check_for_wars(void)
} else { } else {
for_each_online_node(cnode) { for_each_online_node(cnode) {
if (is_shub_1_1(cnodeid_to_nasid(cnode))) if (is_shub_1_1(cnodeid_to_nasid(cnode)))
sn_hub_info->shub_1_1_found = 1; shub_1_1_found = 1;
} }
} }
} }
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* This hopefully works with any (fixed) IA-64 page-size, as defined * This hopefully works with any (fixed) IA-64 page-size, as defined
* in <asm/page.h>. * in <asm/page.h>.
* *
* Copyright (C) 1998-2004 Hewlett-Packard Co * Copyright (C) 1998-2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com> * David Mosberger-Tang <davidm@hpl.hp.com>
*/ */
...@@ -551,7 +551,11 @@ do { \ ...@@ -551,7 +551,11 @@ do { \
/* These tell get_user_pages() that the first gate page is accessible from user-level. */ /* These tell get_user_pages() that the first gate page is accessible from user-level. */
#define FIXADDR_USER_START GATE_ADDR #define FIXADDR_USER_START GATE_ADDR
#define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE) #ifdef HAVE_BUGGY_SEGREL
# define FIXADDR_USER_END (GATE_ADDR + 2*PAGE_SIZE)
#else
# define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
#endif
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
......
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