Commit a4da45dd authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Linus Walleij

pinctrl: Remove hole in pinctrl_gpio_range

On 64-bit platforms, pointer size and alignment are 64-bit, hence two
4-byte holes are present before the pins and gc members of the
pinctrl_gpio_range structure.  Get rid of these holes by moving the
pins pointer.

This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201028145117.1731876-1-geert+renesas@glider.beSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent b507cb92
...@@ -51,8 +51,8 @@ struct pinctrl_pin_desc { ...@@ -51,8 +51,8 @@ struct pinctrl_pin_desc {
* @id: an ID number for the chip in this range * @id: an ID number for the chip in this range
* @base: base offset of the GPIO range * @base: base offset of the GPIO range
* @pin_base: base pin number of the GPIO range if pins == NULL * @pin_base: base pin number of the GPIO range if pins == NULL
* @pins: enumeration of pins in GPIO range or NULL
* @npins: number of pins in the GPIO range, including the base number * @npins: number of pins in the GPIO range, including the base number
* @pins: enumeration of pins in GPIO range or NULL
* @gc: an optional pointer to a gpio_chip * @gc: an optional pointer to a gpio_chip
*/ */
struct pinctrl_gpio_range { struct pinctrl_gpio_range {
...@@ -61,8 +61,8 @@ struct pinctrl_gpio_range { ...@@ -61,8 +61,8 @@ struct pinctrl_gpio_range {
unsigned int id; unsigned int id;
unsigned int base; unsigned int base;
unsigned int pin_base; unsigned int pin_base;
unsigned const *pins;
unsigned int npins; unsigned int npins;
unsigned const *pins;
struct gpio_chip *gc; struct gpio_chip *gc;
}; };
......
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