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Commit a6eeafba authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'tegra-for-6.2-firmware-v2' of... 

Merge tag 'tegra-for-6.2-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

firmware: tegra: Changes for v6.2-rc1

This adds new BPMP ABI so that newer features can be enabled.
Furthermore, the BPMP driver is updated to use iosys-map helpers to
allow working with shared memory regions that are located in system
memory.

Apart from that, several minor cleanups are included.

* tag 'tegra-for-6.2-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: Remove surplus dev_err() when using platform_get_irq_byname()
  firmware: tegra: Update BPMP ABI
  firmware: tegra: bpmp: Do not support big-endian
  firmware: tegra: bpmp: Use iosys-map helpers
  firmware: tegra: bpmp: Prefer u32 over uint32_t

Link: https://lore.kernel.org/r/20221121171239.2041835-2-thierry.reding@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2a26daee 198d4649
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Showing with 1548 additions and 593 deletions
drivers/firmware/tegra/bpmp-debugfs.c
View file @ a6eeafba
...@@ -48,13 +48,9 @@ static int seqbuf_read(struct seqbuf *seqbuf, void *buf, size_t nbyte) ...@@ -48,13 +48,9 @@ static int seqbuf_read(struct seqbuf *seqbuf, void *buf, size_t nbyte)
return seqbuf_status(seqbuf); return seqbuf_status(seqbuf);
} }
static int seqbuf_read_u32(struct seqbuf *seqbuf, uint32_t *v) static int seqbuf_read_u32(struct seqbuf *seqbuf, u32 *v)
{ {
int err; return seqbuf_read(seqbuf, v, 4);
err = seqbuf_read(seqbuf, v, 4);
*v = le32_to_cpu(*v);
return err;
} }
static int seqbuf_read_str(struct seqbuf *seqbuf, const char **str) static int seqbuf_read_str(struct seqbuf *seqbuf, const char **str)
...@@ -109,10 +105,10 @@ static const char *get_filename(struct tegra_bpmp *bpmp, ...@@ -109,10 +105,10 @@ static const char *get_filename(struct tegra_bpmp *bpmp,
} }
static int mrq_debug_open(struct tegra_bpmp *bpmp, const char *name, static int mrq_debug_open(struct tegra_bpmp *bpmp, const char *name,
uint32_t *fd, uint32_t *len, bool write) u32 *fd, u32 *len, bool write)
{ {
struct mrq_debug_request req = { struct mrq_debug_request req = {
.cmd = cpu_to_le32(write ? CMD_DEBUG_OPEN_WO : CMD_DEBUG_OPEN_RO), .cmd = write ? CMD_DEBUG_OPEN_WO : CMD_DEBUG_OPEN_RO,
}; };
struct mrq_debug_response resp; struct mrq_debug_response resp;
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
...@@ -147,10 +143,10 @@ static int mrq_debug_open(struct tegra_bpmp *bpmp, const char *name, ...@@ -147,10 +143,10 @@ static int mrq_debug_open(struct tegra_bpmp *bpmp, const char *name,
return 0; return 0;
} }
static int mrq_debug_close(struct tegra_bpmp *bpmp, uint32_t fd) static int mrq_debug_close(struct tegra_bpmp *bpmp, u32 fd)
{ {
struct mrq_debug_request req = { struct mrq_debug_request req = {
.cmd = cpu_to_le32(CMD_DEBUG_CLOSE), .cmd = CMD_DEBUG_CLOSE,
.frd = { .frd = {
.fd = fd, .fd = fd,
}, },
...@@ -179,10 +175,10 @@ static int mrq_debug_close(struct tegra_bpmp *bpmp, uint32_t fd) ...@@ -179,10 +175,10 @@ static int mrq_debug_close(struct tegra_bpmp *bpmp, uint32_t fd)
} }
static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name, static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name,
char *data, size_t sz_data, uint32_t *nbytes) char *data, size_t sz_data, u32 *nbytes)
{ {
struct mrq_debug_request req = { struct mrq_debug_request req = {
.cmd = cpu_to_le32(CMD_DEBUG_READ), .cmd = CMD_DEBUG_READ,
}; };
struct mrq_debug_response resp; struct mrq_debug_response resp;
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
...@@ -196,7 +192,7 @@ static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name, ...@@ -196,7 +192,7 @@ static int mrq_debug_read(struct tegra_bpmp *bpmp, const char *name,
.size = sizeof(resp), .size = sizeof(resp),
}, },
}; };
uint32_t fd = 0, len = 0; u32 fd = 0, len = 0;
int remaining, err; int remaining, err;
mutex_lock(&bpmp_debug_lock); mutex_lock(&bpmp_debug_lock);
...@@ -245,7 +241,7 @@ static int mrq_debug_write(struct tegra_bpmp *bpmp, const char *name, ...@@ -245,7 +241,7 @@ static int mrq_debug_write(struct tegra_bpmp *bpmp, const char *name,
uint8_t *data, size_t sz_data) uint8_t *data, size_t sz_data)
{ {
struct mrq_debug_request req = { struct mrq_debug_request req = {
.cmd = cpu_to_le32(CMD_DEBUG_WRITE) .cmd = CMD_DEBUG_WRITE
}; };
struct mrq_debug_response resp; struct mrq_debug_response resp;
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
...@@ -259,7 +255,7 @@ static int mrq_debug_write(struct tegra_bpmp *bpmp, const char *name, ...@@ -259,7 +255,7 @@ static int mrq_debug_write(struct tegra_bpmp *bpmp, const char *name,
.size = sizeof(resp), .size = sizeof(resp),
}, },
}; };
uint32_t fd = 0, len = 0; u32 fd = 0, len = 0;
size_t remaining; size_t remaining;
int err; int err;
...@@ -308,7 +304,7 @@ static int bpmp_debug_show(struct seq_file *m, void *p) ...@@ -308,7 +304,7 @@ static int bpmp_debug_show(struct seq_file *m, void *p)
char fnamebuf[256]; char fnamebuf[256];
const char *filename; const char *filename;
struct mrq_debug_request req = { struct mrq_debug_request req = {
.cmd = cpu_to_le32(CMD_DEBUG_READ), .cmd = CMD_DEBUG_READ,
}; };
struct mrq_debug_response resp; struct mrq_debug_response resp;
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
...@@ -322,7 +318,7 @@ static int bpmp_debug_show(struct seq_file *m, void *p) ...@@ -322,7 +318,7 @@ static int bpmp_debug_show(struct seq_file *m, void *p)
.size = sizeof(resp), .size = sizeof(resp),
}, },
}; };
uint32_t fd = 0, len = 0; u32 fd = 0, len = 0;
int remaining, err; int remaining, err;
filename = get_filename(bpmp, file, fnamebuf, sizeof(fnamebuf)); filename = get_filename(bpmp, file, fnamebuf, sizeof(fnamebuf));
...@@ -406,8 +402,8 @@ static int bpmp_populate_debugfs_inband(struct tegra_bpmp *bpmp, ...@@ -406,8 +402,8 @@ static int bpmp_populate_debugfs_inband(struct tegra_bpmp *bpmp,
{ {
const size_t pathlen = SZ_256; const size_t pathlen = SZ_256;
const size_t bufsize = SZ_16K; const size_t bufsize = SZ_16K;
uint32_t dsize, attrs = 0;
struct dentry *dentry; struct dentry *dentry;
u32 dsize, attrs = 0;
struct seqbuf seqbuf; struct seqbuf seqbuf;
char *buf, *pathbuf; char *buf, *pathbuf;
const char *name; const char *name;
...@@ -487,12 +483,12 @@ static int mrq_debugfs_read(struct tegra_bpmp *bpmp, ...@@ -487,12 +483,12 @@ static int mrq_debugfs_read(struct tegra_bpmp *bpmp,
size_t *nbytes) size_t *nbytes)
{ {
struct mrq_debugfs_request req = { struct mrq_debugfs_request req = {
.cmd = cpu_to_le32(CMD_DEBUGFS_READ), .cmd = CMD_DEBUGFS_READ,
.fop = { .fop = {
.fnameaddr = cpu_to_le32((uint32_t)name), .fnameaddr = (u32)name,
.fnamelen = cpu_to_le32((uint32_t)sz_name), .fnamelen = (u32)sz_name,
.dataaddr = cpu_to_le32((uint32_t)data), .dataaddr = (u32)data,
.datalen = cpu_to_le32((uint32_t)sz_data), .datalen = (u32)sz_data,
}, },
}; };
struct mrq_debugfs_response resp; struct mrq_debugfs_response resp;
...@@ -525,12 +521,12 @@ static int mrq_debugfs_write(struct tegra_bpmp *bpmp, ...@@ -525,12 +521,12 @@ static int mrq_debugfs_write(struct tegra_bpmp *bpmp,
dma_addr_t data, size_t sz_data) dma_addr_t data, size_t sz_data)
{ {
const struct mrq_debugfs_request req = { const struct mrq_debugfs_request req = {
.cmd = cpu_to_le32(CMD_DEBUGFS_WRITE), .cmd = CMD_DEBUGFS_WRITE,
.fop = { .fop = {
.fnameaddr = cpu_to_le32((uint32_t)name), .fnameaddr = (u32)name,
.fnamelen = cpu_to_le32((uint32_t)sz_name), .fnamelen = (u32)sz_name,
.dataaddr = cpu_to_le32((uint32_t)data), .dataaddr = (u32)data,
.datalen = cpu_to_le32((uint32_t)sz_data), .datalen = (u32)sz_data,
}, },
}; };
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
...@@ -548,10 +544,10 @@ static int mrq_debugfs_dumpdir(struct tegra_bpmp *bpmp, dma_addr_t addr, ...@@ -548,10 +544,10 @@ static int mrq_debugfs_dumpdir(struct tegra_bpmp *bpmp, dma_addr_t addr,
size_t size, size_t *nbytes) size_t size, size_t *nbytes)
{ {
const struct mrq_debugfs_request req = { const struct mrq_debugfs_request req = {
.cmd = cpu_to_le32(CMD_DEBUGFS_DUMPDIR), .cmd = CMD_DEBUGFS_DUMPDIR,
.dumpdir = { .dumpdir = {
.dataaddr = cpu_to_le32((uint32_t)addr), .dataaddr = (u32)addr,
.datalen = cpu_to_le32((uint32_t)size), .datalen = (u32)size,
}, },
}; };
struct mrq_debugfs_response resp; struct mrq_debugfs_response resp;
...@@ -688,10 +684,10 @@ static const struct file_operations debugfs_fops = { ...@@ -688,10 +684,10 @@ static const struct file_operations debugfs_fops = {
}; };
static int bpmp_populate_dir(struct tegra_bpmp *bpmp, struct seqbuf *seqbuf, static int bpmp_populate_dir(struct tegra_bpmp *bpmp, struct seqbuf *seqbuf,
struct dentry *parent, uint32_t depth) struct dentry *parent, u32 depth)
{ {
int err; int err;
uint32_t d, t; u32 d, t;
const char *name; const char *name;
struct dentry *dentry; struct dentry *dentry;
......
drivers/firmware/tegra/bpmp-tegra186.c
View file @ a6eeafba
...@@ -18,8 +18,8 @@ struct tegra186_bpmp { ...@@ -18,8 +18,8 @@ struct tegra186_bpmp {
struct { struct {
struct gen_pool *pool; struct gen_pool *pool;
void __iomem *virt;
dma_addr_t phys; dma_addr_t phys;
void *virt;
} tx, rx; } tx, rx;
struct { struct {
...@@ -40,31 +40,27 @@ mbox_client_to_bpmp(struct mbox_client *client) ...@@ -40,31 +40,27 @@ mbox_client_to_bpmp(struct mbox_client *client)
static bool tegra186_bpmp_is_message_ready(struct tegra_bpmp_channel *channel) static bool tegra186_bpmp_is_message_ready(struct tegra_bpmp_channel *channel)
{ {
void *frame; int err;
frame = tegra_ivc_read_get_next_frame(channel->ivc); err = tegra_ivc_read_get_next_frame(channel->ivc, &channel->ib);
if (IS_ERR(frame)) { if (err) {
channel->ib = NULL; iosys_map_clear(&channel->ib);
return false; return false;
} }
channel->ib = frame;
return true; return true;
} }
static bool tegra186_bpmp_is_channel_free(struct tegra_bpmp_channel *channel) static bool tegra186_bpmp_is_channel_free(struct tegra_bpmp_channel *channel)
{ {
void *frame; int err;
frame = tegra_ivc_write_get_next_frame(channel->ivc); err = tegra_ivc_write_get_next_frame(channel->ivc, &channel->ob);
if (IS_ERR(frame)) { if (err) {
channel->ob = NULL; iosys_map_clear(&channel->ob);
return false; return false;
} }
channel->ob = frame;
return true; return true;
} }
...@@ -109,6 +105,7 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel, ...@@ -109,6 +105,7 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel,
{ {
struct tegra186_bpmp *priv = bpmp->priv; struct tegra186_bpmp *priv = bpmp->priv;
size_t message_size, queue_size; size_t message_size, queue_size;
struct iosys_map rx, tx;
unsigned int offset; unsigned int offset;
int err; int err;
...@@ -121,10 +118,11 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel, ...@@ -121,10 +118,11 @@ static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel,
queue_size = tegra_ivc_total_queue_size(message_size); queue_size = tegra_ivc_total_queue_size(message_size);
offset = queue_size * index; offset = queue_size * index;
err = tegra_ivc_init(channel->ivc, NULL, iosys_map_set_vaddr_iomem(&rx, priv->rx.virt + offset);
priv->rx.virt + offset, priv->rx.phys + offset, iosys_map_set_vaddr_iomem(&tx, priv->tx.virt + offset);
priv->tx.virt + offset, priv->tx.phys + offset,
1, message_size, tegra186_bpmp_ivc_notify, err = tegra_ivc_init(channel->ivc, NULL, &rx, priv->rx.phys + offset, &tx,
priv->tx.phys + offset, 1, message_size, tegra186_bpmp_ivc_notify,
bpmp); bpmp);
if (err < 0) { if (err < 0) {
dev_err(bpmp->dev, "failed to setup IVC for channel %u: %d\n", dev_err(bpmp->dev, "failed to setup IVC for channel %u: %d\n",
...@@ -179,7 +177,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp) ...@@ -179,7 +177,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
return -EPROBE_DEFER; return -EPROBE_DEFER;
} }
priv->tx.virt = gen_pool_dma_alloc(priv->tx.pool, 4096, &priv->tx.phys); priv->tx.virt = (void __iomem *)gen_pool_dma_alloc(priv->tx.pool, 4096, &priv->tx.phys);
if (!priv->tx.virt) { if (!priv->tx.virt) {
dev_err(bpmp->dev, "failed to allocate from TX pool\n"); dev_err(bpmp->dev, "failed to allocate from TX pool\n");
return -ENOMEM; return -ENOMEM;
...@@ -192,7 +190,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp) ...@@ -192,7 +190,7 @@ static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)
goto free_tx; goto free_tx;
} }
priv->rx.virt = gen_pool_dma_alloc(priv->rx.pool, 4096, &priv->rx.phys); priv->rx.virt = (void __iomem *)gen_pool_dma_alloc(priv->rx.pool, 4096, &priv->rx.phys);
if (!priv->rx.virt) { if (!priv->rx.virt) {
dev_err(bpmp->dev, "failed to allocate from RX pool\n"); dev_err(bpmp->dev, "failed to allocate from RX pool\n");
err = -ENOMEM; err = -ENOMEM;
......
drivers/firmware/tegra/bpmp-tegra210.c
View file @ a6eeafba
...@@ -137,8 +137,8 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel, ...@@ -137,8 +137,8 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
unsigned int index) unsigned int index)
{ {
struct tegra210_bpmp *priv = bpmp->priv; struct tegra210_bpmp *priv = bpmp->priv;
void __iomem *p;
u32 address; u32 address;
void *p;
/* Retrieve channel base address from BPMP */ /* Retrieve channel base address from BPMP */
writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET, writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
...@@ -149,8 +149,9 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel, ...@@ -149,8 +149,9 @@ static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
if (!p) if (!p)
return -ENOMEM; return -ENOMEM;
channel->ib = p; iosys_map_set_vaddr_iomem(&channel->ib, p);
channel->ob = p; iosys_map_set_vaddr_iomem(&channel->ob, p);
channel->index = index; channel->index = index;
init_completion(&channel->completion); init_completion(&channel->completion);
channel->bpmp = bpmp; channel->bpmp = bpmp;
...@@ -199,10 +200,8 @@ static int tegra210_bpmp_init(struct tegra_bpmp *bpmp) ...@@ -199,10 +200,8 @@ static int tegra210_bpmp_init(struct tegra_bpmp *bpmp)
} }
err = platform_get_irq_byname(pdev, "tx"); err = platform_get_irq_byname(pdev, "tx");
if (err < 0) { if (err < 0)
dev_err(&pdev->dev, "failed to get TX IRQ: %d\n", err);
return err; return err;
}
priv->tx_irq_data = irq_get_irq_data(err); priv->tx_irq_data = irq_get_irq_data(err);
if (!priv->tx_irq_data) { if (!priv->tx_irq_data) {
...@@ -211,10 +210,8 @@ static int tegra210_bpmp_init(struct tegra_bpmp *bpmp) ...@@ -211,10 +210,8 @@ static int tegra210_bpmp_init(struct tegra_bpmp *bpmp)
} }
err = platform_get_irq_byname(pdev, "rx"); err = platform_get_irq_byname(pdev, "rx");
if (err < 0) { if (err < 0)
dev_err(&pdev->dev, "failed to get rx IRQ: %d\n", err);
return err; return err;
}
err = devm_request_irq(&pdev->dev, err, rx_irq, err = devm_request_irq(&pdev->dev, err, rx_irq,
IRQF_NO_SUSPEND, dev_name(&pdev->dev), bpmp); IRQF_NO_SUSPEND, dev_name(&pdev->dev), bpmp);
......
drivers/firmware/tegra/bpmp.c
View file @ a6eeafba
...@@ -201,13 +201,13 @@ static ssize_t __tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel, ...@@ -201,13 +201,13 @@ static ssize_t __tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel,
int err; int err;
if (data && size > 0) if (data && size > 0)
memcpy_fromio(data, channel->ib->data, size); tegra_bpmp_mb_read(data, &channel->ib, size);
err = tegra_bpmp_ack_response(channel); err = tegra_bpmp_ack_response(channel);
if (err < 0) if (err < 0)
return err; return err;
*ret = channel->ib->code; *ret = tegra_bpmp_mb_read_field(&channel->ib, code);
return 0; return 0;
} }
...@@ -241,11 +241,11 @@ static ssize_t __tegra_bpmp_channel_write(struct tegra_bpmp_channel *channel, ...@@ -241,11 +241,11 @@ static ssize_t __tegra_bpmp_channel_write(struct tegra_bpmp_channel *channel,
unsigned int mrq, unsigned long flags, unsigned int mrq, unsigned long flags,
const void *data, size_t size) const void *data, size_t size)
{ {
channel->ob->code = mrq; tegra_bpmp_mb_write_field(&channel->ob, code, mrq);
channel->ob->flags = flags; tegra_bpmp_mb_write_field(&channel->ob, flags, flags);
if (data && size > 0) if (data && size > 0)
memcpy_toio(channel->ob->data, data, size); tegra_bpmp_mb_write(&channel->ob, data, size);
return tegra_bpmp_post_request(channel); return tegra_bpmp_post_request(channel);
} }
...@@ -400,7 +400,7 @@ static struct tegra_bpmp_mrq *tegra_bpmp_find_mrq(struct tegra_bpmp *bpmp, ...@@ -400,7 +400,7 @@ static struct tegra_bpmp_mrq *tegra_bpmp_find_mrq(struct tegra_bpmp *bpmp,
void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code, void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
const void *data, size_t size) const void *data, size_t size)
{ {
unsigned long flags = channel->ib->flags; unsigned long flags = tegra_bpmp_mb_read_field(&channel->ib, flags);
struct tegra_bpmp *bpmp = channel->bpmp; struct tegra_bpmp *bpmp = channel->bpmp;
int err; int err;
...@@ -417,10 +417,10 @@ void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code, ...@@ -417,10 +417,10 @@ void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
if (WARN_ON(!tegra_bpmp_is_response_channel_free(channel))) if (WARN_ON(!tegra_bpmp_is_response_channel_free(channel)))
return; return;
channel->ob->code = code; tegra_bpmp_mb_write_field(&channel->ob, code, code);
if (data && size > 0) if (data && size > 0)
memcpy_toio(channel->ob->data, data, size); tegra_bpmp_mb_write(&channel->ob, data, size);
err = tegra_bpmp_post_response(channel); err = tegra_bpmp_post_response(channel);
if (WARN_ON(err < 0)) if (WARN_ON(err < 0))
...@@ -502,7 +502,7 @@ EXPORT_SYMBOL_GPL(tegra_bpmp_free_mrq); ...@@ -502,7 +502,7 @@ EXPORT_SYMBOL_GPL(tegra_bpmp_free_mrq);
bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq) bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq)
{ {
struct mrq_query_abi_request req = { .mrq = cpu_to_le32(mrq) }; struct mrq_query_abi_request req = { .mrq = mrq };
struct mrq_query_abi_response resp; struct mrq_query_abi_response resp;
struct tegra_bpmp_message msg = { struct tegra_bpmp_message msg = {
.mrq = MRQ_QUERY_ABI, .mrq = MRQ_QUERY_ABI,
...@@ -529,13 +529,13 @@ static void tegra_bpmp_mrq_handle_ping(unsigned int mrq, ...@@ -529,13 +529,13 @@ static void tegra_bpmp_mrq_handle_ping(unsigned int mrq,
struct tegra_bpmp_channel *channel, struct tegra_bpmp_channel *channel,
void *data) void *data)
{ {
struct mrq_ping_request *request; struct mrq_ping_request request;
struct mrq_ping_response response; struct mrq_ping_response response;
request = (struct mrq_ping_request *)channel->ib->data; tegra_bpmp_mb_read(&request, &channel->ib, sizeof(request));
memset(&response, 0, sizeof(response)); memset(&response, 0, sizeof(response));
response.reply = request->challenge << 1; response.reply = request.challenge << 1;
tegra_bpmp_mrq_return(channel, 0, &response, sizeof(response)); tegra_bpmp_mrq_return(channel, 0, &response, sizeof(response));
} }
...@@ -648,7 +648,7 @@ static int tegra_bpmp_get_firmware_tag(struct tegra_bpmp *bpmp, char *tag, ...@@ -648,7 +648,7 @@ static int tegra_bpmp_get_firmware_tag(struct tegra_bpmp *bpmp, char *tag,
static void tegra_bpmp_channel_signal(struct tegra_bpmp_channel *channel) static void tegra_bpmp_channel_signal(struct tegra_bpmp_channel *channel)
{ {
unsigned long flags = channel->ob->flags; unsigned long flags = tegra_bpmp_mb_read_field(&channel->ob, flags);
if ((flags & MSG_RING) == 0) if ((flags & MSG_RING) == 0)
return; return;
...@@ -666,8 +666,11 @@ void tegra_bpmp_handle_rx(struct tegra_bpmp *bpmp) ...@@ -666,8 +666,11 @@ void tegra_bpmp_handle_rx(struct tegra_bpmp *bpmp)
count = bpmp->soc->channels.thread.count; count = bpmp->soc->channels.thread.count;
busy = bpmp->threaded.busy; busy = bpmp->threaded.busy;
if (tegra_bpmp_is_request_ready(channel)) if (tegra_bpmp_is_request_ready(channel)) {
tegra_bpmp_handle_mrq(bpmp, channel->ib->code, channel); unsigned int mrq = tegra_bpmp_mb_read_field(&channel->ib, code);
tegra_bpmp_handle_mrq(bpmp, mrq, channel);
}
spin_lock(&bpmp->lock); spin_lock(&bpmp->lock);
......
drivers/firmware/tegra/ivc.c
View file @ a6eeafba
...@@ -68,6 +68,12 @@ struct tegra_ivc_header { ...@@ -68,6 +68,12 @@ struct tegra_ivc_header {
} rx; } rx;
}; };
#define tegra_ivc_header_read_field(hdr, field) \
iosys_map_rd_field(hdr, 0, struct tegra_ivc_header, field)
#define tegra_ivc_header_write_field(hdr, field, value) \
iosys_map_wr_field(hdr, 0, struct tegra_ivc_header, field, value)
static inline void tegra_ivc_invalidate(struct tegra_ivc *ivc, dma_addr_t phys) static inline void tegra_ivc_invalidate(struct tegra_ivc *ivc, dma_addr_t phys)
{ {
if (!ivc->peer) if (!ivc->peer)
...@@ -86,16 +92,15 @@ static inline void tegra_ivc_flush(struct tegra_ivc *ivc, dma_addr_t phys) ...@@ -86,16 +92,15 @@ static inline void tegra_ivc_flush(struct tegra_ivc *ivc, dma_addr_t phys)
DMA_TO_DEVICE); DMA_TO_DEVICE);
} }
static inline bool tegra_ivc_empty(struct tegra_ivc *ivc, static inline bool tegra_ivc_empty(struct tegra_ivc *ivc, struct iosys_map *map)
struct tegra_ivc_header *header)
{ {
/* /*
* This function performs multiple checks on the same values with * This function performs multiple checks on the same values with
* security implications, so create snapshots with READ_ONCE() to * security implications, so create snapshots with READ_ONCE() to
* ensure that these checks use the same values. * ensure that these checks use the same values.
*/ */
u32 tx = READ_ONCE(header->tx.count); u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = READ_ONCE(header->rx.count); u32 rx = tegra_ivc_header_read_field(map, rx.count);
/* /*
* Perform an over-full check to prevent denial of service attacks * Perform an over-full check to prevent denial of service attacks
...@@ -113,11 +118,10 @@ static inline bool tegra_ivc_empty(struct tegra_ivc *ivc, ...@@ -113,11 +118,10 @@ static inline bool tegra_ivc_empty(struct tegra_ivc *ivc,
return tx == rx; return tx == rx;
} }
static inline bool tegra_ivc_full(struct tegra_ivc *ivc, static inline bool tegra_ivc_full(struct tegra_ivc *ivc, struct iosys_map *map)
struct tegra_ivc_header *header)
{ {
u32 tx = READ_ONCE(header->tx.count); u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = READ_ONCE(header->rx.count); u32 rx = tegra_ivc_header_read_field(map, rx.count);
/* /*
* Invalid cases where the counters indicate that the queue is over * Invalid cases where the counters indicate that the queue is over
...@@ -126,11 +130,10 @@ static inline bool tegra_ivc_full(struct tegra_ivc *ivc, ...@@ -126,11 +130,10 @@ static inline bool tegra_ivc_full(struct tegra_ivc *ivc,
return tx - rx >= ivc->num_frames; return tx - rx >= ivc->num_frames;
} }
static inline u32 tegra_ivc_available(struct tegra_ivc *ivc, static inline u32 tegra_ivc_available(struct tegra_ivc *ivc, struct iosys_map *map)
struct tegra_ivc_header *header)
{ {
u32 tx = READ_ONCE(header->tx.count); u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = READ_ONCE(header->rx.count); u32 rx = tegra_ivc_header_read_field(map, rx.count);
/* /*
* This function isn't expected to be used in scenarios where an * This function isn't expected to be used in scenarios where an
...@@ -143,8 +146,9 @@ static inline u32 tegra_ivc_available(struct tegra_ivc *ivc, ...@@ -143,8 +146,9 @@ static inline u32 tegra_ivc_available(struct tegra_ivc *ivc,
static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc) static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)
{ {
WRITE_ONCE(ivc->tx.channel->tx.count, unsigned int count = tegra_ivc_header_read_field(&ivc->tx.map, tx.count);
READ_ONCE(ivc->tx.channel->tx.count) + 1);
tegra_ivc_header_write_field(&ivc->tx.map, tx.count, count + 1);
if (ivc->tx.position == ivc->num_frames - 1) if (ivc->tx.position == ivc->num_frames - 1)
ivc->tx.position = 0; ivc->tx.position = 0;
...@@ -154,8 +158,9 @@ static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc) ...@@ -154,8 +158,9 @@ static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)
static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc) static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
{ {
WRITE_ONCE(ivc->rx.channel->rx.count, unsigned int count = tegra_ivc_header_read_field(&ivc->rx.map, rx.count);
READ_ONCE(ivc->rx.channel->rx.count) + 1);
tegra_ivc_header_write_field(&ivc->rx.map, rx.count, count + 1);
if (ivc->rx.position == ivc->num_frames - 1) if (ivc->rx.position == ivc->num_frames - 1)
ivc->rx.position = 0; ivc->rx.position = 0;
...@@ -166,6 +171,7 @@ static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc) ...@@ -166,6 +171,7 @@ static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
static inline int tegra_ivc_check_read(struct tegra_ivc *ivc) static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
{ {
unsigned int offset = offsetof(struct tegra_ivc_header, tx.count); unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
unsigned int state;
/* /*
* tx.channel->state is set locally, so it is not synchronized with * tx.channel->state is set locally, so it is not synchronized with
...@@ -175,7 +181,8 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc) ...@@ -175,7 +181,8 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
* asynchronous transition of rx.channel->state to * asynchronous transition of rx.channel->state to
* TEGRA_IVC_STATE_ACK is not allowed. * TEGRA_IVC_STATE_ACK is not allowed.
*/ */
if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED) state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
if (state != TEGRA_IVC_STATE_ESTABLISHED)
return -ECONNRESET; return -ECONNRESET;
/* /*
...@@ -185,12 +192,12 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc) ...@@ -185,12 +192,12 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
* Synchronization is only necessary when these pointers indicate * Synchronization is only necessary when these pointers indicate
* empty or full. * empty or full.
*/ */
if (!tegra_ivc_empty(ivc, ivc->rx.channel)) if (!tegra_ivc_empty(ivc, &ivc->rx.map))
return 0; return 0;
tegra_ivc_invalidate(ivc, ivc->rx.phys + offset); tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
if (tegra_ivc_empty(ivc, ivc->rx.channel)) if (tegra_ivc_empty(ivc, &ivc->rx.map))
return -ENOSPC; return -ENOSPC;
return 0; return 0;
...@@ -199,29 +206,34 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc) ...@@ -199,29 +206,34 @@ static inline int tegra_ivc_check_read(struct tegra_ivc *ivc)
static inline int tegra_ivc_check_write(struct tegra_ivc *ivc) static inline int tegra_ivc_check_write(struct tegra_ivc *ivc)
{ {
unsigned int offset = offsetof(struct tegra_ivc_header, rx.count); unsigned int offset = offsetof(struct tegra_ivc_header, rx.count);
unsigned int state;
if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED) state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
if (state != TEGRA_IVC_STATE_ESTABLISHED)
return -ECONNRESET; return -ECONNRESET;
if (!tegra_ivc_full(ivc, ivc->tx.channel)) if (!tegra_ivc_full(ivc, &ivc->tx.map))
return 0; return 0;
tegra_ivc_invalidate(ivc, ivc->tx.phys + offset); tegra_ivc_invalidate(ivc, ivc->tx.phys + offset);
if (tegra_ivc_full(ivc, ivc->tx.channel)) if (tegra_ivc_full(ivc, &ivc->tx.map))
return -ENOSPC; return -ENOSPC;
return 0; return 0;
} }
static void *tegra_ivc_frame_virt(struct tegra_ivc *ivc, static int tegra_ivc_frame_virt(struct tegra_ivc *ivc, const struct iosys_map *header,
struct tegra_ivc_header *header, unsigned int frame, struct iosys_map *map)
unsigned int frame)
{ {
size_t offset = sizeof(struct tegra_ivc_header) + ivc->frame_size * frame;
if (WARN_ON(frame >= ivc->num_frames)) if (WARN_ON(frame >= ivc->num_frames))
return ERR_PTR(-EINVAL); return -EINVAL;
*map = IOSYS_MAP_INIT_OFFSET(header, offset);
return (void *)(header + 1) + ivc->frame_size * frame; return 0;
} }
static inline dma_addr_t tegra_ivc_frame_phys(struct tegra_ivc *ivc, static inline dma_addr_t tegra_ivc_frame_phys(struct tegra_ivc *ivc,
...@@ -264,16 +276,16 @@ static inline void tegra_ivc_flush_frame(struct tegra_ivc *ivc, ...@@ -264,16 +276,16 @@ static inline void tegra_ivc_flush_frame(struct tegra_ivc *ivc,
} }
/* directly peek at the next frame rx'ed */ /* directly peek at the next frame rx'ed */
void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc) int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map)
{ {
int err; int err;
if (WARN_ON(ivc == NULL)) if (WARN_ON(ivc == NULL))
return ERR_PTR(-EINVAL); return -EINVAL;
err = tegra_ivc_check_read(ivc); err = tegra_ivc_check_read(ivc);
if (err < 0) if (err < 0)
return ERR_PTR(err); return err;
/* /*
* Order observation of ivc->rx.position potentially indicating new * Order observation of ivc->rx.position potentially indicating new
...@@ -284,7 +296,7 @@ void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc) ...@@ -284,7 +296,7 @@ void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc)
tegra_ivc_invalidate_frame(ivc, ivc->rx.phys, ivc->rx.position, 0, tegra_ivc_invalidate_frame(ivc, ivc->rx.phys, ivc->rx.position, 0,
ivc->frame_size); ivc->frame_size);
return tegra_ivc_frame_virt(ivc, ivc->rx.channel, ivc->rx.position); return tegra_ivc_frame_virt(ivc, &ivc->rx.map, ivc->rx.position, map);
} }
EXPORT_SYMBOL(tegra_ivc_read_get_next_frame); EXPORT_SYMBOL(tegra_ivc_read_get_next_frame);
...@@ -320,7 +332,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc) ...@@ -320,7 +332,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc)
*/ */
tegra_ivc_invalidate(ivc, ivc->rx.phys + tx); tegra_ivc_invalidate(ivc, ivc->rx.phys + tx);
if (tegra_ivc_available(ivc, ivc->rx.channel) == ivc->num_frames - 1) if (tegra_ivc_available(ivc, &ivc->rx.map) == ivc->num_frames - 1)
ivc->notify(ivc, ivc->notify_data); ivc->notify(ivc, ivc->notify_data);
return 0; return 0;
...@@ -328,15 +340,15 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc) ...@@ -328,15 +340,15 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc)
EXPORT_SYMBOL(tegra_ivc_read_advance); EXPORT_SYMBOL(tegra_ivc_read_advance);
/* directly poke at the next frame to be tx'ed */ /* directly poke at the next frame to be tx'ed */
void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc) int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map)
{ {
int err; int err;
err = tegra_ivc_check_write(ivc); err = tegra_ivc_check_write(ivc);
if (err < 0) if (err < 0)
return ERR_PTR(err); return err;
return tegra_ivc_frame_virt(ivc, ivc->tx.channel, ivc->tx.position); return tegra_ivc_frame_virt(ivc, &ivc->tx.map, ivc->tx.position, map);
} }
EXPORT_SYMBOL(tegra_ivc_write_get_next_frame); EXPORT_SYMBOL(tegra_ivc_write_get_next_frame);
...@@ -376,7 +388,7 @@ int tegra_ivc_write_advance(struct tegra_ivc *ivc) ...@@ -376,7 +388,7 @@ int tegra_ivc_write_advance(struct tegra_ivc *ivc)
*/ */
tegra_ivc_invalidate(ivc, ivc->tx.phys + rx); tegra_ivc_invalidate(ivc, ivc->tx.phys + rx);
if (tegra_ivc_available(ivc, ivc->tx.channel) == 1) if (tegra_ivc_available(ivc, &ivc->tx.map) == 1)
ivc->notify(ivc, ivc->notify_data); ivc->notify(ivc, ivc->notify_data);
return 0; return 0;
...@@ -387,7 +399,7 @@ void tegra_ivc_reset(struct tegra_ivc *ivc) ...@@ -387,7 +399,7 @@ void tegra_ivc_reset(struct tegra_ivc *ivc)
{ {
unsigned int offset = offsetof(struct tegra_ivc_header, tx.count); unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_SYNC; tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_SYNC);
tegra_ivc_flush(ivc, ivc->tx.phys + offset); tegra_ivc_flush(ivc, ivc->tx.phys + offset);
ivc->notify(ivc, ivc->notify_data); ivc->notify(ivc, ivc->notify_data);
} }
...@@ -416,13 +428,14 @@ EXPORT_SYMBOL(tegra_ivc_reset); ...@@ -416,13 +428,14 @@ EXPORT_SYMBOL(tegra_ivc_reset);
int tegra_ivc_notified(struct tegra_ivc *ivc) int tegra_ivc_notified(struct tegra_ivc *ivc)
{ {
unsigned int offset = offsetof(struct tegra_ivc_header, tx.count); unsigned int offset = offsetof(struct tegra_ivc_header, tx.count);
enum tegra_ivc_state state; enum tegra_ivc_state rx_state, tx_state;
/* Copy the receiver's state out of shared memory. */ /* Copy the receiver's state out of shared memory. */
tegra_ivc_invalidate(ivc, ivc->rx.phys + offset); tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
state = READ_ONCE(ivc->rx.channel->tx.state); rx_state = tegra_ivc_header_read_field(&ivc->rx.map, tx.state);
tx_state = tegra_ivc_header_read_field(&ivc->tx.map, tx.state);
if (state == TEGRA_IVC_STATE_SYNC) { if (rx_state == TEGRA_IVC_STATE_SYNC) {
offset = offsetof(struct tegra_ivc_header, tx.count); offset = offsetof(struct tegra_ivc_header, tx.count);
/* /*
...@@ -436,8 +449,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -436,8 +449,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
* state and won't make progress until we change our state, * state and won't make progress until we change our state,
* so the counters are not in use at this time. * so the counters are not in use at this time.
*/ */
ivc->tx.channel->tx.count = 0; tegra_ivc_header_write_field(&ivc->tx.map, tx.count, 0);
ivc->rx.channel->rx.count = 0; tegra_ivc_header_write_field(&ivc->rx.map, rx.count, 0);
ivc->tx.position = 0; ivc->tx.position = 0;
ivc->rx.position = 0; ivc->rx.position = 0;
...@@ -452,7 +465,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -452,7 +465,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
* Move to ACK state. We have just cleared our counters, so it * Move to ACK state. We have just cleared our counters, so it
* is now safe for the remote end to start using these values. * is now safe for the remote end to start using these values.
*/ */
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ACK; tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ACK);
tegra_ivc_flush(ivc, ivc->tx.phys + offset); tegra_ivc_flush(ivc, ivc->tx.phys + offset);
/* /*
...@@ -460,8 +473,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -460,8 +473,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
*/ */
ivc->notify(ivc, ivc->notify_data); ivc->notify(ivc, ivc->notify_data);
} else if (ivc->tx.channel->tx.state == TEGRA_IVC_STATE_SYNC && } else if (tx_state == TEGRA_IVC_STATE_SYNC &&
state == TEGRA_IVC_STATE_ACK) { rx_state == TEGRA_IVC_STATE_ACK) {
offset = offsetof(struct tegra_ivc_header, tx.count); offset = offsetof(struct tegra_ivc_header, tx.count);
/* /*
...@@ -475,8 +488,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -475,8 +488,8 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
* state and won't make progress until we change our state, * state and won't make progress until we change our state,
* so the counters are not in use at this time. * so the counters are not in use at this time.
*/ */
ivc->tx.channel->tx.count = 0; tegra_ivc_header_write_field(&ivc->tx.map, tx.count, 0);
ivc->rx.channel->rx.count = 0; tegra_ivc_header_write_field(&ivc->rx.map, rx.count, 0);
ivc->tx.position = 0; ivc->tx.position = 0;
ivc->rx.position = 0; ivc->rx.position = 0;
...@@ -492,7 +505,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -492,7 +505,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
* already cleared its counters, so it is safe to start * already cleared its counters, so it is safe to start
* writing/reading on this channel. * writing/reading on this channel.
*/ */
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ESTABLISHED; tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ESTABLISHED);
tegra_ivc_flush(ivc, ivc->tx.phys + offset); tegra_ivc_flush(ivc, ivc->tx.phys + offset);
/* /*
...@@ -500,7 +513,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -500,7 +513,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
*/ */
ivc->notify(ivc, ivc->notify_data); ivc->notify(ivc, ivc->notify_data);
} else if (ivc->tx.channel->tx.state == TEGRA_IVC_STATE_ACK) { } else if (tx_state == TEGRA_IVC_STATE_ACK) {
offset = offsetof(struct tegra_ivc_header, tx.count); offset = offsetof(struct tegra_ivc_header, tx.count);
/* /*
...@@ -516,7 +529,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -516,7 +529,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
* cleared its counters, so it is safe to start writing/reading * cleared its counters, so it is safe to start writing/reading
* on this channel. * on this channel.
*/ */
ivc->tx.channel->tx.state = TEGRA_IVC_STATE_ESTABLISHED; tegra_ivc_header_write_field(&ivc->tx.map, tx.state, TEGRA_IVC_STATE_ESTABLISHED);
tegra_ivc_flush(ivc, ivc->tx.phys + offset); tegra_ivc_flush(ivc, ivc->tx.phys + offset);
/* /*
...@@ -533,7 +546,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc) ...@@ -533,7 +546,7 @@ int tegra_ivc_notified(struct tegra_ivc *ivc)
*/ */
} }
if (ivc->tx.channel->tx.state != TEGRA_IVC_STATE_ESTABLISHED) if (tx_state != TEGRA_IVC_STATE_ESTABLISHED)
return -EAGAIN; return -EAGAIN;
return 0; return 0;
...@@ -609,8 +622,29 @@ static int tegra_ivc_check_params(unsigned long rx, unsigned long tx, ...@@ -609,8 +622,29 @@ static int tegra_ivc_check_params(unsigned long rx, unsigned long tx,
return 0; return 0;
} }
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, static inline void iosys_map_copy(struct iosys_map *dst, const struct iosys_map *src)
dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys, {
*dst = *src;
}
static inline unsigned long iosys_map_get_address(const struct iosys_map *map)
{
if (map->is_iomem)
return (unsigned long)map->vaddr_iomem;
return (unsigned long)map->vaddr;
}
static inline void *iosys_map_get_vaddr(const struct iosys_map *map)
{
if (WARN_ON(map->is_iomem))
return NULL;
return map->vaddr;
}
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, const struct iosys_map *rx,
dma_addr_t rx_phys, const struct iosys_map *tx, dma_addr_t tx_phys,
unsigned int num_frames, size_t frame_size, unsigned int num_frames, size_t frame_size,
void (*notify)(struct tegra_ivc *ivc, void *data), void (*notify)(struct tegra_ivc *ivc, void *data),
void *data) void *data)
...@@ -628,7 +662,7 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, ...@@ -628,7 +662,7 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
if (frame_size > INT_MAX) if (frame_size > INT_MAX)
return -E2BIG; return -E2BIG;
err = tegra_ivc_check_params((unsigned long)rx, (unsigned long)tx, err = tegra_ivc_check_params(iosys_map_get_address(rx), iosys_map_get_address(tx),
num_frames, frame_size); num_frames, frame_size);
if (err < 0) if (err < 0)
return err; return err;
...@@ -636,12 +670,12 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, ...@@ -636,12 +670,12 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
queue_size = tegra_ivc_total_queue_size(num_frames * frame_size); queue_size = tegra_ivc_total_queue_size(num_frames * frame_size);
if (peer) { if (peer) {
ivc->rx.phys = dma_map_single(peer, rx, queue_size, ivc->rx.phys = dma_map_single(peer, iosys_map_get_vaddr(rx), queue_size,
DMA_BIDIRECTIONAL); DMA_BIDIRECTIONAL);
if (dma_mapping_error(peer, ivc->rx.phys)) if (dma_mapping_error(peer, ivc->rx.phys))
return -ENOMEM; return -ENOMEM;
ivc->tx.phys = dma_map_single(peer, tx, queue_size, ivc->tx.phys = dma_map_single(peer, iosys_map_get_vaddr(tx), queue_size,
DMA_BIDIRECTIONAL); DMA_BIDIRECTIONAL);
if (dma_mapping_error(peer, ivc->tx.phys)) { if (dma_mapping_error(peer, ivc->tx.phys)) {
dma_unmap_single(peer, ivc->rx.phys, queue_size, dma_unmap_single(peer, ivc->rx.phys, queue_size,
...@@ -653,8 +687,8 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, ...@@ -653,8 +687,8 @@ int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx,
ivc->tx.phys = tx_phys; ivc->tx.phys = tx_phys;
} }
ivc->rx.channel = rx; iosys_map_copy(&ivc->rx.map, rx);
ivc->tx.channel = tx; iosys_map_copy(&ivc->tx.map, tx);
ivc->peer = peer; ivc->peer = peer;
ivc->notify = notify; ivc->notify = notify;
ivc->notify_data = data; ivc->notify_data = data;
......
drivers/thermal/tegra/tegra-bpmp-thermal.c
View file @ a6eeafba
...@@ -106,21 +106,22 @@ static void tz_device_update_work_fn(struct work_struct *work) ...@@ -106,21 +106,22 @@ static void tz_device_update_work_fn(struct work_struct *work)
static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch, static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch,
void *data) void *data)
{ {
struct mrq_thermal_bpmp_to_host_request *req; struct mrq_thermal_bpmp_to_host_request req;
struct tegra_bpmp_thermal *tegra = data; struct tegra_bpmp_thermal *tegra = data;
size_t offset;
int i; int i;
req = (struct mrq_thermal_bpmp_to_host_request *)ch->ib->data; offset = offsetof(struct tegra_bpmp_mb_data, data);
iosys_map_memcpy_from(&req, &ch->ib, offset, sizeof(req));
if (req->type != CMD_THERMAL_HOST_TRIP_REACHED) { if (req.type != CMD_THERMAL_HOST_TRIP_REACHED) {
dev_err(tegra->dev, "%s: invalid request type: %d\n", dev_err(tegra->dev, "%s: invalid request type: %d\n", __func__, req.type);
__func__, req->type);
tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0); tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0);
return; return;
} }
for (i = 0; i < tegra->num_zones; ++i) { for (i = 0; i < tegra->num_zones; ++i) {
if (tegra->zones[i]->idx != req->host_trip_reached.zone) if (tegra->zones[i]->idx != req.host_trip_reached.zone)
continue; continue;
schedule_work(&tegra->zones[i]->tz_device_update_work); schedule_work(&tegra->zones[i]->tz_device_update_work);
...@@ -129,7 +130,7 @@ static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch, ...@@ -129,7 +130,7 @@ static void bpmp_mrq_thermal(unsigned int mrq, struct tegra_bpmp_channel *ch,
} }
dev_err(tegra->dev, "%s: invalid thermal zone: %d\n", __func__, dev_err(tegra->dev, "%s: invalid thermal zone: %d\n", __func__,
req->host_trip_reached.zone); req.host_trip_reached.zone);
tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0); tegra_bpmp_mrq_return(ch, -EINVAL, NULL, 0);
} }
......
include/soc/tegra/bpmp-abi.h
View file @ a6eeafba
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
*/ */
#ifndef ABI_BPMP_ABI_H #ifndef ABI_BPMP_ABI_H
...@@ -72,6 +72,32 @@ ...@@ -72,6 +72,32 @@
* @} * @}
*/ */
/**
* @ingroup MRQ_Format
* Request an answer from the peer.
* This should be set in mrq_request::flags for all requests targetted
* at BPMP. For requests originating in BPMP, this flag is optional except
* for messages targeting MCE, for which the field must be set.
* When this flag is not set, the remote peer must not send a response
* back.
*/
#define BPMP_MAIL_DO_ACK (1U << 0U)
/**
* @ingroup MRQ_Format
* Ring the sender's doorbell when responding. This should be set unless
* the sender wants to poll the underlying communications layer directly.
*
* An optional direction that can be specified in mrq_request::flags.
*/
#define BPMP_MAIL_RING_DB (1U << 1U)
/**
* @ingroup MRQ_Format
* CRC present
*/
#define BPMP_MAIL_CRC_PRESENT (1U << 2U)
/** /**
* @ingroup MRQ_Format * @ingroup MRQ_Format
* @brief Header for an MRQ message * @brief Header for an MRQ message
...@@ -85,12 +111,139 @@ struct mrq_request { ...@@ -85,12 +111,139 @@ struct mrq_request {
uint32_t mrq; uint32_t mrq;
/** /**
* @brief Flags providing follow up directions to the receiver * @brief 32bit word containing a number of fields as follows:
* *
* | Bit | Description | * struct {
* |-----|--------------------------------------------| * uint8_t options:4;
* | 1 | ring the sender's doorbell when responding | * uint8_t xid:4;
* | 0 | should be 1 | * uint8_t payload_length;
* uint16_t crc16;
* };
*
* **options** directions to the receiver and indicates CRC presence.
*
* #BPMP_MAIL_DO_ACK and #BPMP_MAIL_RING_DB see documentation of respective options.
* #BPMP_MAIL_CRC_PRESENT is supported on T234 and later platforms. It indicates the
* crc16, xid and length fields are present when set.
* Some platform configurations, especially when targeted to applications requiring
* functional safety, mandate this option being set or otherwise will respond with
* -BPMP_EBADMSG and ignore the request.
*
* **xid** is a transaction ID.
*
* Only used when #BPMP_MAIL_CRC_PRESENT is set.
*
* **payload_length** of the message expressed in bytes without the size of this header.
* See table below for minimum accepted payload lengths for each MRQ.
* Note: For DMCE communication, this field expresses the length as a multiple of 4 bytes
* rather than bytes.
*
* Only used when #BPMP_MAIL_CRC_PRESENT is set.
*
* | MRQ | CMD | minimum payload length
* | -------------------- | ------------------------------------ | ------------------------------------------ |
* | MRQ_PING | | 4 |
* | MRQ_THREADED_PING | | 4 |
* | MRQ_RESET | any | 8 |
* | MRQ_I2C | | 12 + cmd_i2c_xfer_request.data_size |
* | MRQ_CLK | CMD_CLK_GET_RATE | 4 |
* | MRQ_CLK | CMD_CLK_SET_RATE | 16 |
* | MRQ_CLK | CMD_CLK_ROUND_RATE | 16 |
* | MRQ_CLK | CMD_CLK_GET_PARENT | 4 |
* | MRQ_CLK | CMD_CLK_SET_PARENT | 8 |
* | MRQ_CLK | CMD_CLK_ENABLE | 4 |
* | MRQ_CLK | CMD_CLK_DISABLE | 4 |
* | MRQ_CLK | CMD_CLK_IS_ENABLED | 4 |
* | MRQ_CLK | CMD_CLK_GET_ALL_INFO | 4 |
* | MRQ_CLK | CMD_CLK_GET_MAX_CLK_ID | 4 |
* | MRQ_CLK | CMD_CLK_GET_FMAX_AT_VMIN | 4 |
* | MRQ_QUERY_ABI | | 4 |
* | MRQ_PG | CMD_PG_QUERY_ABI | 12 |
* | MRQ_PG | CMD_PG_SET_STATE | 12 |
* | MRQ_PG | CMD_PG_GET_STATE | 8 |
* | MRQ_PG | CMD_PG_GET_NAME | 8 |
* | MRQ_PG | CMD_PG_GET_MAX_ID | 8 |
* | MRQ_THERMAL | CMD_THERMAL_QUERY_ABI | 8 |
* | MRQ_THERMAL | CMD_THERMAL_GET_TEMP | 8 |
* | MRQ_THERMAL | CMD_THERMAL_SET_TRIP | 20 |
* | MRQ_THERMAL | CMD_THERMAL_GET_NUM_ZONES | 4 |
* | MRQ_THERMAL | CMD_THERMAL_GET_THERMTRIP | 8 |
* | MRQ_CPU_VHINT | | 8 |
* | MRQ_ABI_RATCHET | | 2 |
* | MRQ_EMC_DVFS_LATENCY | | 8 |
* | MRQ_EMC_DVFS_EMCHUB | | 8 |
* | MRQ_EMC_DISP_RFL | | 4 |
* | MRQ_BWMGR | CMD_BWMGR_QUERY_ABI | 8 |
* | MRQ_BWMGR | CMD_BWMGR_CALC_RATE | 8 + 8 * bwmgr_rate_req.num_iso_clients |
* | MRQ_ISO_CLIENT | CMD_ISO_CLIENT_QUERY_ABI | 8 |
* | MRQ_ISO_CLIENT | CMD_ISO_CLIENT_CALCULATE_LA | 16 |
* | MRQ_ISO_CLIENT | CMD_ISO_CLIENT_SET_LA | 16 |
* | MRQ_ISO_CLIENT | CMD_ISO_CLIENT_GET_MAX_BW | 8 |
* | MRQ_CPU_NDIV_LIMITS | | 4 |
* | MRQ_CPU_AUTO_CC3 | | 4 |
* | MRQ_RINGBUF_CONSOLE | CMD_RINGBUF_CONSOLE_QUERY_ABI | 8 |
* | MRQ_RINGBUF_CONSOLE | CMD_RINGBUF_CONSOLE_READ | 5 |
* | MRQ_RINGBUF_CONSOLE | CMD_RINGBUF_CONSOLE_WRITE | 5 + cmd_ringbuf_console_write_req.len |
* | MRQ_RINGBUF_CONSOLE | CMD_RINGBUF_CONSOLE_GET_FIFO | 4 |
* | MRQ_STRAP | STRAP_SET | 12 |
* | MRQ_UPHY | CMD_UPHY_PCIE_LANE_MARGIN_CONTROL | 24 |
* | MRQ_UPHY | CMD_UPHY_PCIE_LANE_MARGIN_STATUS | 4 |
* | MRQ_UPHY | CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT | 5 |
* | MRQ_UPHY | CMD_UPHY_PCIE_CONTROLLER_STATE | 6 |
* | MRQ_UPHY | CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF | 5 |
* | MRQ_FMON | CMD_FMON_GEAR_CLAMP | 16 |
* | MRQ_FMON | CMD_FMON_GEAR_FREE | 4 |
* | MRQ_FMON | CMD_FMON_GEAR_GET | 4 |
* | MRQ_FMON | CMD_FMON_FAULT_STS_GET | 8 |
* | MRQ_EC | CMD_EC_STATUS_EX_GET | 12 |
* | MRQ_QUERY_FW_TAG | | 0 |
* | MRQ_DEBUG | CMD_DEBUG_OPEN_RO | 4 + length of cmd_debug_fopen_request.name |
* | MRQ_DEBUG | CMD_DEBUG_OPEN_WO | 4 + length of cmd_debug_fopen_request.name |
* | MRQ_DEBUG | CMD_DEBUG_READ | 8 |
* | MRQ_DEBUG | CMD_DEBUG_WRITE | 12 + cmd_debug_fwrite_request.datalen |
* | MRQ_DEBUG | CMD_DEBUG_CLOSE | 8 |
* | MRQ_TELEMETRY | | 8 |
* | MRQ_PWR_LIMIT | CMD_PWR_LIMIT_QUERY_ABI | 8 |
* | MRQ_PWR_LIMIT | CMD_PWR_LIMIT_SET | 20 |
* | MRQ_PWR_LIMIT | CMD_PWR_LIMIT_GET | 16 |
* | MRQ_PWR_LIMIT | CMD_PWR_LIMIT_CURR_CAP | 8 |
* | MRQ_GEARS | | 0 |
* | MRQ_BWMGR_INT | CMD_BWMGR_INT_QUERY_ABI | 8 |
* | MRQ_BWMGR_INT | CMD_BWMGR_INT_CALC_AND_SET | 16 |
* | MRQ_BWMGR_INT | CMD_BWMGR_INT_CAP_SET | 8 |
* | MRQ_OC_STATUS | | 0 |
*
* **crc16**
*
* CRC16 using polynomial x^16 + x^14 + x^12 + x^11 + x^8 + x^5 + x^4 + x^2 + 1
* and initialization value 0x4657. The CRC is calculated over all bytes of the message
* including this header. However the crc16 field is considered to be set to 0 when
* calculating the CRC. Only used when #BPMP_MAIL_CRC_PRESENT is set. If
* #BPMP_MAIL_CRC_PRESENT is set and this field does not match the CRC as
* calculated by BPMP, -BPMP_EBADMSG will be returned and the request will
* be ignored. See code snippet below on how to calculate the CRC.
*
* @code
* uint16_t calc_crc_digest(uint16_t crc, uint8_t *data, size_t size)
* {
* for (size_t i = 0; i < size; i++) {
* crc ^= data[i] << 8;
* for (size_t j = 0; j < 8; j++) {
* if ((crc & 0x8000) == 0x8000) {
* crc = (crc << 1) ^ 0xAC9A;
* } else {
* crc = (crc << 1);
* }
* }
* }
* return crc;
* }
*
* uint16_t calc_crc(uint8_t *data, size_t size)
* {
* return calc_crc_digest(0x4657, data, size);
* }
* @endcode
*/ */
uint32_t flags; uint32_t flags;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
...@@ -107,7 +260,35 @@ struct mrq_request { ...@@ -107,7 +260,35 @@ struct mrq_request {
struct mrq_response { struct mrq_response {
/** @brief Error code for the MRQ request itself */ /** @brief Error code for the MRQ request itself */
int32_t err; int32_t err;
/** @brief Reserved for future use */
/**
* @brief 32bit word containing a number of fields as follows:
*
* struct {
* uint8_t options:4;
* uint8_t xid:4;
* uint8_t payload_length;
* uint16_t crc16;
* };
*
* **options** indicates CRC presence.
*
* #BPMP_MAIL_CRC_PRESENT is supported on T234 and later platforms and
* indicates the crc16 related fields are present when set.
*
* **xid** is the transaction ID as sent by the requestor.
*
* **length** of the message expressed in bytes without the size of this header.
* Note: For DMCE communication, this field expresses the length as a multiple of 4 bytes
* rather than bytes.
*
* **crc16**
*
* CRC16 using polynomial x^16 + x^14 + x^12 + x^11 + x^8 + x^5 + x^4 + x^2 + 1
* and initialization value 0x4657. The CRC is calculated over all bytes of the message
* including this header. However the crc16 field is considered to be set to 0 when
* calculating the CRC. Only used when #BPMP_MAIL_CRC_PRESENT is set.
*/
uint32_t flags; uint32_t flags;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
...@@ -131,24 +312,16 @@ struct mrq_response { ...@@ -131,24 +312,16 @@ struct mrq_response {
#define MRQ_PING 0U #define MRQ_PING 0U
#define MRQ_QUERY_TAG 1U #define MRQ_QUERY_TAG 1U
#define MRQ_MODULE_LOAD 4U
#define MRQ_MODULE_UNLOAD 5U
#define MRQ_TRACE_MODIFY 7U
#define MRQ_WRITE_TRACE 8U
#define MRQ_THREADED_PING 9U #define MRQ_THREADED_PING 9U
#define MRQ_MODULE_MAIL 11U
#define MRQ_DEBUGFS 19U #define MRQ_DEBUGFS 19U
#define MRQ_RESET 20U #define MRQ_RESET 20U
#define MRQ_I2C 21U #define MRQ_I2C 21U
#define MRQ_CLK 22U #define MRQ_CLK 22U
#define MRQ_QUERY_ABI 23U #define MRQ_QUERY_ABI 23U
#define MRQ_PG_READ_STATE 25U
#define MRQ_PG_UPDATE_STATE 26U
#define MRQ_THERMAL 27U #define MRQ_THERMAL 27U
#define MRQ_CPU_VHINT 28U #define MRQ_CPU_VHINT 28U
#define MRQ_ABI_RATCHET 29U #define MRQ_ABI_RATCHET 29U
#define MRQ_EMC_DVFS_LATENCY 31U #define MRQ_EMC_DVFS_LATENCY 31U
#define MRQ_TRACE_ITER 64U
#define MRQ_RINGBUF_CONSOLE 65U #define MRQ_RINGBUF_CONSOLE 65U
#define MRQ_PG 66U #define MRQ_PG 66U
#define MRQ_CPU_NDIV_LIMITS 67U #define MRQ_CPU_NDIV_LIMITS 67U
...@@ -159,6 +332,40 @@ struct mrq_response { ...@@ -159,6 +332,40 @@ struct mrq_response {
#define MRQ_FMON 72U #define MRQ_FMON 72U
#define MRQ_EC 73U #define MRQ_EC 73U
#define MRQ_DEBUG 75U #define MRQ_DEBUG 75U
#define MRQ_EMC_DVFS_EMCHUB 76U
#define MRQ_BWMGR 77U
#define MRQ_ISO_CLIENT 78U
#define MRQ_EMC_DISP_RFL 79U
#define MRQ_TELEMETRY 80U
#define MRQ_PWR_LIMIT 81U
#define MRQ_GEARS 82U
#define MRQ_BWMGR_INT 83U
#define MRQ_OC_STATUS 84U
/** @cond DEPRECATED */
#define MRQ_RESERVED_2 2U
#define MRQ_RESERVED_3 3U
#define MRQ_RESERVED_4 4U
#define MRQ_RESERVED_5 5U
#define MRQ_RESERVED_6 6U
#define MRQ_RESERVED_7 7U
#define MRQ_RESERVED_8 8U
#define MRQ_RESERVED_10 10U
#define MRQ_RESERVED_11 11U
#define MRQ_RESERVED_12 12U
#define MRQ_RESERVED_13 13U
#define MRQ_RESERVED_14 14U
#define MRQ_RESERVED_15 15U
#define MRQ_RESERVED_16 16U
#define MRQ_RESERVED_17 17U
#define MRQ_RESERVED_18 18U
#define MRQ_RESERVED_24 24U
#define MRQ_RESERVED_25 25U
#define MRQ_RESERVED_26 26U
#define MRQ_RESERVED_30 30U
#define MRQ_RESERVED_64 64U
#define MRQ_RESERVED_74 74U
/** @endcond DEPRECATED */
/** @} */ /** @} */
...@@ -167,7 +374,7 @@ struct mrq_response { ...@@ -167,7 +374,7 @@ struct mrq_response {
* @brief Maximum MRQ code to be sent by CPU software to * @brief Maximum MRQ code to be sent by CPU software to
* BPMP. Subject to change in future * BPMP. Subject to change in future
*/ */
#define MAX_CPU_MRQ_ID 75U #define MAX_CPU_MRQ_ID 84U
/** /**
* @addtogroup MRQ_Payloads * @addtogroup MRQ_Payloads
...@@ -183,8 +390,11 @@ struct mrq_response { ...@@ -183,8 +390,11 @@ struct mrq_response {
* @defgroup ABI_info ABI Info * @defgroup ABI_info ABI Info
* @defgroup Powergating Power Gating * @defgroup Powergating Power Gating
* @defgroup Thermal Thermal * @defgroup Thermal Thermal
* @defgroup OC_status OC status
* @defgroup Vhint CPU Voltage hint * @defgroup Vhint CPU Voltage hint
* @defgroup EMC EMC * @defgroup EMC EMC
* @defgroup BWMGR BWMGR
* @defgroup ISO_CLIENT ISO_CLIENT
* @defgroup CPU NDIV Limits * @defgroup CPU NDIV Limits
* @defgroup RingbufConsole Ring Buffer Console * @defgroup RingbufConsole Ring Buffer Console
* @defgroup Strap Straps * @defgroup Strap Straps
...@@ -192,8 +402,11 @@ struct mrq_response { ...@@ -192,8 +402,11 @@ struct mrq_response {
* @defgroup CC3 Auto-CC3 * @defgroup CC3 Auto-CC3
* @defgroup FMON FMON * @defgroup FMON FMON
* @defgroup EC EC * @defgroup EC EC
* @defgroup Fbvolt_status Fuse Burn Voltage Status * @defgroup Telemetry Telemetry
* @} * @defgroup Pwrlimit PWR_LIMIT
* @defgroup Gears Gears
* @defgroup BWMGR_INT Bandwidth Manager Integrated
* @} MRQ_Payloads
*/ */
/** /**
...@@ -304,190 +517,6 @@ struct mrq_query_fw_tag_response { ...@@ -304,190 +517,6 @@ struct mrq_query_fw_tag_response {
uint8_t tag[32]; uint8_t tag[32];
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/**
* @ingroup MRQ_Codes
* @def MRQ_MODULE_LOAD
* @brief Dynamically load a BPMP code module
*
* * Platforms: T210, T210B01, T186
* @cond (bpmp_t210 || bpmp_t210b01 || bpmp_t186)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_module_load_request
* * Response Payload: @ref mrq_module_load_response
*
* @note This MRQ is disabled on production systems
*
*/
/**
* @ingroup Module
* @brief Request with #MRQ_MODULE_LOAD
*
* Used by #MRQ_MODULE_LOAD calls to ask the recipient to dynamically
* load the code located at #phys_addr and having size #size
* bytes. #phys_addr is treated as a void pointer.
*
* The recipient copies the code from #phys_addr to locally allocated
* memory prior to responding to this message.
*
* @todo document the module header format
*
* The sender is responsible for ensuring that the code is mapped in
* the recipient's address map.
*
*/
struct mrq_module_load_request {
/** @brief Base address of the code to load */
uint32_t phys_addr;
/** @brief Size in bytes of code to load */
uint32_t size;
} BPMP_ABI_PACKED;
/**
* @ingroup Module
* @brief Response to #MRQ_MODULE_LOAD
*
* @todo document mrq_response::err
*/
struct mrq_module_load_response {
/** @brief Handle to the loaded module */
uint32_t base;
} BPMP_ABI_PACKED;
/** @endcond*/
/**
* @ingroup MRQ_Codes
* @def MRQ_MODULE_UNLOAD
* @brief Unload a previously loaded code module
*
* * Platforms: T210, T210B01, T186
* @cond (bpmp_t210 || bpmp_t210b01 || bpmp_t186)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_module_unload_request
* * Response Payload: N/A
*
* @note This MRQ is disabled on production systems
*/
/**
* @ingroup Module
* @brief Request with #MRQ_MODULE_UNLOAD
*
* Used by #MRQ_MODULE_UNLOAD calls to request that a previously loaded
* module be unloaded.
*/
struct mrq_module_unload_request {
/** @brief Handle of the module to unload */
uint32_t base;
} BPMP_ABI_PACKED;
/** @endcond*/
/**
* @ingroup MRQ_Codes
* @def MRQ_TRACE_MODIFY
* @brief Modify the set of enabled trace events
*
* @deprecated
*
* * Platforms: All
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_trace_modify_request
* * Response Payload: @ref mrq_trace_modify_response
*
* @note This MRQ is disabled on production systems
*/
/**
* @ingroup Trace
* @brief Request with #MRQ_TRACE_MODIFY
*
* Used by %MRQ_TRACE_MODIFY calls to enable or disable specify trace
* events. #set takes precedence for any bit set in both #set and
* #clr.
*/
struct mrq_trace_modify_request {
/** @brief Bit mask of trace events to disable */
uint32_t clr;
/** @brief Bit mask of trace events to enable */
uint32_t set;
} BPMP_ABI_PACKED;
/**
* @ingroup Trace
* @brief Response to #MRQ_TRACE_MODIFY
*
* Sent in repsonse to an #MRQ_TRACE_MODIFY message. #mask reflects the
* state of which events are enabled after the recipient acted on the
* message.
*
*/
struct mrq_trace_modify_response {
/** @brief Bit mask of trace event enable states */
uint32_t mask;
} BPMP_ABI_PACKED;
/**
* @ingroup MRQ_Codes
* @def MRQ_WRITE_TRACE
* @brief Write trace data to a buffer
*
* @deprecated
*
* * Platforms: All
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_write_trace_request
* * Response Payload: @ref mrq_write_trace_response
*
* mrq_response::err depends on the @ref mrq_write_trace_request field
* values. err is -#BPMP_EINVAL if size is zero or area is NULL or
* area is in an illegal range. A positive value for err indicates the
* number of bytes written to area.
*
* @note This MRQ is disabled on production systems
*/
/**
* @ingroup Trace
* @brief Request with #MRQ_WRITE_TRACE
*
* Used by MRQ_WRITE_TRACE calls to ask the recipient to copy trace
* data from the recipient's local buffer to the output buffer. #area
* is treated as a byte-aligned pointer in the recipient's address
* space.
*
* The sender is responsible for ensuring that the output
* buffer is mapped in the recipient's address map. The recipient is
* responsible for protecting its own code and data from accidental
* overwrites.
*/
struct mrq_write_trace_request {
/** @brief Base address of output buffer */
uint32_t area;
/** @brief Size in bytes of the output buffer */
uint32_t size;
} BPMP_ABI_PACKED;
/**
* @ingroup Trace
* @brief Response to #MRQ_WRITE_TRACE
*
* Once this response is sent, the respondent will not access the
* output buffer further.
*/
struct mrq_write_trace_response {
/**
* @brief Flag whether more data remains in local buffer
*
* Value is 1 if the entire local trace buffer has been
* drained to the outputbuffer. Value is 0 otherwise.
*/
uint32_t eof;
} BPMP_ABI_PACKED;
/** @private */ /** @private */
struct mrq_threaded_ping_request { struct mrq_threaded_ping_request {
uint32_t challenge; uint32_t challenge;
...@@ -498,50 +527,6 @@ struct mrq_threaded_ping_response { ...@@ -498,50 +527,6 @@ struct mrq_threaded_ping_response {
uint32_t reply; uint32_t reply;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/**
* @ingroup MRQ_Codes
* @def MRQ_MODULE_MAIL
* @brief Send a message to a loadable module
*
* * Platforms: T210, T210B01, T186
* @cond (bpmp_t210 || bpmp_t210b01 || bpmp_t186)
* * Initiators: Any
* * Targets: BPMP
* * Request Payload: @ref mrq_module_mail_request
* * Response Payload: @ref mrq_module_mail_response
*
* @note This MRQ is disabled on production systems
*/
/**
* @ingroup Module
* @brief Request with #MRQ_MODULE_MAIL
*/
struct mrq_module_mail_request {
/** @brief Handle to the previously loaded module */
uint32_t base;
/** @brief Module-specific mail payload
*
* The length of data[ ] is unknown to the BPMP core firmware
* but it is limited to the size of an IPC message.
*/
uint8_t data[BPMP_ABI_EMPTY_ARRAY];
} BPMP_ABI_PACKED;
/**
* @ingroup Module
* @brief Response to #MRQ_MODULE_MAIL
*/
struct mrq_module_mail_response {
/** @brief Module-specific mail payload
*
* The length of data[ ] is unknown to the BPMP core firmware
* but it is limited to the size of an IPC message.
*/
uint8_t data[BPMP_ABI_EMPTY_ARRAY];
} BPMP_ABI_PACKED;
/** @endcond */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
* @def MRQ_DEBUGFS * @def MRQ_DEBUGFS
...@@ -686,7 +671,7 @@ struct mrq_debugfs_response { ...@@ -686,7 +671,7 @@ struct mrq_debugfs_response {
#define DEBUGFS_S_ISDIR (1 << 9) #define DEBUGFS_S_ISDIR (1 << 9)
#define DEBUGFS_S_IRUSR (1 << 8) #define DEBUGFS_S_IRUSR (1 << 8)
#define DEBUGFS_S_IWUSR (1 << 7) #define DEBUGFS_S_IWUSR (1 << 7)
/** @} */ /** @} Debugfs */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -931,7 +916,7 @@ enum mrq_reset_commands { ...@@ -931,7 +916,7 @@ enum mrq_reset_commands {
* @brief Request with MRQ_RESET * @brief Request with MRQ_RESET
* *
* Used by the sender of an #MRQ_RESET message to request BPMP to * Used by the sender of an #MRQ_RESET message to request BPMP to
* assert or deassert a given reset line. * assert or or deassert a given reset line.
*/ */
struct mrq_reset_request { struct mrq_reset_request {
/** @brief Reset action to perform (@ref mrq_reset_commands) */ /** @brief Reset action to perform (@ref mrq_reset_commands) */
...@@ -970,7 +955,7 @@ struct mrq_reset_response { ...@@ -970,7 +955,7 @@ struct mrq_reset_response {
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} Reset */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -1032,7 +1017,17 @@ struct serial_i2c_request { ...@@ -1032,7 +1017,17 @@ struct serial_i2c_request {
* @brief Trigger one or more i2c transactions * @brief Trigger one or more i2c transactions
*/ */
struct cmd_i2c_xfer_request { struct cmd_i2c_xfer_request {
/** @brief Valid bus number from @ref bpmp_i2c_ids*/ /**
* @brief Tegra PWR_I2C bus identifier
*
* @cond (bpmp_t234 || bpmp_t239 || bpmp_t194)
* Must be set to 5.
* @endcond (bpmp_t234 || bpmp_t239 || bpmp_t194)
* @cond bpmp_th500
* Must be set to 1.
* @endcond bpmp_th500
*
*/
uint32_t bus_id; uint32_t bus_id;
/** @brief Count of valid bytes in #data_buf*/ /** @brief Count of valid bytes in #data_buf*/
...@@ -1084,7 +1079,7 @@ struct mrq_i2c_response { ...@@ -1084,7 +1079,7 @@ struct mrq_i2c_response {
struct cmd_i2c_xfer_response xfer; struct cmd_i2c_xfer_response xfer;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} I2C */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -1109,6 +1104,13 @@ enum { ...@@ -1109,6 +1104,13 @@ enum {
CMD_CLK_IS_ENABLED = 6, CMD_CLK_IS_ENABLED = 6,
CMD_CLK_ENABLE = 7, CMD_CLK_ENABLE = 7,
CMD_CLK_DISABLE = 8, CMD_CLK_DISABLE = 8,
/** @cond DEPRECATED */
CMD_CLK_PROPERTIES = 9,
CMD_CLK_POSSIBLE_PARENTS = 10,
CMD_CLK_NUM_POSSIBLE_PARENTS = 11,
CMD_CLK_GET_POSSIBLE_PARENT = 12,
CMD_CLK_RESET_REFCOUNTS = 13,
/** @endcond DEPRECATED */
CMD_CLK_GET_ALL_INFO = 14, CMD_CLK_GET_ALL_INFO = 14,
CMD_CLK_GET_MAX_CLK_ID = 15, CMD_CLK_GET_MAX_CLK_ID = 15,
CMD_CLK_GET_FMAX_AT_VMIN = 16, CMD_CLK_GET_FMAX_AT_VMIN = 16,
...@@ -1119,6 +1121,21 @@ enum { ...@@ -1119,6 +1121,21 @@ enum {
#define BPMP_CLK_HAS_SET_RATE (1U << 1U) #define BPMP_CLK_HAS_SET_RATE (1U << 1U)
#define BPMP_CLK_IS_ROOT (1U << 2U) #define BPMP_CLK_IS_ROOT (1U << 2U)
#define BPMP_CLK_IS_VAR_ROOT (1U << 3U) #define BPMP_CLK_IS_VAR_ROOT (1U << 3U)
/**
* @brief Protection against rate and parent changes
*
* #MRQ_CLK command #CMD_CLK_SET_RATE or #MRQ_CLK command #CMD_CLK_SET_PARENT will return
* -#BPMP_EACCES.
*/
#define BPMP_CLK_RATE_PARENT_CHANGE_DENIED (1U << 30)
/**
* @brief Protection against state changes
*
* #MRQ_CLK command #CMD_CLK_ENABLE or #MRQ_CLK command #CMD_CLK_DISABLE will return
* -#BPMP_EACCES.
*/
#define BPMP_CLK_STATE_CHANGE_DENIED (1U << 31)
#define MRQ_CLK_NAME_MAXLEN 40U #define MRQ_CLK_NAME_MAXLEN 40U
#define MRQ_CLK_MAX_PARENTS 16U #define MRQ_CLK_MAX_PARENTS 16U
...@@ -1210,6 +1227,46 @@ struct cmd_clk_disable_response { ...@@ -1210,6 +1227,46 @@ struct cmd_clk_disable_response {
BPMP_ABI_EMPTY BPMP_ABI_EMPTY
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @cond DEPRECATED */
/** @private */
struct cmd_clk_properties_request {
BPMP_ABI_EMPTY
} BPMP_ABI_PACKED;
/** @todo flags need to be spelled out here */
struct cmd_clk_properties_response {
uint32_t flags;
} BPMP_ABI_PACKED;
/** @private */
struct cmd_clk_possible_parents_request {
BPMP_ABI_EMPTY
} BPMP_ABI_PACKED;
struct cmd_clk_possible_parents_response {
uint8_t num_parents;
uint8_t reserved[3];
uint32_t parent_id[MRQ_CLK_MAX_PARENTS];
} BPMP_ABI_PACKED;
/** @private */
struct cmd_clk_num_possible_parents_request {
BPMP_ABI_EMPTY
} BPMP_ABI_PACKED;
struct cmd_clk_num_possible_parents_response {
uint8_t num_parents;
} BPMP_ABI_PACKED;
struct cmd_clk_get_possible_parent_request {
uint8_t parent_idx;
} BPMP_ABI_PACKED;
struct cmd_clk_get_possible_parent_response {
uint32_t parent_id;
} BPMP_ABI_PACKED;
/** @endcond DEPRECATED */
/** @private */ /** @private */
struct cmd_clk_get_all_info_request { struct cmd_clk_get_all_info_request {
BPMP_ABI_EMPTY BPMP_ABI_EMPTY
...@@ -1241,6 +1298,7 @@ struct cmd_clk_get_fmax_at_vmin_response { ...@@ -1241,6 +1298,7 @@ struct cmd_clk_get_fmax_at_vmin_response {
int64_t rate; int64_t rate;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** /**
* @ingroup Clocks * @ingroup Clocks
* @brief Request with #MRQ_CLK * @brief Request with #MRQ_CLK
...@@ -1267,6 +1325,17 @@ struct cmd_clk_get_fmax_at_vmin_response { ...@@ -1267,6 +1325,17 @@ struct cmd_clk_get_fmax_at_vmin_response {
* *
*/ */
/** @cond DEPRECATED
*
* Older versions of firmware also supported following sub-commands:
* |CMD_CLK_PROPERTIES |- |
* |CMD_CLK_POSSIBLE_PARENTS |- |
* |CMD_CLK_NUM_POSSIBLE_PARENTS|- |
* |CMD_CLK_GET_POSSIBLE_PARENT |clk_get_possible_parent|
* |CMD_CLK_RESET_REFCOUNTS |- |
*
* @endcond DEPRECATED */
struct mrq_clk_request { struct mrq_clk_request {
/** @brief Sub-command and clock id concatenated to 32-bit word. /** @brief Sub-command and clock id concatenated to 32-bit word.
* - bits[31..24] is the sub-cmd. * - bits[31..24] is the sub-cmd.
...@@ -1288,6 +1357,15 @@ struct mrq_clk_request { ...@@ -1288,6 +1357,15 @@ struct mrq_clk_request {
struct cmd_clk_disable_request clk_disable; struct cmd_clk_disable_request clk_disable;
/** @private */ /** @private */
struct cmd_clk_is_enabled_request clk_is_enabled; struct cmd_clk_is_enabled_request clk_is_enabled;
/** @cond DEPRECATED */
/** @private */
struct cmd_clk_properties_request clk_properties;
/** @private */
struct cmd_clk_possible_parents_request clk_possible_parents;
/** @private */
struct cmd_clk_num_possible_parents_request clk_num_possible_parents;
struct cmd_clk_get_possible_parent_request clk_get_possible_parent;
/** @endcond DEPRECATED */
/** @private */ /** @private */
struct cmd_clk_get_all_info_request clk_get_all_info; struct cmd_clk_get_all_info_request clk_get_all_info;
/** @private */ /** @private */
...@@ -1321,6 +1399,17 @@ struct mrq_clk_request { ...@@ -1321,6 +1399,17 @@ struct mrq_clk_request {
* *
*/ */
/** @cond DEPRECATED
*
* Older versions of firmware also supported following sub-commands:
* |CMD_CLK_PROPERTIES |clk_properties |
* |CMD_CLK_POSSIBLE_PARENTS |clk_possible_parents |
* |CMD_CLK_NUM_POSSIBLE_PARENTS|clk_num_possible_parents|
* |CMD_CLK_GET_POSSIBLE_PARENT |clk_get_possible_parents|
* |CMD_CLK_RESET_REFCOUNTS |- |
*
* @endcond DEPRECATED */
struct mrq_clk_response { struct mrq_clk_response {
union { union {
struct cmd_clk_get_rate_response clk_get_rate; struct cmd_clk_get_rate_response clk_get_rate;
...@@ -1333,13 +1422,19 @@ struct mrq_clk_response { ...@@ -1333,13 +1422,19 @@ struct mrq_clk_response {
/** @private */ /** @private */
struct cmd_clk_disable_response clk_disable; struct cmd_clk_disable_response clk_disable;
struct cmd_clk_is_enabled_response clk_is_enabled; struct cmd_clk_is_enabled_response clk_is_enabled;
/** @cond DEPRECATED */
struct cmd_clk_properties_response clk_properties;
struct cmd_clk_possible_parents_response clk_possible_parents;
struct cmd_clk_num_possible_parents_response clk_num_possible_parents;
struct cmd_clk_get_possible_parent_response clk_get_possible_parent;
/** @endcond DEPRECATED */
struct cmd_clk_get_all_info_response clk_get_all_info; struct cmd_clk_get_all_info_response clk_get_all_info;
struct cmd_clk_get_max_clk_id_response clk_get_max_clk_id; struct cmd_clk_get_max_clk_id_response clk_get_max_clk_id;
struct cmd_clk_get_fmax_at_vmin_response clk_get_fmax_at_vmin; struct cmd_clk_get_fmax_at_vmin_response clk_get_fmax_at_vmin;
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} Clocks */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -1378,107 +1473,20 @@ struct mrq_query_abi_response { ...@@ -1378,107 +1473,20 @@ struct mrq_query_abi_response {
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** /**
* @ingroup MRQ_Codes
* @def MRQ_PG_READ_STATE
* @brief Read the power-gating state of a partition
*
* * Platforms: T186
* @cond bpmp_t186
* * Initiators: Any
* * Targets: BPMP
* * Request Payload: @ref mrq_pg_read_state_request
* * Response Payload: @ref mrq_pg_read_state_response
*/
/**
* @ingroup Powergating
* @brief Request with #MRQ_PG_READ_STATE
*
* Used by MRQ_PG_READ_STATE call to read the current state of a
* partition.
*/
struct mrq_pg_read_state_request {
/** @brief ID of partition */
uint32_t partition_id;
} BPMP_ABI_PACKED;
/**
* @ingroup Powergating
* @brief Response to MRQ_PG_READ_STATE
* @todo define possible errors.
*/
struct mrq_pg_read_state_response {
/** @brief Read as don't care */
uint32_t sram_state;
/** @brief State of power partition
* * 0 : off
* * 1 : on
*/
uint32_t logic_state;
} BPMP_ABI_PACKED;
/** @endcond*/
/** @} */
/**
* @ingroup MRQ_Codes
* @def MRQ_PG_UPDATE_STATE
* @brief Modify the power-gating state of a partition. In contrast to
* MRQ_PG calls, the operations that change state (on/off) of power
* partition are reference counted.
*
* * Platforms: T186
* @cond bpmp_t186
* * Initiators: Any
* * Targets: BPMP
* * Request Payload: @ref mrq_pg_update_state_request
* * Response Payload: N/A
*/
/**
* @ingroup Powergating
* @brief Request with mrq_pg_update_state_request
* *
* Used by #MRQ_PG_UPDATE_STATE call to request BPMP to change the
* state of a power partition #partition_id.
*/
struct mrq_pg_update_state_request {
/** @brief ID of partition */
uint32_t partition_id;
/** @brief Secondary control of power partition
* @details Ignored by many versions of the BPMP
* firmware. For maximum compatibility, set the value
* according to @ref logic_state
* * 0x1: power ON partition (@ref logic_state == 0x3)
* * 0x3: power OFF partition (@ref logic_state == 0x1)
*/
uint32_t sram_state;
/** @brief Controls state of power partition, legal values are
* * 0x1 : power OFF partition
* * 0x3 : power ON partition
*/
uint32_t logic_state;
/** @brief Change state of clocks of the power partition, legal values
* * 0x0 : do not change clock state
* * 0x1 : disable partition clocks (only applicable when
* @ref logic_state == 0x1)
* * 0x3 : enable partition clocks (only applicable when
* @ref logic_state == 0x3)
*/
uint32_t clock_state;
} BPMP_ABI_PACKED;
/** @endcond*/
/**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
* @def MRQ_PG * @def MRQ_PG
* @brief Control power-gating state of a partition. In contrast to * @brief Control power-gating state of a partition. In contrast to
* MRQ_PG_UPDATE_STATE, operations that change the power partition * MRQ_PG_UPDATE_STATE, operations that change the power partition
* state are NOT reference counted * state are NOT reference counted
* *
* @note BPMP-FW forcefully turns off some partitions as part of SC7 entry * @cond (bpmp_t194 || bpmp_t186)
* because their state cannot be adequately restored on exit. Therefore, * @note On T194 and earlier BPMP-FW forcefully turns off some partitions as
* it is recommended to power off all domains via MRQ_PG prior to SC7 entry. * part of SC7 entry because their state cannot be adequately restored on exit.
* Therefore, it is recommended to power off all domains via MRQ_PG prior to SC7
* entry.
* See @ref bpmp_pdomain_ids for further detail. * See @ref bpmp_pdomain_ids for further detail.
* @endcond (bpmp_t194 || bpmp_t186)
* *
* * Platforms: T186, T194 * * Platforms: T186, T194
* * Initiators: Any * * Initiators: Any
...@@ -1643,7 +1651,7 @@ struct mrq_pg_response { ...@@ -1643,7 +1651,7 @@ struct mrq_pg_response {
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} Powergating */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -1889,7 +1897,44 @@ union mrq_thermal_bpmp_to_host_response { ...@@ -1889,7 +1897,44 @@ union mrq_thermal_bpmp_to_host_response {
struct cmd_thermal_get_thermtrip_response get_thermtrip; struct cmd_thermal_get_thermtrip_response get_thermtrip;
struct cmd_thermal_get_num_zones_response get_num_zones; struct cmd_thermal_get_num_zones_response get_num_zones;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */
/** @} Thermal */
/**
* @ingroup MRQ_Codes
* @def MRQ_OC_STATUS
* @brief Query over current status
*
* * Platforms: T234
* @cond bpmp_t234
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: N/A
* * Response Payload: @ref mrq_oc_status_response
*
* @addtogroup OC_status
* @{
*/
#define OC_STATUS_MAX_SIZE 24U
/*
* @brief Response to #MRQ_OC_STATUS
*
* throt_en: Value for each OC alarm where zero signifies throttle is
* disabled, and non-zero throttle is enabled.
* event_cnt: Total number of OC events for each OC alarm.
*
* mrq_response::err is 0 if the operation was successful and
* -#BPMP_ENODEV otherwise.
*/
struct mrq_oc_status_response {
uint8_t throt_en[OC_STATUS_MAX_SIZE];
uint32_t event_cnt[OC_STATUS_MAX_SIZE];
} BPMP_ABI_PACKED;
/** @} OC_status */
/** @endcond bpmp_t234 */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -1948,8 +1993,9 @@ struct cpu_vhint_data { ...@@ -1948,8 +1993,9 @@ struct cpu_vhint_data {
/** reserved for future use */ /** reserved for future use */
uint16_t reserved[328]; uint16_t reserved[328];
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @endcond */
/** @} */ /** @} Vhint */
/** @endcond bpmp_t186 */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2016,14 +2062,15 @@ struct mrq_abi_ratchet_response { ...@@ -2016,14 +2062,15 @@ struct mrq_abi_ratchet_response {
/** @brief BPMP's ratchet value */ /** @brief BPMP's ratchet value */
uint16_t ratchet; uint16_t ratchet;
}; };
/** @} */
/** @} ABI_info */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
* @def MRQ_EMC_DVFS_LATENCY * @def MRQ_EMC_DVFS_LATENCY
* @brief Query frequency dependent EMC DVFS latency * @brief Query frequency dependent EMC DVFS latency
* *
* * Platforms: T186, T194 * * Platforms: T186, T194, T234
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
* * Request Payload: N/A * * Request Payload: N/A
...@@ -2053,28 +2100,564 @@ struct mrq_emc_dvfs_latency_response { ...@@ -2053,28 +2100,564 @@ struct mrq_emc_dvfs_latency_response {
struct emc_dvfs_latency pairs[EMC_DVFS_LATENCY_MAX_SIZE]; struct emc_dvfs_latency pairs[EMC_DVFS_LATENCY_MAX_SIZE];
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} EMC */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
* @def MRQ_CPU_NDIV_LIMITS * @def MRQ_EMC_DVFS_EMCHUB
* @brief CPU freq. limits in ndiv * @brief Query EMC HUB frequencies
* *
* * Platforms: T194 onwards * * Platforms: T234 onwards
* @cond bpmp_t194 * @cond (bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
* * Request Payload: @ref mrq_cpu_ndiv_limits_request * * Request Payload: N/A
* * Response Payload: @ref mrq_cpu_ndiv_limits_response * * Response Payload: @ref mrq_emc_dvfs_emchub_response
* @addtogroup CPU * @addtogroup EMC
* @{ * @{
*/ */
/** /**
* @brief Request for ndiv limits of a cluster * @brief Used by @ref mrq_emc_dvfs_emchub_response
*/ */
struct mrq_cpu_ndiv_limits_request { struct emc_dvfs_emchub {
/** @brief Enum cluster_id */ /** @brief EMC DVFS node frequency in kHz */
uint32_t freq;
/** @brief EMC HUB frequency in kHz */
uint32_t hub_freq;
} BPMP_ABI_PACKED;
#define EMC_DVFS_EMCHUB_MAX_SIZE EMC_DVFS_LATENCY_MAX_SIZE
/**
* @brief Response to #MRQ_EMC_DVFS_EMCHUB
*/
struct mrq_emc_dvfs_emchub_response {
/** @brief The number valid entries in #pairs */
uint32_t num_pairs;
/** @brief EMC DVFS node <frequency, hub frequency> information */
struct emc_dvfs_emchub pairs[EMC_DVFS_EMCHUB_MAX_SIZE];
} BPMP_ABI_PACKED;
/** @} EMC */
/** @endcond (bpmp_t234 || bpmp_t239 || bpmp_th500) */
/**
* @ingroup MRQ_Codes
* @def MRQ_EMC_DISP_RFL
* @brief Set EMC display RFL handshake mode of operations
*
* * Platforms: T234 onwards
* @cond (bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_emc_disp_rfl_request
* * Response Payload: N/A
*
* @addtogroup EMC
* @{
*/
enum mrq_emc_disp_rfl_mode {
/** @brief EMC display RFL handshake disabled */
EMC_DISP_RFL_MODE_DISABLED = 0,
/** @brief EMC display RFL handshake enabled */
EMC_DISP_RFL_MODE_ENABLED = 1,
};
/**
* @ingroup EMC
* @brief Request with #MRQ_EMC_DISP_RFL
*
* Used by the sender of an #MRQ_EMC_DISP_RFL message to
* request the mode of EMC display RFL handshake.
*
* mrq_response::err is
* * 0: RFL mode is set successfully
* * -#BPMP_EINVAL: invalid mode requested
* * -#BPMP_ENOSYS: RFL handshake is not supported
* * -#BPMP_EACCES: Permission denied
* * -#BPMP_ENODEV: if disp rfl mrq is not supported by BPMP-FW
*/
struct mrq_emc_disp_rfl_request {
/** @brief EMC display RFL mode (@ref mrq_emc_disp_rfl_mode) */
uint32_t mode;
} BPMP_ABI_PACKED;
/** @} EMC */
/** @endcond (bpmp_t234 || bpmp_t239 || bpmp_th500) */
/**
* @ingroup MRQ_Codes
* @def MRQ_BWMGR
* @brief bwmgr requests
*
* * Platforms: T234 onwards
* @cond (bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_bwmgr_request
* * Response Payload: @ref mrq_bwmgr_response
*
* @addtogroup BWMGR
*
* @{
*/
enum mrq_bwmgr_cmd {
/**
* @brief Check whether the BPMP driver supports the specified
* request type
*
* mrq_response::err is 0 if the specified request is
* supported and -#BPMP_ENODEV otherwise.
*/
CMD_BWMGR_QUERY_ABI = 0,
/**
* @brief Determine dram rate to satisfy iso/niso bw requests
*
* mrq_response::err is
* * 0: calc_rate succeeded.
* * -#BPMP_EINVAL: Invalid request parameters.
* * -#BPMP_ENOTSUP: Requested bw is not available.
*/
CMD_BWMGR_CALC_RATE = 1
};
/*
* request data for request type CMD_BWMGR_QUERY_ABI
*
* type: Request type for which to check existence.
*/
struct cmd_bwmgr_query_abi_request {
uint32_t type;
} BPMP_ABI_PACKED;
/**
* @brief Used by @ref cmd_bwmgr_calc_rate_request
*/
struct iso_req {
/* @brief bwmgr client ID @ref bpmp_bwmgr_ids */
uint32_t id;
/* @brief bw in kBps requested by client */
uint32_t iso_bw;
} BPMP_ABI_PACKED;
#define MAX_ISO_CLIENTS 13U
/*
* request data for request type CMD_BWMGR_CALC_RATE
*/
struct cmd_bwmgr_calc_rate_request {
/* @brief total bw in kBps requested by all niso clients */
uint32_t sum_niso_bw;
/* @brief The number of iso clients */
uint32_t num_iso_clients;
/* @brief iso_req <id, iso_bw> information */
struct iso_req isobw_reqs[MAX_ISO_CLIENTS];
} BPMP_ABI_PACKED;
/*
* response data for request type CMD_BWMGR_CALC_RATE
*
* iso_rate_min: min dram data clk rate in kHz to satisfy all iso bw reqs
* total_rate_min: min dram data clk rate in kHz to satisfy all bw reqs
*/
struct cmd_bwmgr_calc_rate_response {
uint32_t iso_rate_min;
uint32_t total_rate_min;
} BPMP_ABI_PACKED;
/*
* @brief Request with #MRQ_BWMGR
*
*
* |sub-command |payload |
* |----------------------------|------------------------------|
* |CMD_BWMGR_QUERY_ABI | cmd_bwmgr_query_abi_request |
* |CMD_BWMGR_CALC_RATE | cmd_bwmgr_calc_rate_request |
*
*/
struct mrq_bwmgr_request {
uint32_t cmd;
union {
struct cmd_bwmgr_query_abi_request query_abi;
struct cmd_bwmgr_calc_rate_request bwmgr_rate_req;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/*
* @brief Response to MRQ_BWMGR
*
* |sub-command |payload |
* |----------------------------|------------------------------|
* |CMD_BWMGR_CALC_RATE | cmd_bwmgr_calc_rate_response |
*/
struct mrq_bwmgr_response {
union {
struct cmd_bwmgr_calc_rate_response bwmgr_rate_resp;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/** @} BWMGR */
/** @endcond (bpmp_t234 || bpmp_t239 || bpmp_th500) */
/**
* @ingroup MRQ_Codes
* @def MRQ_BWMGR_INT
* @brief bpmp-integrated bwmgr requests
*
* * Platforms: T234 onwards
* @cond (bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_bwmgr_int_request
* * Response Payload: @ref mrq_bwmgr_int_response
*
* @addtogroup BWMGR_INT
* @{
*/
enum mrq_bwmgr_int_cmd {
/**
* @brief Check whether the BPMP-FW supports the specified
* request type
*
* mrq_response::err is 0 if the specified request is
* supported and -#BPMP_ENODEV otherwise.
*/
CMD_BWMGR_INT_QUERY_ABI = 1,
/**
* @brief Determine and set dram rate to satisfy iso/niso bw request
*
* mrq_response::err is
* * 0: request succeeded.
* * -#BPMP_EINVAL: Invalid request parameters.
* set_frequency in @ref cmd_bwmgr_int_calc_and_set_response
* will not be set.
* * -#BPMP_ENOTSUP: Requested bw is not available.
* set_frequency in @ref cmd_bwmgr_int_calc_and_set_response
* will be current dram-clk rate.
*/
CMD_BWMGR_INT_CALC_AND_SET = 2,
/**
* @brief Set a max DRAM frequency for the bandwidth-manager
*
* mrq_response::err is
* * 0: request succeeded.
* * -#BPMP_ENOTSUP: Requested cap frequency is not possible.
*/
CMD_BWMGR_INT_CAP_SET = 3
};
/*
* request structure for request type CMD_BWMGR_QUERY_ABI
*
* type: Request type for which to check existence.
*/
struct cmd_bwmgr_int_query_abi_request {
/* @brief request type determined by @ref mrq_bwmgr_int_cmd */
uint32_t type;
} BPMP_ABI_PACKED;
/**
* @defgroup bwmgr_int_unit_type BWMGR_INT floor unit-types
* @addtogroup bwmgr_int_unit_type
* @{
*/
/** @brief kilobytes per second unit-type */
#define BWMGR_INT_UNIT_KBPS 0U
/** @brief kilohertz unit-type */
#define BWMGR_INT_UNIT_KHZ 1U
/** @} bwmgr_int_unit_type */
/*
* request data for request type CMD_BWMGR_INT_CALC_AND_SET
*/
struct cmd_bwmgr_int_calc_and_set_request {
/* @brief bwmgr client ID @ref bpmp_bwmgr_ids */
uint32_t client_id;
/* @brief average niso bw usage in kBps requested by client. */
uint32_t niso_bw;
/*
* @brief average iso bw usage in kBps requested by client.
* Value is ignored if client is niso. Determined by client_id.
*/
uint32_t iso_bw;
/*
* @brief memory clock floor requested by client.
* Unit determined by floor_unit.
*/
uint32_t mc_floor;
/*
* @brief toggle to determine the unit-type of floor value.
* See @ref bwmgr_int_unit_type definitions for unit-type mappings.
*/
uint8_t floor_unit;
} BPMP_ABI_PACKED;
struct cmd_bwmgr_int_cap_set_request {
/* @brief requested cap frequency in Hz. */
uint64_t rate;
} BPMP_ABI_PACKED;
/*
* response data for request type CMD_BWMGR_CALC_AND_SET
*/
struct cmd_bwmgr_int_calc_and_set_response {
/* @brief current set memory clock frequency in Hz */
uint64_t rate;
} BPMP_ABI_PACKED;
/*
* @brief Request with #MRQ_BWMGR_INT
*
*
* |sub-command |payload |
* |----------------------------|-----------------------------------|
* |CMD_BWMGR_INT_QUERY_ABI | cmd_bwmgr_int_query_abi_request |
* |CMD_BWMGR_INT_CALC_AND_SET | cmd_bwmgr_int_calc_and_set_request|
* |CMD_BWMGR_INT_CAP_SET | cmd_bwmgr_int_cap_set_request |
*
*/
struct mrq_bwmgr_int_request {
uint32_t cmd;
union {
struct cmd_bwmgr_int_query_abi_request query_abi;
struct cmd_bwmgr_int_calc_and_set_request bwmgr_calc_set_req;
struct cmd_bwmgr_int_cap_set_request bwmgr_cap_set_req;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/*
* @brief Response to MRQ_BWMGR_INT
*
* |sub-command |payload |
* |----------------------------|---------------------------------------|
* |CMD_BWMGR_INT_CALC_AND_SET | cmd_bwmgr_int_calc_and_set_response |
*/
struct mrq_bwmgr_int_response {
union {
struct cmd_bwmgr_int_calc_and_set_response bwmgr_calc_set_resp;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/** @} BWMGR_INT */
/** @endcond (bpmp_t234 || bpmp_t239 || bpmp_th500) */
/**
* @ingroup MRQ_Codes
* @def MRQ_ISO_CLIENT
* @brief ISO client requests
*
* * Platforms: T234 onwards
* @cond (bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_iso_client_request
* * Response Payload: @ref mrq_iso_client_response
*
* @addtogroup ISO_CLIENT
* @{
*/
enum mrq_iso_client_cmd {
/**
* @brief Check whether the BPMP driver supports the specified
* request type
*
* mrq_response::err is 0 if the specified request is
* supported and -#BPMP_ENODEV otherwise.
*/
CMD_ISO_CLIENT_QUERY_ABI = 0,
/*
* @brief check for legal LA for the iso client. Without programming
* LA MC registers, calculate and ensure that legal LA is possible for
* iso bw requested by the ISO client.
*
* mrq_response::err is
* * 0: check la succeeded.
* * -#BPMP_EINVAL: Invalid request parameters.
* * -#BPMP_EFAULT: Legal LA is not possible for client requested iso_bw
*/
CMD_ISO_CLIENT_CALCULATE_LA = 1,
/*
* @brief set LA for the iso client. Calculate and program the LA/PTSA
* MC registers corresponding to the client making bw request
*
* mrq_response::err is
* * 0: set la succeeded.
* * -#BPMP_EINVAL: Invalid request parameters.
* * -#BPMP_EFAULT: Failed to calculate or program MC registers.
*/
CMD_ISO_CLIENT_SET_LA = 2,
/*
* @brief Get max possible bw for iso client
*
* mrq_response::err is
* * 0: get_max_bw succeeded.
* * -#BPMP_EINVAL: Invalid request parameters.
*/
CMD_ISO_CLIENT_GET_MAX_BW = 3
};
/*
* request data for request type CMD_ISO_CLIENT_QUERY_ABI
*
* type: Request type for which to check existence.
*/
struct cmd_iso_client_query_abi_request {
uint32_t type;
} BPMP_ABI_PACKED;
/*
* request data for request type CMD_ISO_CLIENT_CALCULATE_LA
*
* id: client ID in @ref bpmp_bwmgr_ids
* bw: bw requested in kBps by client ID.
* init_bw_floor: initial dram_bw_floor in kBps passed by client ID.
* ISO client will perform mempool allocation and DVFS buffering based
* on this dram_bw_floor.
*/
struct cmd_iso_client_calculate_la_request {
uint32_t id;
uint32_t bw;
uint32_t init_bw_floor;
} BPMP_ABI_PACKED;
/*
* request data for request type CMD_ISO_CLIENT_SET_LA
*
* id: client ID in @ref bpmp_bwmgr_ids
* bw: bw requested in kBps by client ID.
* final_bw_floor: final dram_bw_floor in kBps.
* Sometimes the initial dram_bw_floor passed by ISO client may need to be
* updated by considering higher dram freq's. This is the final dram_bw_floor
* used to calculate and program MC registers.
*/
struct cmd_iso_client_set_la_request {
uint32_t id;
uint32_t bw;
uint32_t final_bw_floor;
} BPMP_ABI_PACKED;
/*
* request data for request type CMD_ISO_CLIENT_GET_MAX_BW
*
* id: client ID in @ref bpmp_bwmgr_ids
*/
struct cmd_iso_client_get_max_bw_request {
uint32_t id;
} BPMP_ABI_PACKED;
/*
* response data for request type CMD_ISO_CLIENT_CALCULATE_LA
*
* la_rate_floor: minimum dram_rate_floor in kHz at which a legal la is possible
* iso_client_only_rate: Minimum dram freq in kHz required to satisfy this clients
* iso bw request, assuming all other iso clients are inactive
*/
struct cmd_iso_client_calculate_la_response {
uint32_t la_rate_floor;
uint32_t iso_client_only_rate;
} BPMP_ABI_PACKED;
/**
* @brief Used by @ref cmd_iso_client_get_max_bw_response
*/
struct iso_max_bw {
/* @brief dram frequency in kHz */
uint32_t freq;
/* @brief max possible iso-bw in kBps */
uint32_t iso_bw;
} BPMP_ABI_PACKED;
#define ISO_MAX_BW_MAX_SIZE 14U
/*
* response data for request type CMD_ISO_CLIENT_GET_MAX_BW
*/
struct cmd_iso_client_get_max_bw_response {
/* @brief The number valid entries in iso_max_bw pairs */
uint32_t num_pairs;
/* @brief max ISOBW <dram freq, max bw> information */
struct iso_max_bw pairs[ISO_MAX_BW_MAX_SIZE];
} BPMP_ABI_PACKED;
/**
* @brief Request with #MRQ_ISO_CLIENT
*
* Used by the sender of an #MRQ_ISO_CLIENT message.
*
* |sub-command |payload |
* |------------------------------------ |----------------------------------------|
* |CMD_ISO_CLIENT_QUERY_ABI |cmd_iso_client_query_abi_request |
* |CMD_ISO_CLIENT_CALCULATE_LA |cmd_iso_client_calculate_la_request |
* |CMD_ISO_CLIENT_SET_LA |cmd_iso_client_set_la_request |
* |CMD_ISO_CLIENT_GET_MAX_BW |cmd_iso_client_get_max_bw_request |
*
*/
struct mrq_iso_client_request {
/* Type of request. Values listed in enum mrq_iso_client_cmd */
uint32_t cmd;
union {
struct cmd_iso_client_query_abi_request query_abi;
struct cmd_iso_client_calculate_la_request calculate_la_req;
struct cmd_iso_client_set_la_request set_la_req;
struct cmd_iso_client_get_max_bw_request max_isobw_req;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/**
* @brief Response to MRQ_ISO_CLIENT
*
* Each sub-command supported by @ref mrq_iso_client_request may return
* sub-command-specific data. Some do and some do not as indicated in
* the following table
*
* |sub-command |payload |
* |---------------------------- |------------------------------------|
* |CMD_ISO_CLIENT_CALCULATE_LA |cmd_iso_client_calculate_la_response|
* |CMD_ISO_CLIENT_SET_LA |N/A |
* |CMD_ISO_CLIENT_GET_MAX_BW |cmd_iso_client_get_max_bw_response |
*
*/
struct mrq_iso_client_response {
union {
struct cmd_iso_client_calculate_la_response calculate_la_resp;
struct cmd_iso_client_get_max_bw_response max_isobw_resp;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/** @} ISO_CLIENT */
/** @endcond (bpmp_t234 || bpmp_t239 || bpmp_th500) */
/**
* @ingroup MRQ_Codes
* @def MRQ_CPU_NDIV_LIMITS
* @brief CPU freq. limits in ndiv
*
* * Platforms: T194 onwards
* @cond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: @ref mrq_cpu_ndiv_limits_request
* * Response Payload: @ref mrq_cpu_ndiv_limits_response
* @addtogroup CPU
* @{
*/
/**
* @brief Request for ndiv limits of a cluster
*/
struct mrq_cpu_ndiv_limits_request {
/** @brief Enum cluster_id */
uint32_t cluster_id; uint32_t cluster_id;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
...@@ -2094,15 +2677,15 @@ struct mrq_cpu_ndiv_limits_response { ...@@ -2094,15 +2677,15 @@ struct mrq_cpu_ndiv_limits_response {
uint16_t ndiv_min; uint16_t ndiv_min;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} CPU */
/** @endcond */ /** @endcond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500) */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
* @def MRQ_CPU_AUTO_CC3 * @def MRQ_CPU_AUTO_CC3
* @brief Query CPU cluster auto-CC3 configuration * @brief Query CPU cluster auto-CC3 configuration
* *
* * Platforms: T194 onwards * * Platforms: T194
* @cond bpmp_t194 * @cond bpmp_t194
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
...@@ -2140,40 +2723,8 @@ struct mrq_cpu_auto_cc3_response { ...@@ -2140,40 +2723,8 @@ struct mrq_cpu_auto_cc3_response {
uint32_t auto_cc3_config; uint32_t auto_cc3_config;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} CC3 */
/** @endcond */ /** @endcond bpmp_t194 */
/**
* @ingroup MRQ_Codes
* @def MRQ_TRACE_ITER
* @brief Manage the trace iterator
*
* @deprecated
*
* * Platforms: All
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: N/A
* * Response Payload: @ref mrq_trace_iter_request
* @addtogroup Trace
* @{
*/
enum {
/** @brief (re)start the tracing now. Ignore older events */
TRACE_ITER_INIT = 0,
/** @brief Clobber all events in the trace buffer */
TRACE_ITER_CLEAN = 1
};
/**
* @brief Request with #MRQ_TRACE_ITER
*/
struct mrq_trace_iter_request {
/** @brief TRACE_ITER_INIT or TRACE_ITER_CLEAN */
uint32_t cmd;
} BPMP_ABI_PACKED;
/** @} */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2351,7 +2902,8 @@ union mrq_ringbuf_console_bpmp_to_host_response { ...@@ -2351,7 +2902,8 @@ union mrq_ringbuf_console_bpmp_to_host_response {
struct cmd_ringbuf_console_write_resp write; struct cmd_ringbuf_console_write_resp write;
struct cmd_ringbuf_console_get_fifo_resp get_fifo; struct cmd_ringbuf_console_get_fifo_resp get_fifo;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */
/** @} RingbufConsole */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2359,7 +2911,7 @@ union mrq_ringbuf_console_bpmp_to_host_response { ...@@ -2359,7 +2911,7 @@ union mrq_ringbuf_console_bpmp_to_host_response {
* @brief Set a strap value controlled by BPMP * @brief Set a strap value controlled by BPMP
* *
* * Platforms: T194 onwards * * Platforms: T194 onwards
* @cond bpmp_t194 * @cond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
* * Request Payload: @ref mrq_strap_request * * Request Payload: @ref mrq_strap_request
...@@ -2390,17 +2942,14 @@ enum mrq_strap_cmd { ...@@ -2390,17 +2942,14 @@ enum mrq_strap_cmd {
struct mrq_strap_request { struct mrq_strap_request {
/** @brief @ref mrq_strap_cmd */ /** @brief @ref mrq_strap_cmd */
uint32_t cmd; uint32_t cmd;
/** @brief Strap ID from @ref Strap_Ids */ /** @brief Strap ID from @ref Strap_Identifiers */
uint32_t id; uint32_t id;
/** @brief Desired value for strap (if cmd is #STRAP_SET) */ /** @brief Desired value for strap (if cmd is #STRAP_SET) */
uint32_t value; uint32_t value;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** /** @} Strap */
* @defgroup Strap_Ids Strap Identifiers /** @endcond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500) */
* @}
*/
/** @endcond */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2408,7 +2957,7 @@ struct mrq_strap_request { ...@@ -2408,7 +2957,7 @@ struct mrq_strap_request {
* @brief Perform a UPHY operation * @brief Perform a UPHY operation
* *
* * Platforms: T194 onwards * * Platforms: T194 onwards
* @cond bpmp_t194 * @cond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
* * Request Payload: @ref mrq_uphy_request * * Request Payload: @ref mrq_uphy_request
...@@ -2423,6 +2972,9 @@ enum { ...@@ -2423,6 +2972,9 @@ enum {
CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT = 3, CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT = 3,
CMD_UPHY_PCIE_CONTROLLER_STATE = 4, CMD_UPHY_PCIE_CONTROLLER_STATE = 4,
CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF = 5, CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF = 5,
CMD_UPHY_DISPLAY_PORT_INIT = 6,
CMD_UPHY_DISPLAY_PORT_OFF = 7,
CMD_UPHY_XUSB_DYN_LANES_RESTORE = 8,
CMD_UPHY_MAX, CMD_UPHY_MAX,
}; };
...@@ -2445,28 +2997,41 @@ struct cmd_uphy_margin_status_response { ...@@ -2445,28 +2997,41 @@ struct cmd_uphy_margin_status_response {
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
struct cmd_uphy_ep_controller_pll_init_request { struct cmd_uphy_ep_controller_pll_init_request {
/** @brief EP controller number, valid: 0, 4, 5 */ /** @brief EP controller number, T194 valid: 0, 4, 5; T234 valid: 5, 6, 7, 10; T239 valid: 0 */
uint8_t ep_controller; uint8_t ep_controller;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
struct cmd_uphy_pcie_controller_state_request { struct cmd_uphy_pcie_controller_state_request {
/** @brief PCIE controller number, valid: 0, 1, 2, 3, 4 */ /** @brief PCIE controller number, T194 valid: 0-4; T234 valid: 0-10; T239 valid: 0-3 */
uint8_t pcie_controller; uint8_t pcie_controller;
uint8_t enable; uint8_t enable;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
struct cmd_uphy_ep_controller_pll_off_request { struct cmd_uphy_ep_controller_pll_off_request {
/** @brief EP controller number, valid: 0, 4, 5 */ /** @brief EP controller number, T194 valid: 0, 4, 5; T234 valid: 5, 6, 7, 10; T239 valid: 0 */
uint8_t ep_controller; uint8_t ep_controller;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
struct cmd_uphy_display_port_init_request {
/** @brief DisplayPort link rate, T239 valid: 1620, 2700, 5400, 8100, 2160, 2430, 3240, 4320, 6750 */
uint16_t link_rate;
/** @brief 1: lane 0; 2: lane 1; 3: lane 0 and 1 */
uint16_t lanes_bitmap;
} BPMP_ABI_PACKED;
struct cmd_uphy_xusb_dyn_lanes_restore_request {
/** @brief 1: lane 0; 2: lane 1; 3: lane 0 and 1 */
uint16_t lanes_bitmap;
} BPMP_ABI_PACKED;
/** /**
* @ingroup UPHY * @ingroup UPHY
* @brief Request with #MRQ_UPHY * @brief Request with #MRQ_UPHY
* *
* Used by the sender of an #MRQ_UPHY message to control UPHY Lane RX margining. * Used by the sender of an #MRQ_UPHY message to control UPHY.
* The uphy_request is split into several sub-commands. Some sub-commands * The uphy_request is split into several sub-commands. CMD_UPHY_PCIE_LANE_MARGIN_STATUS
* require no additional data. Others have a sub-command specific payload * requires no additional data. Others have a sub-command specific payload. Below table
* shows sub-commands with their corresponding payload data.
* *
* |sub-command |payload | * |sub-command |payload |
* |------------------------------------ |----------------------------------------| * |------------------------------------ |----------------------------------------|
...@@ -2475,6 +3040,9 @@ struct cmd_uphy_ep_controller_pll_off_request { ...@@ -2475,6 +3040,9 @@ struct cmd_uphy_ep_controller_pll_off_request {
* |CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT |cmd_uphy_ep_controller_pll_init_request | * |CMD_UPHY_PCIE_EP_CONTROLLER_PLL_INIT |cmd_uphy_ep_controller_pll_init_request |
* |CMD_UPHY_PCIE_CONTROLLER_STATE |cmd_uphy_pcie_controller_state_request | * |CMD_UPHY_PCIE_CONTROLLER_STATE |cmd_uphy_pcie_controller_state_request |
* |CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF |cmd_uphy_ep_controller_pll_off_request | * |CMD_UPHY_PCIE_EP_CONTROLLER_PLL_OFF |cmd_uphy_ep_controller_pll_off_request |
* |CMD_UPHY_PCIE_DISPLAY_PORT_INIT |cmd_uphy_display_port_init_request |
* |CMD_UPHY_PCIE_DISPLAY_PORT_OFF | |
* |CMD_UPHY_XUSB_DYN_LANES_RESTORE |cmd_uphy_xusb_dyn_lanes_restore_request |
* *
*/ */
...@@ -2489,6 +3057,8 @@ struct mrq_uphy_request { ...@@ -2489,6 +3057,8 @@ struct mrq_uphy_request {
struct cmd_uphy_ep_controller_pll_init_request ep_ctrlr_pll_init; struct cmd_uphy_ep_controller_pll_init_request ep_ctrlr_pll_init;
struct cmd_uphy_pcie_controller_state_request controller_state; struct cmd_uphy_pcie_controller_state_request controller_state;
struct cmd_uphy_ep_controller_pll_off_request ep_ctrlr_pll_off; struct cmd_uphy_ep_controller_pll_off_request ep_ctrlr_pll_off;
struct cmd_uphy_display_port_init_request display_port_init;
struct cmd_uphy_xusb_dyn_lanes_restore_request xusb_dyn_lanes_restore;
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
...@@ -2513,8 +3083,8 @@ struct mrq_uphy_response { ...@@ -2513,8 +3083,8 @@ struct mrq_uphy_response {
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @} UPHY */
/** @endcond */ /** @endcond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500) */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2522,14 +3092,16 @@ struct mrq_uphy_response { ...@@ -2522,14 +3092,16 @@ struct mrq_uphy_response {
* @brief Perform a frequency monitor configuration operations * @brief Perform a frequency monitor configuration operations
* *
* * Platforms: T194 onwards * * Platforms: T194 onwards
* @cond bpmp_t194 * @cond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500)
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
* * Request Payload: @ref mrq_fmon_request * * Request Payload: @ref mrq_fmon_request
* * Response Payload: @ref mrq_fmon_response * * Response Payload: @ref mrq_fmon_response
* @endcond (bpmp_t194 || bpmp_t234 || bpmp_t239 || bpmp_th500)
* *
* @addtogroup FMON * @addtogroup FMON
* @{ * @{
* @cond (bpmp_t194 || bpmp_t234)
*/ */
enum { enum {
/** /**
...@@ -2538,6 +3110,20 @@ enum { ...@@ -2538,6 +3110,20 @@ enum {
* The monitored clock must be running for clamp to succeed. If * The monitored clock must be running for clamp to succeed. If
* clamped, FMON configuration is preserved when clock rate * clamped, FMON configuration is preserved when clock rate
* and/or state is changed. * and/or state is changed.
*
* mrq_response::err is 0 if the operation was successful, or @n
* -#BPMP_EACCES: FMON access error @n
* -#BPMP_EBADCMD if subcommand is not supported @n
* -#BPMP_EBADSLT: clamp FMON on cluster with auto-CC3 enabled @n
* -#BPMP_EBUSY: fmon is already clamped at different rate @n
* -#BPMP_EFAULT: self-diagnostic error @n
* -#BPMP_EINVAL: invalid FMON configuration @n
* -#BPMP_EOPNOTSUPP: not in production mode @n
* -#BPMP_ENODEV: invalid clk_id @n
* -#BPMP_ENOENT: no calibration data, uninitialized @n
* -#BPMP_ENOTSUP: avfs config not set @n
* -#BPMP_ENOSYS: clamp FMON on cluster clock w/ no NAFLL @n
* -#BPMP_ETIMEDOUT: operation timed out @n
*/ */
CMD_FMON_GEAR_CLAMP = 1, CMD_FMON_GEAR_CLAMP = 1,
/** /**
...@@ -2545,6 +3131,13 @@ enum { ...@@ -2545,6 +3131,13 @@ enum {
* *
* Allow FMON configuration to follow monitored clock rate * Allow FMON configuration to follow monitored clock rate
* and/or state changes. * and/or state changes.
*
* mrq_response::err is 0 if the operation was successful, or @n
* -#BPMP_EBADCMD if subcommand is not supported @n
* -#BPMP_ENODEV: invalid clk_id @n
* -#BPMP_ENOENT: no calibration data, uninitialized @n
* -#BPMP_ENOTSUP: avfs config not set @n
* -#BPMP_EOPNOTSUPP: not in production mode @n
*/ */
CMD_FMON_GEAR_FREE = 2, CMD_FMON_GEAR_FREE = 2,
/** /**
...@@ -2553,11 +3146,54 @@ enum { ...@@ -2553,11 +3146,54 @@ enum {
* *
* Inherently racy, since clamp state can be changed * Inherently racy, since clamp state can be changed
* concurrently. Useful for testing. * concurrently. Useful for testing.
*
* mrq_response::err is 0 if the operation was successful, or @n
* -#BPMP_EBADCMD if subcommand is not supported @n
* -#BPMP_ENODEV: invalid clk_id @n
* -#BPMP_ENOENT: no calibration data, uninitialized @n
* -#BPMP_ENOTSUP: avfs config not set @n
* -#BPMP_EOPNOTSUPP: not in production mode @n
*/ */
CMD_FMON_GEAR_GET = 3, CMD_FMON_GEAR_GET = 3,
CMD_FMON_NUM, /**
* @brief Return current status of FMON faults detected by FMON
* h/w or s/w since last invocation of this command.
* Clears fault status.
*
* mrq_response::err is 0 if the operation was successful, or @n
* -#BPMP_EBADCMD if subcommand is not supported @n
* -#BPMP_EINVAL: invalid fault type @n
* -#BPMP_ENODEV: invalid clk_id @n
* -#BPMP_ENOENT: no calibration data, uninitialized @n
* -#BPMP_ENOTSUP: avfs config not set @n
* -#BPMP_EOPNOTSUPP: not in production mode @n
*/
CMD_FMON_FAULT_STS_GET = 4,
}; };
/**
* @cond DEPRECATED
* Kept for backward compatibility
*/
#define CMD_FMON_NUM 4
/** @endcond DEPRECATED */
/**
* @defgroup fmon_fault_type FMON fault type
* @addtogroup fmon_fault_type
* @{
*/
/** @brief All detected FMON faults (h/w or s/w) */
#define FMON_FAULT_TYPE_ALL 0U
/** @brief FMON faults detected by h/w */
#define FMON_FAULT_TYPE_HW 1U
/** @brief FMON faults detected by s/w */
#define FMON_FAULT_TYPE_SW 2U
/** @} fmon_fault_type */
struct cmd_fmon_gear_clamp_request { struct cmd_fmon_gear_clamp_request {
int32_t unused; int32_t unused;
int64_t rate; int64_t rate;
...@@ -2587,6 +3223,14 @@ struct cmd_fmon_gear_get_response { ...@@ -2587,6 +3223,14 @@ struct cmd_fmon_gear_get_response {
int64_t rate; int64_t rate;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
struct cmd_fmon_fault_sts_get_request {
uint32_t fault_type; /**< @ref fmon_fault_type */
} BPMP_ABI_PACKED;
struct cmd_fmon_fault_sts_get_response {
uint32_t fault_sts;
} BPMP_ABI_PACKED;
/** /**
* @ingroup FMON * @ingroup FMON
* @brief Request with #MRQ_FMON * @brief Request with #MRQ_FMON
...@@ -2601,9 +3245,9 @@ struct cmd_fmon_gear_get_response { ...@@ -2601,9 +3245,9 @@ struct cmd_fmon_gear_get_response {
* |CMD_FMON_GEAR_CLAMP |fmon_gear_clamp | * |CMD_FMON_GEAR_CLAMP |fmon_gear_clamp |
* |CMD_FMON_GEAR_FREE |- | * |CMD_FMON_GEAR_FREE |- |
* |CMD_FMON_GEAR_GET |- | * |CMD_FMON_GEAR_GET |- |
* |CMD_FMON_FAULT_STS_GET |fmon_fault_sts_get |
* *
*/ */
struct mrq_fmon_request { struct mrq_fmon_request {
/** @brief Sub-command and clock id concatenated to 32-bit word. /** @brief Sub-command and clock id concatenated to 32-bit word.
* - bits[31..24] is the sub-cmd. * - bits[31..24] is the sub-cmd.
...@@ -2618,6 +3262,7 @@ struct mrq_fmon_request { ...@@ -2618,6 +3262,7 @@ struct mrq_fmon_request {
struct cmd_fmon_gear_free_request fmon_gear_free; struct cmd_fmon_gear_free_request fmon_gear_free;
/** @private */ /** @private */
struct cmd_fmon_gear_get_request fmon_gear_get; struct cmd_fmon_gear_get_request fmon_gear_get;
struct cmd_fmon_fault_sts_get_request fmon_fault_sts_get;
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
...@@ -2633,6 +3278,7 @@ struct mrq_fmon_request { ...@@ -2633,6 +3278,7 @@ struct mrq_fmon_request {
* |CMD_FMON_GEAR_CLAMP |- | * |CMD_FMON_GEAR_CLAMP |- |
* |CMD_FMON_GEAR_FREE |- | * |CMD_FMON_GEAR_FREE |- |
* |CMD_FMON_GEAR_GET |fmon_gear_get | * |CMD_FMON_GEAR_GET |fmon_gear_get |
* |CMD_FMON_FAULT_STS_GET |fmon_fault_sts_get |
* *
*/ */
...@@ -2643,11 +3289,12 @@ struct mrq_fmon_response { ...@@ -2643,11 +3289,12 @@ struct mrq_fmon_response {
/** @private */ /** @private */
struct cmd_fmon_gear_free_response fmon_gear_free; struct cmd_fmon_gear_free_response fmon_gear_free;
struct cmd_fmon_gear_get_response fmon_gear_get; struct cmd_fmon_gear_get_response fmon_gear_get;
struct cmd_fmon_fault_sts_get_response fmon_fault_sts_get;
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @endcond (bpmp_t194 || bpmp_t234) */
/** @endcond */ /** @} FMON */
/** /**
* @ingroup MRQ_Codes * @ingroup MRQ_Codes
...@@ -2655,7 +3302,7 @@ struct mrq_fmon_response { ...@@ -2655,7 +3302,7 @@ struct mrq_fmon_response {
* @brief Provide status information on faults reported by Error * @brief Provide status information on faults reported by Error
* Collator (EC) to HSM. * Collator (EC) to HSM.
* *
* * Platforms: T194 onwards * * Platforms: T194
* @cond bpmp_t194 * @cond bpmp_t194
* * Initiators: CCPLEX * * Initiators: CCPLEX
* * Targets: BPMP * * Targets: BPMP
...@@ -2664,8 +3311,10 @@ struct mrq_fmon_response { ...@@ -2664,8 +3311,10 @@ struct mrq_fmon_response {
* *
* @note This MRQ ABI is under construction, and subject to change * @note This MRQ ABI is under construction, and subject to change
* *
* @endcond bpmp_t194
* @addtogroup EC * @addtogroup EC
* @{ * @{
* @cond bpmp_t194
*/ */
enum { enum {
/** /**
...@@ -2676,7 +3325,7 @@ enum { ...@@ -2676,7 +3325,7 @@ enum {
* -#BPMP_ENODEV if target EC is not owned by BPMP @n * -#BPMP_ENODEV if target EC is not owned by BPMP @n
* -#BPMP_EACCES if target EC power domain is turned off @n * -#BPMP_EACCES if target EC power domain is turned off @n
* -#BPMP_EBADCMD if subcommand is not supported * -#BPMP_EBADCMD if subcommand is not supported
* @endcond * @endcond DEPRECATED
*/ */
CMD_EC_STATUS_GET = 1, /* deprecated */ CMD_EC_STATUS_GET = 1, /* deprecated */
...@@ -2787,7 +3436,8 @@ enum ec_registers_group { ...@@ -2787,7 +3436,8 @@ enum ec_registers_group {
#define EC_STATUS_FLAG_LAST_ERROR 0x0002U #define EC_STATUS_FLAG_LAST_ERROR 0x0002U
/** @brief EC latent error flag */ /** @brief EC latent error flag */
#define EC_STATUS_FLAG_LATENT_ERROR 0x0004U #define EC_STATUS_FLAG_LATENT_ERROR 0x0004U
/** @} */
/** @} bpmp_ec_status_flags */
/** /**
* @defgroup bpmp_ec_desc_flags EC Descriptor Flags * @defgroup bpmp_ec_desc_flags EC Descriptor Flags
...@@ -2798,7 +3448,8 @@ enum ec_registers_group { ...@@ -2798,7 +3448,8 @@ enum ec_registers_group {
#define EC_DESC_FLAG_RESOLVED 0x0001U #define EC_DESC_FLAG_RESOLVED 0x0001U
/** @brief EC descriptor failed to retrieve id flag */ /** @brief EC descriptor failed to retrieve id flag */
#define EC_DESC_FLAG_NO_ID 0x0002U #define EC_DESC_FLAG_NO_ID 0x0002U
/** @} */
/** @} bpmp_ec_desc_flags */
/** /**
* |error type | fmon_clk_id values | * |error type | fmon_clk_id values |
...@@ -2810,14 +3461,18 @@ struct ec_err_fmon_desc { ...@@ -2810,14 +3461,18 @@ struct ec_err_fmon_desc {
uint16_t desc_flags; uint16_t desc_flags;
/** @brief FMON monitored clock id */ /** @brief FMON monitored clock id */
uint16_t fmon_clk_id; uint16_t fmon_clk_id;
/** @brief Bitmask of @ref bpmp_fmon_faults_flags */ /**
* @brief Bitmask of fault flags
*
* @ref bpmp_fmon_faults_flags
*/
uint32_t fmon_faults; uint32_t fmon_faults;
/** @brief FMON faults access error */ /** @brief FMON faults access error */
int32_t fmon_access_error; int32_t fmon_access_error;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** /**
* |error type | vmon_adc_id values | * | error type | vmon_adc_id values |
* |---------------------------------|---------------------------| * |---------------------------------|---------------------------|
* |@ref EC_ERR_TYPE_VOLTAGE_MONITOR |@ref bpmp_adc_ids | * |@ref EC_ERR_TYPE_VOLTAGE_MONITOR |@ref bpmp_adc_ids |
*/ */
...@@ -2826,7 +3481,7 @@ struct ec_err_vmon_desc { ...@@ -2826,7 +3481,7 @@ struct ec_err_vmon_desc {
uint16_t desc_flags; uint16_t desc_flags;
/** @brief VMON rail adc id */ /** @brief VMON rail adc id */
uint16_t vmon_adc_id; uint16_t vmon_adc_id;
/** @brief Bitmask of @ref bpmp_vmon_faults_flags */ /** @brief Bitmask of bpmp_vmon_faults_flags */
uint32_t vmon_faults; uint32_t vmon_faults;
/** @brief VMON faults access error */ /** @brief VMON faults access error */
int32_t vmon_access_error; int32_t vmon_access_error;
...@@ -2834,8 +3489,8 @@ struct ec_err_vmon_desc { ...@@ -2834,8 +3489,8 @@ struct ec_err_vmon_desc {
/** /**
* |error type | reg_id values | * |error type | reg_id values |
* |---------------------------------|---------------------------| * |---------------------------------|-----------------------|
* |@ref EC_ERR_TYPE_REGISTER_PARITY |@ref bpmp_ec_registers_ids | * |@ref EC_ERR_TYPE_REGISTER_PARITY | bpmp_ec_registers_ids |
*/ */
struct ec_err_reg_parity_desc { struct ec_err_reg_parity_desc {
/** @brief Bitmask of @ref bpmp_ec_desc_flags */ /** @brief Bitmask of @ref bpmp_ec_desc_flags */
...@@ -2848,9 +3503,9 @@ struct ec_err_reg_parity_desc { ...@@ -2848,9 +3503,9 @@ struct ec_err_reg_parity_desc {
/** /**
* |error type | err_source_id values | * |error type | err_source_id values |
* |--------------------------------- |--------------------------| * |--------------------------------- |----------------------|
* |@ref EC_ERR_TYPE_SW_CORRECTABLE | @ref bpmp_ec_ce_swd_ids | * |@ref EC_ERR_TYPE_SW_CORRECTABLE | bpmp_ec_ce_swd_ids |
* |@ref EC_ERR_TYPE_SW_UNCORRECTABLE | @ref bpmp_ec_ue_swd_ids | * |@ref EC_ERR_TYPE_SW_UNCORRECTABLE | bpmp_ec_ue_swd_ids |
*/ */
struct ec_err_sw_error_desc { struct ec_err_sw_error_desc {
/** @brief Bitmask of @ref bpmp_ec_desc_flags */ /** @brief Bitmask of @ref bpmp_ec_desc_flags */
...@@ -2863,14 +3518,14 @@ struct ec_err_sw_error_desc { ...@@ -2863,14 +3518,14 @@ struct ec_err_sw_error_desc {
/** /**
* |error type | err_source_id values | * |error type | err_source_id values |
* |----------------------------------------|---------------------------| * |----------------------------------------|------------------------|
* |@ref EC_ERR_TYPE_PARITY_INTERNAL |@ref bpmp_ec_ipath_ids | * |@ref EC_ERR_TYPE_PARITY_INTERNAL | bpmp_ec_ipath_ids |
* |@ref EC_ERR_TYPE_ECC_SEC_INTERNAL |@ref bpmp_ec_ipath_ids | * |@ref EC_ERR_TYPE_ECC_SEC_INTERNAL | bpmp_ec_ipath_ids |
* |@ref EC_ERR_TYPE_ECC_DED_INTERNAL |@ref bpmp_ec_ipath_ids | * |@ref EC_ERR_TYPE_ECC_DED_INTERNAL | bpmp_ec_ipath_ids |
* |@ref EC_ERR_TYPE_COMPARATOR |@ref bpmp_ec_comparator_ids| * |@ref EC_ERR_TYPE_COMPARATOR | bpmp_ec_comparator_ids|
* |@ref EC_ERR_TYPE_PARITY_SRAM |@ref bpmp_clock_ids | * |@ref EC_ERR_TYPE_OTHER_HW_CORRECTABLE | bpmp_ec_misc_hwd_ids |
* |@ref EC_ERR_TYPE_OTHER_HW_CORRECTABLE |@ref bpmp_ec_misc_hwd_ids | * |@ref EC_ERR_TYPE_OTHER_HW_UNCORRECTABLE | bpmp_ec_misc_hwd_ids |
* |@ref EC_ERR_TYPE_OTHER_HW_UNCORRECTABLE |@ref bpmp_ec_misc_hwd_ids | * |@ref EC_ERR_TYPE_PARITY_SRAM | bpmp_clock_ids |
*/ */
struct ec_err_simple_desc { struct ec_err_simple_desc {
/** @brief Bitmask of @ref bpmp_ec_desc_flags */ /** @brief Bitmask of @ref bpmp_ec_desc_flags */
...@@ -2917,7 +3572,7 @@ struct cmd_ec_status_get_response { ...@@ -2917,7 +3572,7 @@ struct cmd_ec_status_get_response {
/** @brief EC error descriptors */ /** @brief EC error descriptors */
union ec_err_desc error_descs[EC_ERR_STATUS_DESC_MAX_NUM]; union ec_err_desc error_descs[EC_ERR_STATUS_DESC_MAX_NUM];
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @endcond */ /** @endcond DEPRECATED */
struct cmd_ec_status_ex_get_response { struct cmd_ec_status_ex_get_response {
/** @brief Target EC id (the same id received with request). */ /** @brief Target EC id (the same id received with request). */
...@@ -2955,7 +3610,7 @@ struct cmd_ec_status_ex_get_response { ...@@ -2955,7 +3610,7 @@ struct cmd_ec_status_ex_get_response {
* |sub-command |payload | * |sub-command |payload |
* |----------------------------|-----------------------| * |----------------------------|-----------------------|
* |@ref CMD_EC_STATUS_GET |ec_status_get | * |@ref CMD_EC_STATUS_GET |ec_status_get |
* @endcond * @endcond DEPRECATED
* *
* |sub-command |payload | * |sub-command |payload |
* |----------------------------|-----------------------| * |----------------------------|-----------------------|
...@@ -2983,7 +3638,7 @@ struct mrq_ec_request { ...@@ -2983,7 +3638,7 @@ struct mrq_ec_request {
* |sub-command |payload | * |sub-command |payload |
* |----------------------------|------------------------| * |----------------------------|------------------------|
* |@ref CMD_EC_STATUS_GET |ec_status_get | * |@ref CMD_EC_STATUS_GET |ec_status_get |
* @endcond * @endcond DEPRECATED
* *
* |sub-command |payload | * |sub-command |payload |
* |----------------------------|------------------------| * |----------------------------|------------------------|
...@@ -2997,13 +3652,264 @@ struct mrq_ec_response { ...@@ -2997,13 +3652,264 @@ struct mrq_ec_response {
* @cond DEPRECATED * @cond DEPRECATED
*/ */
struct cmd_ec_status_get_response ec_status_get; struct cmd_ec_status_get_response ec_status_get;
/** @endcond */ /** @endcond DEPRECATED */
struct cmd_ec_status_ex_get_response ec_status_ex_get; struct cmd_ec_status_ex_get_response ec_status_ex_get;
} BPMP_UNION_ANON; } BPMP_UNION_ANON;
} BPMP_ABI_PACKED; } BPMP_ABI_PACKED;
/** @} */ /** @endcond bpmp_t194 */
/** @endcond */ /** @} EC */
/**
* @ingroup MRQ_Codes
* @def MRQ_TELEMETRY
* @brief Get address of memory buffer refreshed with recently sampled
* telemetry data
*
* * Platforms: TH500 onwards
* @cond bpmp_th500
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: N/A
* * Response Payload: @ref mrq_telemetry_response
* @addtogroup Telemetry
* @{
*/
/**
* @brief Response to #MRQ_TELEMETRY
*
* mrq_response::err is
* * 0: Telemetry data is available at returned address
* * -#BPMP_EACCES: MRQ master is not allowed to request buffer refresh
* * -#BPMP_ENAVAIL: Telemetry buffer cannot be refreshed via this MRQ channel
* * -#BPMP_ENOTSUP: Telemetry buffer is not supported by BPMP-FW
* * -#BPMP_ENODEV: Telemetry mrq is not supported by BPMP-FW
*/
struct mrq_telemetry_response {
/** @brief Physical address of telemetry data buffer */
uint64_t data_buf_addr; /**< see @ref bpmp_telemetry_layout */
} BPMP_ABI_PACKED;
/** @} Telemetry */
/** @endcond bpmp_th500 */
/**
* @ingroup MRQ_Codes
* @def MRQ_PWR_LIMIT
* @brief Control power limits.
*
* * Platforms: TH500 onwards
* @cond bpmp_th500
* * Initiators: Any
* * Targets: BPMP
* * Request Payload: @ref mrq_pwr_limit_request
* * Response Payload: @ref mrq_pwr_limit_response
*
* @addtogroup Pwrlimit
* @{
*/
enum mrq_pwr_limit_cmd {
/**
* @brief Check whether the BPMP-FW supports the specified
* command
*
* mrq_response::err is 0 if the specified request is
* supported and -#BPMP_ENODEV otherwise.
*/
CMD_PWR_LIMIT_QUERY_ABI = 0,
/**
* @brief Set power limit
*
* mrq_response:err is
* * 0: Success
* * -#BPMP_ENODEV: Pwr limit mrq is not supported by BPMP-FW
* * -#BPMP_ENAVAIL: Invalid request parameters
* * -#BPMP_EACCES: Request is not accepted
*/
CMD_PWR_LIMIT_SET = 1,
/**
* @brief Get power limit setting
*
* mrq_response:err is
* * 0: Success
* * -#BPMP_ENODEV: Pwr limit mrq is not supported by BPMP-FW
* * -#BPMP_ENAVAIL: Invalid request parameters
*/
CMD_PWR_LIMIT_GET = 2,
/**
* @brief Get current power cap
*
* mrq_response:err is
* * 0: Success
* * -#BPMP_ENODEV: Pwr limit mrq is not supported by BPMP-FW
* * -#BPMP_ENAVAIL: Invalid request parameters
*/
CMD_PWR_LIMIT_CURR_CAP = 3,
};
/**
* @defgroup bpmp_pwr_limit_type PWR_LIMIT TYPEs
* @{
*/
/** @brief Limit value specifies traget cap */
#define PWR_LIMIT_TYPE_TARGET_CAP 0U
/** @brief Limit value specifies maximum possible target cap */
#define PWR_LIMIT_TYPE_BOUND_MAX 1U
/** @brief Limit value specifies minimum possible target cap */
#define PWR_LIMIT_TYPE_BOUND_MIN 2U
/** @brief Number of limit types supported by mrq interface */
#define PWR_LIMIT_TYPE_NUM 3U
/** @} bpmp_pwr_limit_type */
/**
* @brief Request data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_QUERY_ABI
*/
struct cmd_pwr_limit_query_abi_request {
uint32_t cmd_code; /**< @ref mrq_pwr_limit_cmd */
} BPMP_ABI_PACKED;
/**
* @brief Request data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_SET
*
* Set specified limit of specified type from specified source. The success of
* the request means that specified value is accepted as input to arbitration
* with other sources settings for the same limit of the same type. Zero limit
* is ignored by the arbitration (i.e., indicates "no limit set").
*/
struct cmd_pwr_limit_set_request {
uint32_t limit_id; /**< @ref bpmp_pwr_limit_id */
uint32_t limit_src; /**< @ref bpmp_pwr_limit_src */
uint32_t limit_type; /**< @ref bpmp_pwr_limit_type */
uint32_t limit_setting;
} BPMP_ABI_PACKED;
/**
* @brief Request data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_GET
*
* Get previously set from specified source specified limit value of specified
* type.
*/
struct cmd_pwr_limit_get_request {
uint32_t limit_id; /**< @ref bpmp_pwr_limit_id */
uint32_t limit_src; /**< @ref bpmp_pwr_limit_src */
uint32_t limit_type; /**< @ref bpmp_pwr_limit_type */
} BPMP_ABI_PACKED;
/**
* @brief Response data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_GET
*/
struct cmd_pwr_limit_get_response {
uint32_t limit_setting;
} BPMP_ABI_PACKED;
/**
* @brief Request data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_CURR_CAP
*
* For specified limit get current power cap aggregated from all sources.
*/
struct cmd_pwr_limit_curr_cap_request {
uint32_t limit_id; /**< @ref bpmp_pwr_limit_id */
} BPMP_ABI_PACKED;
/**
* @brief Response data for #MRQ_PWR_LIMIT command CMD_PWR_LIMIT_CURR_CAP
*/
struct cmd_pwr_limit_curr_cap_response {
uint32_t curr_cap;
} BPMP_ABI_PACKED;
/**
* @brief Request with #MRQ_PWR_LIMIT
*
* |sub-command |payload |
* |----------------------------|---------------------------------|
* |CMD_PWR_LIMIT_QUERY_ABI | cmd_pwr_limit_query_abi_request |
* |CMD_PWR_LIMIT_SET | cmd_pwr_limit_set_request |
* |CMD_PWR_LIMIT_GET | cmd_pwr_limit_get_request |
* |CMD_PWR_LIMIT_CURR_CAP | cmd_pwr_limit_curr_cap_request |
*/
struct mrq_pwr_limit_request {
uint32_t cmd;
union {
struct cmd_pwr_limit_query_abi_request pwr_limit_query_abi_req;
struct cmd_pwr_limit_set_request pwr_limit_set_req;
struct cmd_pwr_limit_get_request pwr_limit_get_req;
struct cmd_pwr_limit_curr_cap_request pwr_limit_curr_cap_req;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/**
* @brief Response to MRQ_PWR_LIMIT
*
* |sub-command |payload |
* |----------------------------|---------------------------------|
* |CMD_PWR_LIMIT_QUERY_ABI | - |
* |CMD_PWR_LIMIT_SET | - |
* |CMD_PWR_LIMIT_GET | cmd_pwr_limit_get_response |
* |CMD_PWR_LIMIT_CURR_CAP | cmd_pwr_limit_curr_cap_response |
*/
struct mrq_pwr_limit_response {
union {
struct cmd_pwr_limit_get_response pwr_limit_get_rsp;
struct cmd_pwr_limit_curr_cap_response pwr_limit_curr_cap_rsp;
} BPMP_UNION_ANON;
} BPMP_ABI_PACKED;
/** @} PwrLimit */
/** @endcond bpmp_th500 */
/**
* @ingroup MRQ_Codes
* @def MRQ_GEARS
* @brief Get thresholds for NDIV offset switching
*
* * Platforms: TH500 onwards
* @cond bpmp_th500
* * Initiators: CCPLEX
* * Targets: BPMP
* * Request Payload: N/A
* * Response Payload: @ref mrq_gears_response
* @addtogroup Gears
* @{
*/
/**
* @brief Response to #MRQ_GEARS
*
* Used by the sender of an #MRQ_GEARS message to request thresholds
* for NDIV offset switching.
*
* The mrq_gears_response::ncpu array defines four thresholds in units
* of number of online CPUS to be used for choosing between five different
* NDIV offset settings for CCPLEX cluster NAFLLs
*
* 1. If number of online CPUs < ncpu[0] use offset0
* 2. If number of online CPUs < ncpu[1] use offset1
* 3. If number of online CPUs < ncpu[2] use offset2
* 4. If number of online CPUs < ncpu[3] use offset3
* 5. If number of online CPUs >= ncpu[3] disable offsetting
*
* For TH500 mrq_gears_response::ncpu array has four valid entries.
*
* mrq_response::err is
* * 0: gears defined and response data valid
* * -#BPMP_ENODEV: MRQ is not supported by BPMP-FW
* * -#BPMP_EACCES: Operation not permitted for the MRQ master
* * -#BPMP_ENAVAIL: NDIV offsetting is disabled
*/
struct mrq_gears_response {
/** @brief number of online CPUs for each gear */
uint32_t ncpu[16];
} BPMP_ABI_PACKED;
/** @} Gears */
/** @endcond bpmp_th500 */
/** /**
* @addtogroup Error_Codes * @addtogroup Error_Codes
...@@ -3047,12 +3953,18 @@ struct mrq_ec_response { ...@@ -3047,12 +3953,18 @@ struct mrq_ec_response {
#define BPMP_ENOSYS 38 #define BPMP_ENOSYS 38
/** @brief Invalid slot */ /** @brief Invalid slot */
#define BPMP_EBADSLT 57 #define BPMP_EBADSLT 57
/** @brief Invalid message */
#define BPMP_EBADMSG 77
/** @brief Operation not supported */
#define BPMP_EOPNOTSUPP 95
/** @brief Targeted resource not available */
#define BPMP_ENAVAIL 119
/** @brief Not supported */ /** @brief Not supported */
#define BPMP_ENOTSUP 134 #define BPMP_ENOTSUP 134
/** @brief No such device or address */ /** @brief No such device or address */
#define BPMP_ENXIO 140 #define BPMP_ENXIO 140
/** @} */ /** @} Error_Codes */
#if defined(BPMP_ABI_CHECKS) #if defined(BPMP_ABI_CHECKS)
#include "bpmp_abi_checks.h" #include "bpmp_abi_checks.h"
......
include/soc/tegra/bpmp.h
View file @ a6eeafba
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#ifndef __SOC_TEGRA_BPMP_H #ifndef __SOC_TEGRA_BPMP_H
#define __SOC_TEGRA_BPMP_H #define __SOC_TEGRA_BPMP_H
#include <linux/iosys-map.h>
#include <linux/mailbox_client.h> #include <linux/mailbox_client.h>
#include <linux/pm_domain.h> #include <linux/pm_domain.h>
#include <linux/reset-controller.h> #include <linux/reset-controller.h>
...@@ -36,10 +37,22 @@ struct tegra_bpmp_mb_data { ...@@ -36,10 +37,22 @@ struct tegra_bpmp_mb_data {
u8 data[MSG_DATA_MIN_SZ]; u8 data[MSG_DATA_MIN_SZ];
} __packed; } __packed;
#define tegra_bpmp_mb_read(dst, mb, size) \
iosys_map_memcpy_from(dst, mb, offsetof(struct tegra_bpmp_mb_data, data), size)
#define tegra_bpmp_mb_write(mb, src, size) \
iosys_map_memcpy_to(mb, offsetof(struct tegra_bpmp_mb_data, data), src, size)
#define tegra_bpmp_mb_read_field(mb, field) \
iosys_map_rd_field(mb, 0, struct tegra_bpmp_mb_data, field)
#define tegra_bpmp_mb_write_field(mb, field, value) \
iosys_map_wr_field(mb, 0, struct tegra_bpmp_mb_data, field, value)
struct tegra_bpmp_channel { struct tegra_bpmp_channel {
struct tegra_bpmp *bpmp; struct tegra_bpmp *bpmp;
struct tegra_bpmp_mb_data *ib; struct iosys_map ib;
struct tegra_bpmp_mb_data *ob; struct iosys_map ob;
struct completion completion; struct completion completion;
struct tegra_ivc *ivc; struct tegra_ivc *ivc;
unsigned int index; unsigned int index;
......
include/soc/tegra/ivc.h
View file @ a6eeafba
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
#include <linux/device.h> #include <linux/device.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/iosys-map.h>
#include <linux/types.h> #include <linux/types.h>
struct tegra_ivc_header; struct tegra_ivc_header;
...@@ -16,7 +17,7 @@ struct tegra_ivc { ...@@ -16,7 +17,7 @@ struct tegra_ivc {
struct device *peer; struct device *peer;
struct { struct {
struct tegra_ivc_header *channel; struct iosys_map map;
unsigned int position; unsigned int position;
dma_addr_t phys; dma_addr_t phys;
} rx, tx; } rx, tx;
...@@ -37,7 +38,7 @@ struct tegra_ivc { ...@@ -37,7 +38,7 @@ struct tegra_ivc {
* *
* Returns a pointer to the frame, or an error encoded pointer. * Returns a pointer to the frame, or an error encoded pointer.
*/ */
void *tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc); int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
/** /**
* tegra_ivc_read_advance - Advance the read queue * tegra_ivc_read_advance - Advance the read queue
...@@ -57,7 +58,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc); ...@@ -57,7 +58,7 @@ int tegra_ivc_read_advance(struct tegra_ivc *ivc);
* *
* Returns a pointer to the frame, or an error encoded pointer. * Returns a pointer to the frame, or an error encoded pointer.
*/ */
void *tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc); int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, struct iosys_map *map);
/** /**
* tegra_ivc_write_advance - Advance the write queue * tegra_ivc_write_advance - Advance the write queue
...@@ -92,8 +93,8 @@ void tegra_ivc_reset(struct tegra_ivc *ivc); ...@@ -92,8 +93,8 @@ void tegra_ivc_reset(struct tegra_ivc *ivc);
size_t tegra_ivc_align(size_t size); size_t tegra_ivc_align(size_t size);
unsigned tegra_ivc_total_queue_size(unsigned queue_size); unsigned tegra_ivc_total_queue_size(unsigned queue_size);
int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, void *rx, int tegra_ivc_init(struct tegra_ivc *ivc, struct device *peer, const struct iosys_map *rx,
dma_addr_t rx_phys, void *tx, dma_addr_t tx_phys, dma_addr_t rx_phys, const struct iosys_map *tx, dma_addr_t tx_phys,
unsigned int num_frames, size_t frame_size, unsigned int num_frames, size_t frame_size,
void (*notify)(struct tegra_ivc *ivc, void *data), void (*notify)(struct tegra_ivc *ivc, void *data),
void *data); void *data);
......
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