Commit a9c12174 authored by Jakub Kicinski's avatar Jakub Kicinski

Merge branch 'net-renesas-rswitch-improve-tx-timestamp-accuracy'

Yoshihiro Shimoda says:

====================
net: renesas: rswitch: Improve TX timestamp accuracy

The patch [[123]/4] are minor refacoring for readability.
The patch [4/4] is for improving TX timestamp accuracy.
To improve the accuracy, it requires refactoring so that this is not
a fixed patch.

v2: https://lore.kernel.org/all/20230208235721.2336249-1-yoshihiro.shimoda.uh@renesas.com/
v1: https://lore.kernel.org/all/20230208073445.2317192-1-yoshihiro.shimoda.uh@renesas.com/
====================

Link: https://lore.kernel.org/r/20230209081741.2536034-1-yoshihiro.shimoda.uh@renesas.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 183514f7 33f5d733
This diff is collapsed.
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#define TX_RING_SIZE 1024 #define TX_RING_SIZE 1024
#define RX_RING_SIZE 1024 #define RX_RING_SIZE 1024
#define TS_RING_SIZE (TX_RING_SIZE * RSWITCH_NUM_PORTS)
#define PKT_BUF_SZ 1584 #define PKT_BUF_SZ 1584
#define RSWITCH_ALIGN 128 #define RSWITCH_ALIGN 128
...@@ -49,6 +50,10 @@ ...@@ -49,6 +50,10 @@
#define AGENT_INDEX_GWCA 3 #define AGENT_INDEX_GWCA 3
#define GWRO RSWITCH_GWCA0_OFFSET #define GWRO RSWITCH_GWCA0_OFFSET
#define GWCA_TS_IRQ_RESOURCE_NAME "gwca0_rxts0"
#define GWCA_TS_IRQ_NAME "rswitch: gwca0_rxts0"
#define GWCA_TS_IRQ_BIT BIT(0)
#define FWRO 0 #define FWRO 0
#define TPRO RSWITCH_TOP_OFFSET #define TPRO RSWITCH_TOP_OFFSET
#define CARO RSWITCH_COMA_OFFSET #define CARO RSWITCH_COMA_OFFSET
...@@ -831,7 +836,7 @@ enum DIE_DT { ...@@ -831,7 +836,7 @@ enum DIE_DT {
DT_FSINGLE = 0x80, DT_FSINGLE = 0x80,
DT_FSTART = 0x90, DT_FSTART = 0x90,
DT_FMID = 0xa0, DT_FMID = 0xa0,
DT_FEND = 0xb8, DT_FEND = 0xb0,
/* Chain control */ /* Chain control */
DT_LEMPTY = 0xc0, DT_LEMPTY = 0xc0,
...@@ -843,7 +848,7 @@ enum DIE_DT { ...@@ -843,7 +848,7 @@ enum DIE_DT {
DT_FEMPTY = 0x40, DT_FEMPTY = 0x40,
DT_FEMPTY_IS = 0x10, DT_FEMPTY_IS = 0x10,
DT_FEMPTY_IC = 0x20, DT_FEMPTY_IC = 0x20,
DT_FEMPTY_ND = 0x38, DT_FEMPTY_ND = 0x30,
DT_FEMPTY_START = 0x50, DT_FEMPTY_START = 0x50,
DT_FEMPTY_MID = 0x60, DT_FEMPTY_MID = 0x60,
DT_FEMPTY_END = 0x70, DT_FEMPTY_END = 0x70,
...@@ -865,6 +870,12 @@ enum DIE_DT { ...@@ -865,6 +870,12 @@ enum DIE_DT {
/* For reception */ /* For reception */
#define INFO1_SPN(port) ((u64)(port) << 36ULL) #define INFO1_SPN(port) ((u64)(port) << 36ULL)
/* For timestamp descriptor in dptrl (Byte 4 to 7) */
#define TS_DESC_TSUN(dptrl) ((dptrl) & GENMASK(7, 0))
#define TS_DESC_SPN(dptrl) (((dptrl) & GENMASK(10, 8)) >> 8)
#define TS_DESC_DPN(dptrl) (((dptrl) & GENMASK(17, 16)) >> 16)
#define TS_DESC_TN(dptrl) ((dptrl) & BIT(24))
struct rswitch_desc { struct rswitch_desc {
__le16 info_ds; /* Descriptor size */ __le16 info_ds; /* Descriptor size */
u8 die_dt; /* Descriptor interrupt enable and type */ u8 die_dt; /* Descriptor interrupt enable and type */
...@@ -911,27 +922,43 @@ struct rswitch_etha { ...@@ -911,27 +922,43 @@ struct rswitch_etha {
* name, this driver calls "queue". * name, this driver calls "queue".
*/ */
struct rswitch_gwca_queue { struct rswitch_gwca_queue {
int index;
bool dir_tx;
bool gptp;
union { union {
struct rswitch_ext_desc *ring; struct rswitch_ext_desc *tx_ring;
struct rswitch_ext_ts_desc *ts_ring; struct rswitch_ext_ts_desc *rx_ring;
struct rswitch_ts_desc *ts_ring;
}; };
/* Common */
dma_addr_t ring_dma; dma_addr_t ring_dma;
int ring_size; int ring_size;
int cur; int cur;
int dirty; int dirty;
struct sk_buff **skbs;
/* For [rt]_ring */
int index;
bool dir_tx;
struct sk_buff **skbs;
struct net_device *ndev; /* queue to ndev for irq */ struct net_device *ndev; /* queue to ndev for irq */
}; };
struct rswitch_gwca_ts_info {
struct sk_buff *skb;
struct list_head list;
int port;
u8 tag;
};
#define RSWITCH_NUM_IRQ_REGS (RSWITCH_MAX_NUM_QUEUES / BITS_PER_TYPE(u32)) #define RSWITCH_NUM_IRQ_REGS (RSWITCH_MAX_NUM_QUEUES / BITS_PER_TYPE(u32))
struct rswitch_gwca { struct rswitch_gwca {
int index; int index;
struct rswitch_desc *linkfix_table;
dma_addr_t linkfix_table_dma;
u32 linkfix_table_size;
struct rswitch_gwca_queue *queues; struct rswitch_gwca_queue *queues;
int num_queues; int num_queues;
struct rswitch_gwca_queue ts_queue;
struct list_head ts_info_list;
DECLARE_BITMAP(used, RSWITCH_MAX_NUM_QUEUES); DECLARE_BITMAP(used, RSWITCH_MAX_NUM_QUEUES);
u32 tx_irq_bits[RSWITCH_NUM_IRQ_REGS]; u32 tx_irq_bits[RSWITCH_NUM_IRQ_REGS];
u32 rx_irq_bits[RSWITCH_NUM_IRQ_REGS]; u32 rx_irq_bits[RSWITCH_NUM_IRQ_REGS];
...@@ -969,9 +996,6 @@ struct rswitch_private { ...@@ -969,9 +996,6 @@ struct rswitch_private {
struct platform_device *pdev; struct platform_device *pdev;
void __iomem *addr; void __iomem *addr;
struct rcar_gen4_ptp_private *ptp_priv; struct rcar_gen4_ptp_private *ptp_priv;
struct rswitch_desc *linkfix_table;
dma_addr_t linkfix_table_dma;
u32 linkfix_table_size;
struct rswitch_device *rdev[RSWITCH_NUM_PORTS]; struct rswitch_device *rdev[RSWITCH_NUM_PORTS];
......
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