Commit ad5ce743 authored by Marek Behún's avatar Marek Behún Committed by David S. Miller

net: phy: realtek: Add driver instances for rtl8221b via Clause 45

Collected from several commits in [PATCH net-next]
"Realtek RTL822x PHY rework to c45 and SerDes interface switching"

The instances are used by Clause 45 only accessible PHY's on several sfp
modules, which are using RollBall protocol.
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
[ Added matching functions to differentiate C45 instances ]
Signed-off-by: default avatarEric Woudstra <ericwouds@gmail.com>
Reviewed-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c189dbd7
...@@ -64,6 +64,13 @@ ...@@ -64,6 +64,13 @@
#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02 #define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02
#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16 #define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16
/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
* is set, they cannot be accessed by C45-over-C22.
*/
#define RTL822X_VND2_GBCR 0xa412
#define RTL822X_VND2_GANLPAR 0xa414
#define RTL8366RB_POWER_SAVE 0x15 #define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12) #define RTL8366RB_POWER_SAVE_ON BIT(12)
...@@ -74,6 +81,9 @@ ...@@ -74,6 +81,9 @@
#define RTL_GENERIC_PHYID 0x001cc800 #define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878 #define RTL_8211FVD_PHYID 0x001cc878
#define RTL_8221B_VB_CG 0x001cc849
#define RTL_8221B_VN_CG 0x001cc84a
#define RTL_8251B 0x001cc862
MODULE_DESCRIPTION("Realtek PHY driver"); MODULE_DESCRIPTION("Realtek PHY driver");
MODULE_AUTHOR("Johnson Leung"); MODULE_AUTHOR("Johnson Leung");
...@@ -839,6 +849,67 @@ static int rtl822xb_read_status(struct phy_device *phydev) ...@@ -839,6 +849,67 @@ static int rtl822xb_read_status(struct phy_device *phydev)
return 0; return 0;
} }
static int rtl822x_c45_config_aneg(struct phy_device *phydev)
{
bool changed = false;
int ret, val;
if (phydev->autoneg == AUTONEG_DISABLE)
return genphy_c45_pma_setup_forced(phydev);
ret = genphy_c45_an_config_aneg(phydev);
if (ret < 0)
return ret;
if (ret > 0)
changed = true;
val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
/* Vendor register as C45 has no standardized support for 1000BaseT */
ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
ADVERTISE_1000FULL, val);
if (ret < 0)
return ret;
if (ret > 0)
changed = true;
return genphy_c45_check_and_restart_aneg(phydev, changed);
}
static int rtl822x_c45_read_status(struct phy_device *phydev)
{
int ret, val;
ret = genphy_c45_read_status(phydev);
if (ret < 0)
return ret;
/* Vendor register as C45 has no standardized support for 1000BaseT */
if (phydev->autoneg == AUTONEG_ENABLE) {
val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
RTL822X_VND2_GANLPAR);
if (val < 0)
return val;
mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
}
return 0;
}
static int rtl822xb_c45_read_status(struct phy_device *phydev)
{
int ret;
ret = rtl822x_c45_read_status(phydev);
if (ret < 0)
return ret;
rtl822xb_update_interface(phydev);
return 0;
}
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev) static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
{ {
int val; int val;
...@@ -862,6 +933,35 @@ static int rtl8226_match_phy_device(struct phy_device *phydev) ...@@ -862,6 +933,35 @@ static int rtl8226_match_phy_device(struct phy_device *phydev)
rtlgen_supports_2_5gbps(phydev); rtlgen_supports_2_5gbps(phydev);
} }
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{
if (phydev->is_c45)
return is_c45 && (id == phydev->c45_ids.device_ids[1]);
else
return !is_c45 && (id == phydev->phy_id);
}
static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
{
return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
}
static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
{
return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
}
static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
{
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
}
static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
{
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
}
static int rtlgen_resume(struct phy_device *phydev) static int rtlgen_resume(struct phy_device *phydev)
{ {
int ret = genphy_resume(phydev); int ret = genphy_resume(phydev);
...@@ -872,6 +972,15 @@ static int rtlgen_resume(struct phy_device *phydev) ...@@ -872,6 +972,15 @@ static int rtlgen_resume(struct phy_device *phydev)
return ret; return ret;
} }
static int rtlgen_c45_resume(struct phy_device *phydev)
{
int ret = genphy_c45_pma_resume(phydev);
msleep(20);
return ret;
}
static int rtl9000a_config_init(struct phy_device *phydev) static int rtl9000a_config_init(struct phy_device *phydev)
{ {
phydev->autoneg = AUTONEG_DISABLE; phydev->autoneg = AUTONEG_DISABLE;
...@@ -1143,8 +1252,8 @@ static struct phy_driver realtek_drvs[] = { ...@@ -1143,8 +1252,8 @@ static struct phy_driver realtek_drvs[] = {
.read_page = rtl821x_read_page, .read_page = rtl821x_read_page,
.write_page = rtl821x_write_page, .write_page = rtl821x_write_page,
}, { }, {
PHY_ID_MATCH_EXACT(0x001cc849), .match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY", .name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features, .get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg, .config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init, .config_init = rtl822xb_config_init,
...@@ -1155,8 +1264,17 @@ static struct phy_driver realtek_drvs[] = { ...@@ -1155,8 +1264,17 @@ static struct phy_driver realtek_drvs[] = {
.read_page = rtl821x_read_page, .read_page = rtl821x_read_page,
.write_page = rtl821x_write_page, .write_page = rtl821x_write_page,
}, { }, {
PHY_ID_MATCH_EXACT(0x001cc84a), .match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY", .name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.config_aneg = rtl822x_c45_config_aneg,
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.get_features = rtl822x_get_features, .get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg, .config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init, .config_init = rtl822xb_config_init,
...@@ -1166,6 +1284,15 @@ static struct phy_driver realtek_drvs[] = { ...@@ -1166,6 +1284,15 @@ static struct phy_driver realtek_drvs[] = {
.resume = rtlgen_resume, .resume = rtlgen_resume,
.read_page = rtl821x_read_page, .read_page = rtl821x_read_page,
.write_page = rtl821x_write_page, .write_page = rtl821x_write_page,
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.config_aneg = rtl822x_c45_config_aneg,
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
}, { }, {
PHY_ID_MATCH_EXACT(0x001cc862), PHY_ID_MATCH_EXACT(0x001cc862),
.name = "RTL8251B 5Gbps PHY", .name = "RTL8251B 5Gbps PHY",
......
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