Commit b4dee778 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

arm64: dts: renesas: r8a779f0: Add INTC-EX node

Add the device node for the Interrupt Controller for External Devices
(INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC, which serves
external IRQ pins IRQ[0-5].
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Tested-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/8f5612c0353b8c90f98366978563340d93c7ae58.1690447013.git.geert+renesas@glider.be
parent e578a363
...@@ -466,6 +466,21 @@ tsc: thermal@e6198000 { ...@@ -466,6 +466,21 @@ tsc: thermal@e6198000 {
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
}; };
intc_ex: interrupt-controller@e61c0000 {
compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
};
tmu0: timer@e61e0000 { tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>; reg = <0 0xe61e0000 0 0x30>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment