xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI
In the same way as Intel Tiger Lake TCSS (Type-C Subsystem) the Alder Lake TCSS xHCI needs to be runtime suspended whenever possible to allow the TCSS hardware block to enter D3cold and thus save energy. Cc: stable@vger.kernel.org Signed-off-by:Abhijeet Rao <abhijeet.rao@intel.com> Signed-off-by:
Nikunj A. Dadhania <nikunj.dadhania@intel.com> Signed-off-by:
Azhar Shaikh <azhar.shaikh@intel.com> Signed-off-by:
Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://lore.kernel.org/r/20210512080816.866037-2-mathias.nyman@linux.intel.comSigned-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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