Commit be3e73ea authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: apply gpr/gds workaround before enabling GFX EDC mode

gfx memory should be initialized before enabling
DED and FUE field in mmGB_EDC_MODE
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e416fdb6
...@@ -4235,10 +4235,6 @@ static int gfx_v9_0_ecc_late_init(void *handle) ...@@ -4235,10 +4235,6 @@ static int gfx_v9_0_ecc_late_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r; int r;
r = amdgpu_gfx_ras_late_init(adev);
if (r)
return r;
r = gfx_v9_0_do_edc_gds_workarounds(adev); r = gfx_v9_0_do_edc_gds_workarounds(adev);
if (r) if (r)
return r; return r;
...@@ -4248,6 +4244,10 @@ static int gfx_v9_0_ecc_late_init(void *handle) ...@@ -4248,6 +4244,10 @@ static int gfx_v9_0_ecc_late_init(void *handle)
if (r) if (r)
return r; return r;
r = amdgpu_gfx_ras_late_init(adev);
if (r)
return r;
return 0; return 0;
} }
......
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