Commit c00a6861 authored by Maxime Coquelin's avatar Maxime Coquelin Committed by Sasha Levin

regmap: Fix possible shift overflow in regmap_field_init()

[ Upstream commit 921cc294 ]

The way the mask is generated in regmap_field_init() is wrong.
Indeed, a field initialized with msb = 31 and lsb = 0 provokes a shift
overflow while calculating the mask field.

On some 32 bits architectures, such as x86, the generated mask is 0,
instead of the expected 0xffffffff.

This patch uses GENMASK() to fix the problem, as this macro is already safe
regarding shift overflow.
Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent f099f4aa
...@@ -944,11 +944,10 @@ EXPORT_SYMBOL_GPL(devm_regmap_init); ...@@ -944,11 +944,10 @@ EXPORT_SYMBOL_GPL(devm_regmap_init);
static void regmap_field_init(struct regmap_field *rm_field, static void regmap_field_init(struct regmap_field *rm_field,
struct regmap *regmap, struct reg_field reg_field) struct regmap *regmap, struct reg_field reg_field)
{ {
int field_bits = reg_field.msb - reg_field.lsb + 1;
rm_field->regmap = regmap; rm_field->regmap = regmap;
rm_field->reg = reg_field.reg; rm_field->reg = reg_field.reg;
rm_field->shift = reg_field.lsb; rm_field->shift = reg_field.lsb;
rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb); rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
rm_field->id_size = reg_field.id_size; rm_field->id_size = reg_field.id_size;
rm_field->id_offset = reg_field.id_offset; rm_field->id_offset = reg_field.id_offset;
} }
......
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