Commit c653ab83 authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/mc: lookup subdev interrupt handlers with split type+inst

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 1fc2fddf
...@@ -42,7 +42,7 @@ nvkm_mc_intr_mask(struct nvkm_device *device, enum nvkm_devidx devidx, bool en) ...@@ -42,7 +42,7 @@ nvkm_mc_intr_mask(struct nvkm_device *device, enum nvkm_devidx devidx, bool en)
if (likely(mc) && mc->func->intr_mask) { if (likely(mc) && mc->func->intr_mask) {
u32 mask = nvkm_top_intr_mask(device, devidx); u32 mask = nvkm_top_intr_mask(device, devidx);
for (map = mc->func->intr; !mask && map->stat; map++) { for (map = mc->func->intr; !mask && map->stat; map++) {
if (map->unit == devidx) if (map->type + map->inst == devidx)
mask = map->stat; mask = map->stat;
} }
mc->func->intr_mask(mc, mask, en ? mask : 0); mc->func->intr_mask(mc, mask, en ? mask : 0);
...@@ -98,7 +98,7 @@ nvkm_mc_intr(struct nvkm_device *device, bool *handled) ...@@ -98,7 +98,7 @@ nvkm_mc_intr(struct nvkm_device *device, bool *handled)
for (map = mc->func->intr; map->stat; map++) { for (map = mc->func->intr; map->stat; map++) {
if (intr & map->stat) { if (intr & map->stat) {
subdev = nvkm_device_subdev(device, map->unit, 0); subdev = nvkm_device_subdev(device, map->type, map->inst);
if (subdev) if (subdev)
nvkm_subdev_intr(subdev); nvkm_subdev_intr(subdev);
stat &= ~map->stat; stat &= ~map->stat;
...@@ -121,7 +121,7 @@ nvkm_mc_reset_mask(struct nvkm_device *device, bool isauto, ...@@ -121,7 +121,7 @@ nvkm_mc_reset_mask(struct nvkm_device *device, bool isauto,
if (!(pmc_enable = nvkm_top_reset(device, devidx))) { if (!(pmc_enable = nvkm_top_reset(device, devidx))) {
for (map = mc->func->reset; map && map->stat; map++) { for (map = mc->func->reset; map && map->stat; map++) {
if (!isauto || !map->noauto) { if (!isauto || !map->noauto) {
if (map->unit == devidx) { if (map->type + map->inst == devidx) {
pmc_enable = map->stat; pmc_enable = map->stat;
break; break;
} }
......
...@@ -27,11 +27,11 @@ static const struct nvkm_mc_map ...@@ -27,11 +27,11 @@ static const struct nvkm_mc_map
gf100_mc_reset[] = { gf100_mc_reset[] = {
{ 0x00020000, NVKM_ENGINE_MSPDEC }, { 0x00020000, NVKM_ENGINE_MSPDEC },
{ 0x00008000, NVKM_ENGINE_MSVLD }, { 0x00008000, NVKM_ENGINE_MSVLD },
{ 0x00002000, NVKM_SUBDEV_PMU, true }, { 0x00002000, NVKM_SUBDEV_PMU, 0, true },
{ 0x00001000, NVKM_ENGINE_GR }, { 0x00001000, NVKM_ENGINE_GR },
{ 0x00000100, NVKM_ENGINE_FIFO }, { 0x00000100, NVKM_ENGINE_FIFO },
{ 0x00000080, NVKM_ENGINE_CE1 }, { 0x00000080, NVKM_ENGINE_CE, 1 },
{ 0x00000040, NVKM_ENGINE_CE0 }, { 0x00000040, NVKM_ENGINE_CE, 0 },
{ 0x00000002, NVKM_ENGINE_MSPPP }, { 0x00000002, NVKM_ENGINE_MSPPP },
{} {}
}; };
...@@ -43,8 +43,8 @@ gf100_mc_intr[] = { ...@@ -43,8 +43,8 @@ gf100_mc_intr[] = {
{ 0x00008000, NVKM_ENGINE_MSVLD }, { 0x00008000, NVKM_ENGINE_MSVLD },
{ 0x00001000, NVKM_ENGINE_GR }, { 0x00001000, NVKM_ENGINE_GR },
{ 0x00000100, NVKM_ENGINE_FIFO }, { 0x00000100, NVKM_ENGINE_FIFO },
{ 0x00000040, NVKM_ENGINE_CE1 }, { 0x00000040, NVKM_ENGINE_CE, 1 },
{ 0x00000020, NVKM_ENGINE_CE0 }, { 0x00000020, NVKM_ENGINE_CE, 0 },
{ 0x00000001, NVKM_ENGINE_MSPPP }, { 0x00000001, NVKM_ENGINE_MSPPP },
{ 0x40000000, NVKM_SUBDEV_IBUS }, { 0x40000000, NVKM_SUBDEV_IBUS },
{ 0x10000000, NVKM_SUBDEV_BUS }, { 0x10000000, NVKM_SUBDEV_BUS },
......
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
const struct nvkm_mc_map const struct nvkm_mc_map
gk104_mc_reset[] = { gk104_mc_reset[] = {
{ 0x00000100, NVKM_ENGINE_FIFO }, { 0x00000100, NVKM_ENGINE_FIFO },
{ 0x00002000, NVKM_SUBDEV_PMU, true }, { 0x00002000, NVKM_SUBDEV_PMU, 0, true },
{} {}
}; };
......
...@@ -27,7 +27,7 @@ static const struct nvkm_mc_map ...@@ -27,7 +27,7 @@ static const struct nvkm_mc_map
gt215_mc_reset[] = { gt215_mc_reset[] = {
{ 0x04008000, NVKM_ENGINE_MSVLD }, { 0x04008000, NVKM_ENGINE_MSVLD },
{ 0x01020000, NVKM_ENGINE_MSPDEC }, { 0x01020000, NVKM_ENGINE_MSPDEC },
{ 0x00802000, NVKM_ENGINE_CE0 }, { 0x00802000, NVKM_ENGINE_CE, 0 },
{ 0x00400002, NVKM_ENGINE_MSPPP }, { 0x00400002, NVKM_ENGINE_MSPPP },
{ 0x00201000, NVKM_ENGINE_GR }, { 0x00201000, NVKM_ENGINE_GR },
{ 0x00000100, NVKM_ENGINE_FIFO }, { 0x00000100, NVKM_ENGINE_FIFO },
...@@ -37,7 +37,7 @@ gt215_mc_reset[] = { ...@@ -37,7 +37,7 @@ gt215_mc_reset[] = {
static const struct nvkm_mc_map static const struct nvkm_mc_map
gt215_mc_intr[] = { gt215_mc_intr[] = {
{ 0x04000000, NVKM_ENGINE_DISP }, { 0x04000000, NVKM_ENGINE_DISP },
{ 0x00400000, NVKM_ENGINE_CE0 }, { 0x00400000, NVKM_ENGINE_CE, 0 },
{ 0x00020000, NVKM_ENGINE_MSPDEC }, { 0x00020000, NVKM_ENGINE_MSPDEC },
{ 0x00008000, NVKM_ENGINE_MSVLD }, { 0x00008000, NVKM_ENGINE_MSVLD },
{ 0x00001000, NVKM_ENGINE_GR }, { 0x00001000, NVKM_ENGINE_GR },
......
...@@ -11,7 +11,8 @@ int nvkm_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, enum nvkm_su ...@@ -11,7 +11,8 @@ int nvkm_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, enum nvkm_su
struct nvkm_mc_map { struct nvkm_mc_map {
u32 stat; u32 stat;
u32 unit; enum nvkm_subdev_type type;
int inst;
bool noauto; bool noauto;
}; };
......
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