Commit ca7329c6 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Hans Verkuil

media: ipu-cio2: Remove unnecessary runtime PM power state setting

ipu-cio2 uses generic power management, and pci_pm_runtime_suspend() and
pci_pm_runtime_resume() already take care of setting the PCI device power
state, so the driver doesn't need to do it explicitly.

Remove explicit setting to D3hot or D0 during runtime suspend and resume.

Remove #defines that are no longer used.
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Cc: Hyungwoo Yang <hyungwoo.yang@intel.com>
Cc: Rajmohan Mani <rajmohan.mani@intel.com>
Cc: Vijaykumar Ramya <ramya.vijaykumar@intel.com>
Cc: Samu Onkalo <samu.onkalo@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Jouni Ukkonen <jouni.ukkonen@intel.com>
Cc: Antti Laakso <antti.laakso@intel.com>
[Sakari Ailus: Remove now-redundant local variables.]
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
parent f55aa90b
......@@ -1807,16 +1807,10 @@ static int __maybe_unused cio2_runtime_suspend(struct device *dev)
struct pci_dev *pci_dev = to_pci_dev(dev);
struct cio2_device *cio2 = pci_get_drvdata(pci_dev);
void __iomem *const base = cio2->base;
u16 pm;
writel(CIO2_D0I3C_I3, base + CIO2_REG_D0I3C);
dev_dbg(dev, "cio2 runtime suspend.\n");
pci_read_config_word(pci_dev, pci_dev->pm_cap + CIO2_PMCSR_OFFSET, &pm);
pm = (pm >> CIO2_PMCSR_D0D3_SHIFT) << CIO2_PMCSR_D0D3_SHIFT;
pm |= CIO2_PMCSR_D3;
pci_write_config_word(pci_dev, pci_dev->pm_cap + CIO2_PMCSR_OFFSET, pm);
return 0;
}
......@@ -1825,15 +1819,10 @@ static int __maybe_unused cio2_runtime_resume(struct device *dev)
struct pci_dev *pci_dev = to_pci_dev(dev);
struct cio2_device *cio2 = pci_get_drvdata(pci_dev);
void __iomem *const base = cio2->base;
u16 pm;
writel(CIO2_D0I3C_RR, base + CIO2_REG_D0I3C);
dev_dbg(dev, "cio2 runtime resume.\n");
pci_read_config_word(pci_dev, pci_dev->pm_cap + CIO2_PMCSR_OFFSET, &pm);
pm = (pm >> CIO2_PMCSR_D0D3_SHIFT) << CIO2_PMCSR_D0D3_SHIFT;
pci_write_config_word(pci_dev, pci_dev->pm_cap + CIO2_PMCSR_OFFSET, pm);
return 0;
}
......
......@@ -320,10 +320,6 @@ struct pci_dev;
#define CIO2_CSIRX_DLY_CNT_TERMEN_DEFAULT 0x4
#define CIO2_CSIRX_DLY_CNT_SETTLE_DEFAULT 0x570
#define CIO2_PMCSR_OFFSET 4U
#define CIO2_PMCSR_D0D3_SHIFT 2U
#define CIO2_PMCSR_D3 0x3
struct cio2_csi2_timing {
s32 clk_termen;
s32 clk_settle;
......
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