Commit d1e1de10 authored by Srujana Challa's avatar Srujana Challa Committed by Jakub Kicinski

octeontx2-af: update cpt lf alloc mailbox

The CN10K CPT coprocessor contains a context processor
to accelerate updates to the IPsec security association
contexts. The context processor contains a context cache.
This patch updates CPT LF ALLOC mailbox to config ctx_ilen
requested by VFs. CPT_LF_ALLOC:ctx_ilen is the size of
initial context fetch.
Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent e2784acb
...@@ -1614,6 +1614,8 @@ struct cpt_lf_alloc_req_msg { ...@@ -1614,6 +1614,8 @@ struct cpt_lf_alloc_req_msg {
u16 sso_pf_func; u16 sso_pf_func;
u16 eng_grpmsk; u16 eng_grpmsk;
int blkaddr; int blkaddr;
u8 ctx_ilen_valid : 1;
u8 ctx_ilen : 7;
}; };
#define CPT_INLINE_INBOUND 0 #define CPT_INLINE_INBOUND 0
......
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#define PCI_DEVID_OTX2_CPT10K_PF 0xA0F2 #define PCI_DEVID_OTX2_CPT10K_PF 0xA0F2
/* Length of initial context fetch in 128 byte words */ /* Length of initial context fetch in 128 byte words */
#define CPT_CTX_ILEN 2ULL #define CPT_CTX_ILEN 1ULL
#define cpt_get_eng_sts(e_min, e_max, rsp, etype) \ #define cpt_get_eng_sts(e_min, e_max, rsp, etype) \
({ \ ({ \
...@@ -421,8 +421,12 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, ...@@ -421,8 +421,12 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
/* Set CPT LF group and priority */ /* Set CPT LF group and priority */
val = (u64)req->eng_grpmsk << 48 | 1; val = (u64)req->eng_grpmsk << 48 | 1;
if (!is_rvu_otx2(rvu)) if (!is_rvu_otx2(rvu)) {
val |= (CPT_CTX_ILEN << 17); if (req->ctx_ilen_valid)
val |= (req->ctx_ilen << 17);
else
val |= (CPT_CTX_ILEN << 17);
}
rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val);
......
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