Commit d6c78f1c authored by Andy Chiu's avatar Andy Chiu Committed by Palmer Dabbelt

riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}()

riscv_v_vstate_{save,restore}() can operate only on the knowlege of
struct __riscv_v_ext_state, and struct pt_regs. Let the caller decides
which should be passed into the function. Meanwhile, the kernel-mode
Vector is going to introduce another vstate, so this also makes functions
potentially able to be reused.
Signed-off-by: default avatarAndy Chiu <andy.chiu@sifive.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Tested-by: default avatarBjörn Töpel <bjorn@rivosinc.com>
Tested-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20240115055929.4736-8-andy.chiu@sifive.comSigned-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent a93fdaf1
......@@ -16,7 +16,7 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
* We are already called with irq disabled, so go without
* keeping track of riscv_v_flags.
*/
riscv_v_vstate_restore(current, regs);
riscv_v_vstate_restore(&current->thread.vstate, regs);
}
}
......
......@@ -171,23 +171,19 @@ static inline void riscv_v_vstate_discard(struct pt_regs *regs)
__riscv_v_vstate_dirty(regs);
}
static inline void riscv_v_vstate_save(struct task_struct *task,
static inline void riscv_v_vstate_save(struct __riscv_v_ext_state *vstate,
struct pt_regs *regs)
{
if ((regs->status & SR_VS) == SR_VS_DIRTY) {
struct __riscv_v_ext_state *vstate = &task->thread.vstate;
__riscv_v_vstate_save(vstate, vstate->datap);
__riscv_v_vstate_clean(regs);
}
}
static inline void riscv_v_vstate_restore(struct task_struct *task,
static inline void riscv_v_vstate_restore(struct __riscv_v_ext_state *vstate,
struct pt_regs *regs)
{
if ((regs->status & SR_VS) != SR_VS_OFF) {
struct __riscv_v_ext_state *vstate = &task->thread.vstate;
__riscv_v_vstate_restore(vstate, vstate->datap);
__riscv_v_vstate_clean(regs);
}
......@@ -208,7 +204,7 @@ static inline void __switch_to_vector(struct task_struct *prev,
struct pt_regs *regs;
regs = task_pt_regs(prev);
riscv_v_vstate_save(prev, regs);
riscv_v_vstate_save(&prev->thread.vstate, regs);
riscv_v_vstate_set_restore(next, task_pt_regs(next));
}
......@@ -226,8 +222,8 @@ static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }
static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; }
#define riscv_v_vsize (0)
#define riscv_v_vstate_discard(regs) do {} while (0)
#define riscv_v_vstate_save(task, regs) do {} while (0)
#define riscv_v_vstate_restore(task, regs) do {} while (0)
#define riscv_v_vstate_save(vstate, regs) do {} while (0)
#define riscv_v_vstate_restore(vstate, regs) do {} while (0)
#define __switch_to_vector(__prev, __next) do {} while (0)
#define riscv_v_vstate_off(regs) do {} while (0)
#define riscv_v_vstate_on(regs) do {} while (0)
......
......@@ -97,7 +97,7 @@ void kernel_vector_begin(void)
get_cpu_vector_context();
riscv_v_vstate_save(current, task_pt_regs(current));
riscv_v_vstate_save(&current->thread.vstate, task_pt_regs(current));
riscv_v_enable();
}
......
......@@ -101,7 +101,7 @@ static int riscv_vr_get(struct task_struct *target,
*/
if (target == current) {
get_cpu_vector_context();
riscv_v_vstate_save(current, task_pt_regs(current));
riscv_v_vstate_save(&current->thread.vstate, task_pt_regs(current));
put_cpu_vector_context();
}
......
......@@ -87,7 +87,7 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec)
WARN_ON(unlikely(!IS_ALIGNED((unsigned long)datap, 16)));
get_cpu_vector_context();
riscv_v_vstate_save(current, regs);
riscv_v_vstate_save(&current->thread.vstate, regs);
put_cpu_vector_context();
/* Copy everything of vstate but datap. */
......
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