Commit d77461a6 authored by Sascha Hauer's avatar Sascha Hauer Committed by Abel Vesa

clk: imx: pll14xx: Drop wrong shifting

The code tries to mask the bits in SDIV_MASK from 'tmp'. SDIV_MASK
already contains the shifted value, so shifting it again is wrong.
No functional change though as SDIV_SHIFT is zero.
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-3-s.hauer@pengutronix.deSigned-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
parent 485b4ff5
...@@ -195,7 +195,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate, ...@@ -195,7 +195,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
tmp = readl_relaxed(pll->base + DIV_CTL0); tmp = readl_relaxed(pll->base + DIV_CTL0);
if (!clk_pll14xx_mp_change(rate, tmp)) { if (!clk_pll14xx_mp_change(rate, tmp)) {
tmp &= ~(SDIV_MASK) << SDIV_SHIFT; tmp &= ~SDIV_MASK;
tmp |= rate->sdiv << SDIV_SHIFT; tmp |= rate->sdiv << SDIV_SHIFT;
writel_relaxed(tmp, pll->base + DIV_CTL0); writel_relaxed(tmp, pll->base + DIV_CTL0);
...@@ -261,7 +261,7 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate, ...@@ -261,7 +261,7 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
tmp = readl_relaxed(pll->base + DIV_CTL0); tmp = readl_relaxed(pll->base + DIV_CTL0);
if (!clk_pll14xx_mp_change(rate, tmp)) { if (!clk_pll14xx_mp_change(rate, tmp)) {
tmp &= ~(SDIV_MASK) << SDIV_SHIFT; tmp &= ~SDIV_MASK;
tmp |= rate->sdiv << SDIV_SHIFT; tmp |= rate->sdiv << SDIV_SHIFT;
writel_relaxed(tmp, pll->base + DIV_CTL0); writel_relaxed(tmp, pll->base + DIV_CTL0);
......
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