Commit dcfc861d authored by Huibin Hong's avatar Huibin Hong Committed by Mark Brown

spi: rockchip: adjust dma watermark and burstlen

Signal tx dma when spi fifo is less than half full,
and limit tx bursts to half the fifo length.

Clamp rx burst length to 1 to avoid alignment issues.
Signed-off-by: default avatarHuibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: default avatarEmil Renner Berthing <kernel@esmil.dk>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 04000dc6
...@@ -455,10 +455,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs) ...@@ -455,10 +455,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
rxconf.direction = rs->dma_rx.direction; rxconf.direction = rs->dma_rx.direction;
rxconf.src_addr = rs->dma_rx.addr; rxconf.src_addr = rs->dma_rx.addr;
rxconf.src_addr_width = rs->n_bytes; rxconf.src_addr_width = rs->n_bytes;
if (rs->dma_caps.max_burst > 4) rxconf.src_maxburst = 1;
rxconf.src_maxburst = 4;
else
rxconf.src_maxburst = 1;
dmaengine_slave_config(rs->dma_rx.ch, &rxconf); dmaengine_slave_config(rs->dma_rx.ch, &rxconf);
rxdesc = dmaengine_prep_slave_sg( rxdesc = dmaengine_prep_slave_sg(
...@@ -477,10 +474,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs) ...@@ -477,10 +474,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
txconf.direction = rs->dma_tx.direction; txconf.direction = rs->dma_tx.direction;
txconf.dst_addr = rs->dma_tx.addr; txconf.dst_addr = rs->dma_tx.addr;
txconf.dst_addr_width = rs->n_bytes; txconf.dst_addr_width = rs->n_bytes;
if (rs->dma_caps.max_burst > 4) txconf.dst_maxburst = rs->fifo_len / 2;
txconf.dst_maxburst = 4;
else
txconf.dst_maxburst = 1;
dmaengine_slave_config(rs->dma_tx.ch, &txconf); dmaengine_slave_config(rs->dma_tx.ch, &txconf);
txdesc = dmaengine_prep_slave_sg( txdesc = dmaengine_prep_slave_sg(
...@@ -578,7 +572,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs) ...@@ -578,7 +572,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR); writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMATDLR); writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR);
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR);
writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR);
......
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