Commit e0a343f0 authored by Lucas Stach's avatar Lucas Stach Committed by Greg Kroah-Hartman

watchdog: sp5100_tco: properly check for new register layouts

commit 46856fab upstream.

Commits 190aa430 (Add AMD Mullins platform support) and
cca118fa (Add AMD Carrizo platform support) enabled the
driver on a lot more devices, but the following commit missed
a single location in the code when checking if the SB800 register
offsets should be used. This leads to the wrong register being
written which in turn causes ACPI to go haywire.

Fix this by introducing a helper function to check for the new
register layout and use this consistently.

https://bugzilla.kernel.org/show_bug.cgi?id=114201
https://bugzilla.redhat.com/show_bug.cgi?id=1329910
Fixes: bdecfcdb (sp5100_tco: fix the device check for SB800
and later chipsets)
Signed-off-by: default avatarLucas Stach <dev@lynxeye.de>
Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 93900a7a
...@@ -73,6 +73,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started." ...@@ -73,6 +73,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
/* /*
* Some TCO specific functions * Some TCO specific functions
*/ */
static bool tco_has_sp5100_reg_layout(struct pci_dev *dev)
{
return dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
dev->revision < 0x40;
}
static void tco_timer_start(void) static void tco_timer_start(void)
{ {
u32 val; u32 val;
...@@ -129,7 +136,7 @@ static void tco_timer_enable(void) ...@@ -129,7 +136,7 @@ static void tco_timer_enable(void)
{ {
int val; int val;
if (sp5100_tco_pci->revision >= 0x40) { if (!tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
/* For SB800 or later */ /* For SB800 or later */
/* Set the Watchdog timer resolution to 1 sec */ /* Set the Watchdog timer resolution to 1 sec */
outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG); outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG);
...@@ -342,8 +349,7 @@ static unsigned char sp5100_tco_setupdevice(void) ...@@ -342,8 +349,7 @@ static unsigned char sp5100_tco_setupdevice(void)
/* /*
* Determine type of southbridge chipset. * Determine type of southbridge chipset.
*/ */
if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
sp5100_tco_pci->revision < 0x40) {
dev_name = SP5100_DEVNAME; dev_name = SP5100_DEVNAME;
index_reg = SP5100_IO_PM_INDEX_REG; index_reg = SP5100_IO_PM_INDEX_REG;
data_reg = SP5100_IO_PM_DATA_REG; data_reg = SP5100_IO_PM_DATA_REG;
...@@ -388,8 +394,7 @@ static unsigned char sp5100_tco_setupdevice(void) ...@@ -388,8 +394,7 @@ static unsigned char sp5100_tco_setupdevice(void)
* Secondly, Find the watchdog timer MMIO address * Secondly, Find the watchdog timer MMIO address
* from SBResource_MMIO register. * from SBResource_MMIO register.
*/ */
if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
sp5100_tco_pci->revision < 0x40) {
/* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
pci_read_config_dword(sp5100_tco_pci, pci_read_config_dword(sp5100_tco_pci,
SP5100_SB_RESOURCE_MMIO_BASE, &val); SP5100_SB_RESOURCE_MMIO_BASE, &val);
......
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