Commit e0ac5e9b authored by Russell King's avatar Russell King

drm/armada: disable CRTC clock during DPMS

When the CRTC is in low power mode, it isn't running, and so there's
no point keeping the CRTC clock enabled.  Disable the CRTC clock during
DPMS.

We need to re-enable it in the mode_set callback to ensure that the
variant's compute_clock() continues to see its clock in the expected
state (enabled).
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent f8e14069
......@@ -325,7 +325,11 @@ static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms)
if (dcrtc->dpms != dpms) {
dcrtc->dpms = dpms;
if (!IS_ERR(dcrtc->clk) && !dpms_blanked(dpms))
WARN_ON(clk_prepare_enable(dcrtc->clk));
armada_drm_crtc_update(dcrtc);
if (!IS_ERR(dcrtc->clk) && dpms_blanked(dpms))
clk_disable_unprepare(dcrtc->clk);
if (dpms_blanked(dpms))
armada_drm_vblank_off(dcrtc);
else
......@@ -563,6 +567,13 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
writel_relaxed(val, dcrtc->base + LCD_SPU_DUMB_CTRL);
}
/*
* If we are blanked, we would have disabled the clock. Re-enable
* it so that compute_clock() does the right thing.
*/
if (!IS_ERR(dcrtc->clk) && dpms_blanked(dcrtc->dpms))
WARN_ON(clk_prepare_enable(dcrtc->clk));
/* Now compute the divider for real */
dcrtc->variant->compute_clock(dcrtc, adj, &sclk);
......
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