Commit e0f608d7 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter

drm/i915: pending_flip_is_done is gen3, name it so

And remove the cargo-culted copy from the valleyview irq handler.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fa883c62
...@@ -1109,10 +1109,6 @@ static int i915_load_modeset_init(struct drm_device *dev) ...@@ -1109,10 +1109,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
if (ret) if (ret)
goto cleanup_vga_client; goto cleanup_vga_client;
/* IIR "flip pending" bit means done if this bit is set */
if (IS_GEN3(dev) && (I915_READ(ECOSKPD) & ECO_FLIP_DONE))
dev_priv->flip_pending_is_done = true;
/* Initialise stolen first so that we may reserve preallocated /* Initialise stolen first so that we may reserve preallocated
* objects for the BIOS to KMS transition. * objects for the BIOS to KMS transition.
*/ */
......
...@@ -748,7 +748,7 @@ typedef struct drm_i915_private { ...@@ -748,7 +748,7 @@ typedef struct drm_i915_private {
struct drm_crtc *plane_to_crtc_mapping[3]; struct drm_crtc *plane_to_crtc_mapping[3];
struct drm_crtc *pipe_to_crtc_mapping[3]; struct drm_crtc *pipe_to_crtc_mapping[3];
wait_queue_head_t pending_flip_queue; wait_queue_head_t pending_flip_queue;
bool flip_pending_is_done; bool gen3_flip_pending_is_done;
struct intel_pch_pll pch_plls[I915_NUM_PLLS]; struct intel_pch_pll pch_plls[I915_NUM_PLLS];
......
...@@ -541,17 +541,13 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS) ...@@ -541,17 +541,13 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
if (iir & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) { if (iir & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) {
drm_handle_vblank(dev, 0); drm_handle_vblank(dev, 0);
vblank++; vblank++;
if (!dev_priv->flip_pending_is_done) { intel_finish_page_flip(dev, 0);
intel_finish_page_flip(dev, 0);
}
} }
if (iir & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) { if (iir & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) {
drm_handle_vblank(dev, 1); drm_handle_vblank(dev, 1);
vblank++; vblank++;
if (!dev_priv->flip_pending_is_done) { intel_finish_page_flip(dev, 0);
intel_finish_page_flip(dev, 0);
}
} }
if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS) if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
...@@ -1494,13 +1490,13 @@ static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) ...@@ -1494,13 +1490,13 @@ static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) { if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {
intel_prepare_page_flip(dev, 0); intel_prepare_page_flip(dev, 0);
if (dev_priv->flip_pending_is_done) if (dev_priv->gen3_flip_pending_is_done)
intel_finish_page_flip_plane(dev, 0); intel_finish_page_flip_plane(dev, 0);
} }
if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) { if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {
intel_prepare_page_flip(dev, 1); intel_prepare_page_flip(dev, 1);
if (dev_priv->flip_pending_is_done) if (dev_priv->gen3_flip_pending_is_done)
intel_finish_page_flip_plane(dev, 1); intel_finish_page_flip_plane(dev, 1);
} }
...@@ -1508,7 +1504,7 @@ static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) ...@@ -1508,7 +1504,7 @@ static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
if (pipe_stats[pipe] & vblank_status && if (pipe_stats[pipe] & vblank_status &&
drm_handle_vblank(dev, pipe)) { drm_handle_vblank(dev, pipe)) {
vblank++; vblank++;
if (!dev_priv->flip_pending_is_done) { if (!dev_priv->gen3_flip_pending_is_done) {
i915_pageflip_stall_check(dev, pipe); i915_pageflip_stall_check(dev, pipe);
intel_finish_page_flip(dev, pipe); intel_finish_page_flip(dev, pipe);
} }
...@@ -2604,6 +2600,10 @@ void intel_irq_init(struct drm_device *dev) ...@@ -2604,6 +2600,10 @@ void intel_irq_init(struct drm_device *dev)
INIT_WORK(&dev_priv->error_work, i915_error_work_func); INIT_WORK(&dev_priv->error_work, i915_error_work_func);
INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work); INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
/* IIR "flip pending" bit means done if this bit is set */
if (IS_GEN3(dev) && (I915_READ(ECOSKPD) & ECO_FLIP_DONE))
dev_priv->gen3_flip_pending_is_done = true;
dev->driver->get_vblank_counter = i915_get_vblank_counter; dev->driver->get_vblank_counter = i915_get_vblank_counter;
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev) || if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev) ||
......
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