Commit f045bc60 authored by Bjorn Helgaas's avatar Bjorn Helgaas

Merge branch 'pci/controller/affinity'

- Add MSI_FLAG_NO_AFFINITY flag for devices that mux MSIs onto a single IRQ
  line and cannot set the affinity of each MSI to a specific CPU core
  (Marek Vasut)

- Use MSI_FLAG_NO_AFFINITY and remove unnecessary .irq_set_affinity()
  implementations in aardvark, altera, brcmstb, dwc, mediatek-gen3,
  mediatek, mobiveil, plda, rcar, tegra, vmd, xilinx-nwl, xilinx-xdma, and
  xilinx drivers to avoid "IRQ: set affinity failed" warnings (Marek Vasut)

* pci/controller/affinity:
  PCI: xilinx: Silence 'set affinity failed' warning
  PCI: xilinx-xdma: Silence 'set affinity failed' warning
  PCI: xilinx-nwl: Silence 'set affinity failed' warning
  PCI: vmd: Silence 'set affinity failed' warning
  PCI: tegra: Silence 'set affinity failed' warning
  PCI: rcar-host: Silence 'set affinity failed' warning
  PCI: plda: Silence 'set affinity failed' warning
  PCI: mobiveil: Silence 'set affinity failed' warning
  PCI: mediatek: Silence 'set affinity failed' warning
  PCI: mediatek-gen3: Silence 'set affinity failed' warning
  PCI: dwc: Silence 'set affinity failed' warning
  PCI: brcmstb: Silence 'set affinity failed' warning
  PCI: altera-msi: Silence 'set affinity failed' warning
  PCI: aardvark: Silence 'set affinity failed' warning
  genirq/msi: Silence 'set affinity failed' warning
parents 94d6a3a0 abd9b9d9
...@@ -189,12 +189,6 @@ static void ks_pcie_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -189,12 +189,6 @@ static void ks_pcie_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
(int)data->hwirq, msg->address_hi, msg->address_lo); (int)data->hwirq, msg->address_hi, msg->address_lo);
} }
static int ks_pcie_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void ks_pcie_msi_mask(struct irq_data *data) static void ks_pcie_msi_mask(struct irq_data *data)
{ {
struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(data); struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(data);
...@@ -247,7 +241,6 @@ static struct irq_chip ks_pcie_msi_irq_chip = { ...@@ -247,7 +241,6 @@ static struct irq_chip ks_pcie_msi_irq_chip = {
.name = "KEYSTONE-PCI-MSI", .name = "KEYSTONE-PCI-MSI",
.irq_ack = ks_pcie_msi_irq_ack, .irq_ack = ks_pcie_msi_irq_ack,
.irq_compose_msi_msg = ks_pcie_compose_msi_msg, .irq_compose_msi_msg = ks_pcie_compose_msi_msg,
.irq_set_affinity = ks_pcie_msi_set_affinity,
.irq_mask = ks_pcie_msi_mask, .irq_mask = ks_pcie_msi_mask,
.irq_unmask = ks_pcie_msi_unmask, .irq_unmask = ks_pcie_msi_unmask,
}; };
......
...@@ -48,8 +48,9 @@ static struct irq_chip dw_pcie_msi_irq_chip = { ...@@ -48,8 +48,9 @@ static struct irq_chip dw_pcie_msi_irq_chip = {
}; };
static struct msi_domain_info dw_pcie_msi_domain_info = { static struct msi_domain_info dw_pcie_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
MSI_FLAG_MULTI_PCI_MSI,
.chip = &dw_pcie_msi_irq_chip, .chip = &dw_pcie_msi_irq_chip,
}; };
...@@ -116,12 +117,6 @@ static void dw_pci_setup_msi_msg(struct irq_data *d, struct msi_msg *msg) ...@@ -116,12 +117,6 @@ static void dw_pci_setup_msi_msg(struct irq_data *d, struct msi_msg *msg)
(int)d->hwirq, msg->address_hi, msg->address_lo); (int)d->hwirq, msg->address_hi, msg->address_lo);
} }
static int dw_pci_msi_set_affinity(struct irq_data *d,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void dw_pci_bottom_mask(struct irq_data *d) static void dw_pci_bottom_mask(struct irq_data *d)
{ {
struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d); struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
...@@ -177,7 +172,6 @@ static struct irq_chip dw_pci_msi_bottom_irq_chip = { ...@@ -177,7 +172,6 @@ static struct irq_chip dw_pci_msi_bottom_irq_chip = {
.name = "DWPCI-MSI", .name = "DWPCI-MSI",
.irq_ack = dw_pci_bottom_ack, .irq_ack = dw_pci_bottom_ack,
.irq_compose_msi_msg = dw_pci_setup_msi_msg, .irq_compose_msi_msg = dw_pci_setup_msi_msg,
.irq_set_affinity = dw_pci_msi_set_affinity,
.irq_mask = dw_pci_bottom_mask, .irq_mask = dw_pci_bottom_mask,
.irq_unmask = dw_pci_bottom_unmask, .irq_unmask = dw_pci_bottom_unmask,
}; };
......
...@@ -360,8 +360,8 @@ static struct irq_chip mobiveil_msi_irq_chip = { ...@@ -360,8 +360,8 @@ static struct irq_chip mobiveil_msi_irq_chip = {
}; };
static struct msi_domain_info mobiveil_msi_domain_info = { static struct msi_domain_info mobiveil_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.chip = &mobiveil_msi_irq_chip, .chip = &mobiveil_msi_irq_chip,
}; };
...@@ -378,16 +378,9 @@ static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -378,16 +378,9 @@ static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
(int)data->hwirq, msg->address_hi, msg->address_lo); (int)data->hwirq, msg->address_hi, msg->address_lo);
} }
static int mobiveil_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static struct irq_chip mobiveil_msi_bottom_irq_chip = { static struct irq_chip mobiveil_msi_bottom_irq_chip = {
.name = "Mobiveil MSI", .name = "Mobiveil MSI",
.irq_compose_msi_msg = mobiveil_compose_msi_msg, .irq_compose_msi_msg = mobiveil_compose_msi_msg,
.irq_set_affinity = mobiveil_msi_set_affinity,
}; };
static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain,
......
...@@ -1304,12 +1304,6 @@ static void advk_msi_irq_compose_msi_msg(struct irq_data *data, ...@@ -1304,12 +1304,6 @@ static void advk_msi_irq_compose_msi_msg(struct irq_data *data,
msg->data = data->hwirq; msg->data = data->hwirq;
} }
static int advk_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void advk_msi_irq_mask(struct irq_data *d) static void advk_msi_irq_mask(struct irq_data *d)
{ {
struct advk_pcie *pcie = d->domain->host_data; struct advk_pcie *pcie = d->domain->host_data;
...@@ -1353,7 +1347,6 @@ static void advk_msi_top_irq_unmask(struct irq_data *d) ...@@ -1353,7 +1347,6 @@ static void advk_msi_top_irq_unmask(struct irq_data *d)
static struct irq_chip advk_msi_bottom_irq_chip = { static struct irq_chip advk_msi_bottom_irq_chip = {
.name = "MSI", .name = "MSI",
.irq_compose_msi_msg = advk_msi_irq_compose_msi_msg, .irq_compose_msi_msg = advk_msi_irq_compose_msi_msg,
.irq_set_affinity = advk_msi_set_affinity,
.irq_mask = advk_msi_irq_mask, .irq_mask = advk_msi_irq_mask,
.irq_unmask = advk_msi_irq_unmask, .irq_unmask = advk_msi_irq_unmask,
}; };
...@@ -1451,7 +1444,8 @@ static struct irq_chip advk_msi_irq_chip = { ...@@ -1451,7 +1444,8 @@ static struct irq_chip advk_msi_irq_chip = {
static struct msi_domain_info advk_msi_domain_info = { static struct msi_domain_info advk_msi_domain_info = {
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI |
MSI_FLAG_PCI_MSIX,
.chip = &advk_msi_irq_chip, .chip = &advk_msi_irq_chip,
}; };
......
...@@ -1629,11 +1629,6 @@ static void tegra_msi_irq_unmask(struct irq_data *d) ...@@ -1629,11 +1629,6 @@ static void tegra_msi_irq_unmask(struct irq_data *d)
spin_unlock_irqrestore(&msi->mask_lock, flags); spin_unlock_irqrestore(&msi->mask_lock, flags);
} }
static int tegra_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{ {
struct tegra_msi *msi = irq_data_get_irq_chip_data(data); struct tegra_msi *msi = irq_data_get_irq_chip_data(data);
...@@ -1648,7 +1643,6 @@ static struct irq_chip tegra_msi_bottom_chip = { ...@@ -1648,7 +1643,6 @@ static struct irq_chip tegra_msi_bottom_chip = {
.irq_ack = tegra_msi_irq_ack, .irq_ack = tegra_msi_irq_ack,
.irq_mask = tegra_msi_irq_mask, .irq_mask = tegra_msi_irq_mask,
.irq_unmask = tegra_msi_irq_unmask, .irq_unmask = tegra_msi_irq_unmask,
.irq_set_affinity = tegra_msi_set_affinity,
.irq_compose_msi_msg = tegra_compose_msi_msg, .irq_compose_msi_msg = tegra_compose_msi_msg,
}; };
...@@ -1697,8 +1691,8 @@ static const struct irq_domain_ops tegra_msi_domain_ops = { ...@@ -1697,8 +1691,8 @@ static const struct irq_domain_ops tegra_msi_domain_ops = {
}; };
static struct msi_domain_info tegra_msi_info = { static struct msi_domain_info tegra_msi_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.chip = &tegra_msi_top_chip, .chip = &tegra_msi_top_chip,
}; };
......
...@@ -81,8 +81,8 @@ static struct irq_chip altera_msi_irq_chip = { ...@@ -81,8 +81,8 @@ static struct irq_chip altera_msi_irq_chip = {
}; };
static struct msi_domain_info altera_msi_domain_info = { static struct msi_domain_info altera_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.chip = &altera_msi_irq_chip, .chip = &altera_msi_irq_chip,
}; };
...@@ -99,16 +99,9 @@ static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -99,16 +99,9 @@ static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
(int)data->hwirq, msg->address_hi, msg->address_lo); (int)data->hwirq, msg->address_hi, msg->address_lo);
} }
static int altera_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static struct irq_chip altera_msi_bottom_irq_chip = { static struct irq_chip altera_msi_bottom_irq_chip = {
.name = "Altera MSI", .name = "Altera MSI",
.irq_compose_msi_msg = altera_compose_msi_msg, .irq_compose_msi_msg = altera_compose_msi_msg,
.irq_set_affinity = altera_msi_set_affinity,
}; };
static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
......
...@@ -445,8 +445,8 @@ static struct irq_chip brcm_msi_irq_chip = { ...@@ -445,8 +445,8 @@ static struct irq_chip brcm_msi_irq_chip = {
}; };
static struct msi_domain_info brcm_msi_domain_info = { static struct msi_domain_info brcm_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
.chip = &brcm_msi_irq_chip, .chip = &brcm_msi_irq_chip,
}; };
...@@ -484,12 +484,6 @@ static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -484,12 +484,6 @@ static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL_32) | data->hwirq; msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL_32) | data->hwirq;
} }
static int brcm_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void brcm_msi_ack_irq(struct irq_data *data) static void brcm_msi_ack_irq(struct irq_data *data)
{ {
struct brcm_msi *msi = irq_data_get_irq_chip_data(data); struct brcm_msi *msi = irq_data_get_irq_chip_data(data);
...@@ -502,7 +496,6 @@ static void brcm_msi_ack_irq(struct irq_data *data) ...@@ -502,7 +496,6 @@ static void brcm_msi_ack_irq(struct irq_data *data)
static struct irq_chip brcm_msi_bottom_irq_chip = { static struct irq_chip brcm_msi_bottom_irq_chip = {
.name = "BRCM STB MSI", .name = "BRCM STB MSI",
.irq_compose_msi_msg = brcm_msi_compose_msi_msg, .irq_compose_msi_msg = brcm_msi_compose_msi_msg,
.irq_set_affinity = brcm_msi_set_affinity,
.irq_ack = brcm_msi_ack_irq, .irq_ack = brcm_msi_ack_irq,
}; };
......
...@@ -424,12 +424,6 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie) ...@@ -424,12 +424,6 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie)
return 0; return 0;
} }
static int mtk_pcie_set_affinity(struct irq_data *data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void mtk_pcie_msi_irq_mask(struct irq_data *data) static void mtk_pcie_msi_irq_mask(struct irq_data *data)
{ {
pci_msi_mask_irq(data); pci_msi_mask_irq(data);
...@@ -450,8 +444,9 @@ static struct irq_chip mtk_msi_irq_chip = { ...@@ -450,8 +444,9 @@ static struct irq_chip mtk_msi_irq_chip = {
}; };
static struct msi_domain_info mtk_msi_domain_info = { static struct msi_domain_info mtk_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
MSI_FLAG_MULTI_PCI_MSI,
.chip = &mtk_msi_irq_chip, .chip = &mtk_msi_irq_chip,
}; };
...@@ -517,7 +512,6 @@ static struct irq_chip mtk_msi_bottom_irq_chip = { ...@@ -517,7 +512,6 @@ static struct irq_chip mtk_msi_bottom_irq_chip = {
.irq_mask = mtk_msi_bottom_irq_mask, .irq_mask = mtk_msi_bottom_irq_mask,
.irq_unmask = mtk_msi_bottom_irq_unmask, .irq_unmask = mtk_msi_bottom_irq_unmask,
.irq_compose_msi_msg = mtk_compose_msi_msg, .irq_compose_msi_msg = mtk_compose_msi_msg,
.irq_set_affinity = mtk_pcie_set_affinity,
.name = "MSI", .name = "MSI",
}; };
...@@ -618,7 +612,6 @@ static struct irq_chip mtk_intx_irq_chip = { ...@@ -618,7 +612,6 @@ static struct irq_chip mtk_intx_irq_chip = {
.irq_mask = mtk_intx_mask, .irq_mask = mtk_intx_mask,
.irq_unmask = mtk_intx_unmask, .irq_unmask = mtk_intx_unmask,
.irq_eoi = mtk_intx_eoi, .irq_eoi = mtk_intx_eoi,
.irq_set_affinity = mtk_pcie_set_affinity,
.name = "INTx", .name = "INTx",
}; };
......
...@@ -407,12 +407,6 @@ static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -407,12 +407,6 @@ static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
(int)data->hwirq, msg->address_hi, msg->address_lo); (int)data->hwirq, msg->address_hi, msg->address_lo);
} }
static int mtk_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void mtk_msi_ack_irq(struct irq_data *data) static void mtk_msi_ack_irq(struct irq_data *data)
{ {
struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data); struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
...@@ -424,7 +418,6 @@ static void mtk_msi_ack_irq(struct irq_data *data) ...@@ -424,7 +418,6 @@ static void mtk_msi_ack_irq(struct irq_data *data)
static struct irq_chip mtk_msi_bottom_irq_chip = { static struct irq_chip mtk_msi_bottom_irq_chip = {
.name = "MTK MSI", .name = "MTK MSI",
.irq_compose_msi_msg = mtk_compose_msi_msg, .irq_compose_msi_msg = mtk_compose_msi_msg,
.irq_set_affinity = mtk_msi_set_affinity,
.irq_ack = mtk_msi_ack_irq, .irq_ack = mtk_msi_ack_irq,
}; };
...@@ -486,8 +479,8 @@ static struct irq_chip mtk_msi_irq_chip = { ...@@ -486,8 +479,8 @@ static struct irq_chip mtk_msi_irq_chip = {
}; };
static struct msi_domain_info mtk_msi_domain_info = { static struct msi_domain_info mtk_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.chip = &mtk_msi_irq_chip, .chip = &mtk_msi_irq_chip,
}; };
......
...@@ -658,11 +658,6 @@ static void rcar_msi_irq_unmask(struct irq_data *d) ...@@ -658,11 +658,6 @@ static void rcar_msi_irq_unmask(struct irq_data *d)
spin_unlock_irqrestore(&msi->mask_lock, flags); spin_unlock_irqrestore(&msi->mask_lock, flags);
} }
static int rcar_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) static void rcar_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{ {
struct rcar_msi *msi = irq_data_get_irq_chip_data(data); struct rcar_msi *msi = irq_data_get_irq_chip_data(data);
...@@ -678,7 +673,6 @@ static struct irq_chip rcar_msi_bottom_chip = { ...@@ -678,7 +673,6 @@ static struct irq_chip rcar_msi_bottom_chip = {
.irq_ack = rcar_msi_irq_ack, .irq_ack = rcar_msi_irq_ack,
.irq_mask = rcar_msi_irq_mask, .irq_mask = rcar_msi_irq_mask,
.irq_unmask = rcar_msi_irq_unmask, .irq_unmask = rcar_msi_irq_unmask,
.irq_set_affinity = rcar_msi_set_affinity,
.irq_compose_msi_msg = rcar_compose_msi_msg, .irq_compose_msi_msg = rcar_compose_msi_msg,
}; };
...@@ -725,8 +719,8 @@ static const struct irq_domain_ops rcar_msi_domain_ops = { ...@@ -725,8 +719,8 @@ static const struct irq_domain_ops rcar_msi_domain_ops = {
}; };
static struct msi_domain_info rcar_msi_info = { static struct msi_domain_info rcar_msi_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
.chip = &rcar_msi_top_chip, .chip = &rcar_msi_top_chip,
}; };
......
...@@ -355,8 +355,8 @@ static struct irq_chip xilinx_msi_irq_chip = { ...@@ -355,8 +355,8 @@ static struct irq_chip xilinx_msi_irq_chip = {
}; };
static struct msi_domain_info xilinx_msi_domain_info = { static struct msi_domain_info xilinx_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
.chip = &xilinx_msi_irq_chip, .chip = &xilinx_msi_irq_chip,
}; };
...@@ -370,16 +370,9 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -370,16 +370,9 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
msg->data = data->hwirq; msg->data = data->hwirq;
} }
static int xilinx_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static struct irq_chip xilinx_irq_chip = { static struct irq_chip xilinx_irq_chip = {
.name = "pl_dma:MSI", .name = "pl_dma:MSI",
.irq_compose_msi_msg = xilinx_compose_msi_msg, .irq_compose_msi_msg = xilinx_compose_msi_msg,
.irq_set_affinity = xilinx_msi_set_affinity,
}; };
static int xilinx_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, static int xilinx_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
......
...@@ -425,8 +425,8 @@ static struct irq_chip nwl_msi_irq_chip = { ...@@ -425,8 +425,8 @@ static struct irq_chip nwl_msi_irq_chip = {
}; };
static struct msi_domain_info nwl_msi_domain_info = { static struct msi_domain_info nwl_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_MULTI_PCI_MSI), MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI,
.chip = &nwl_msi_irq_chip, .chip = &nwl_msi_irq_chip,
}; };
#endif #endif
...@@ -441,16 +441,9 @@ static void nwl_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -441,16 +441,9 @@ static void nwl_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
msg->data = data->hwirq; msg->data = data->hwirq;
} }
static int nwl_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static struct irq_chip nwl_irq_chip = { static struct irq_chip nwl_irq_chip = {
.name = "Xilinx MSI", .name = "Xilinx MSI",
.irq_compose_msi_msg = nwl_compose_msi_msg, .irq_compose_msi_msg = nwl_compose_msi_msg,
.irq_set_affinity = nwl_msi_set_affinity,
}; };
static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
......
...@@ -208,11 +208,6 @@ static struct irq_chip xilinx_msi_top_chip = { ...@@ -208,11 +208,6 @@ static struct irq_chip xilinx_msi_top_chip = {
.irq_ack = xilinx_msi_top_irq_ack, .irq_ack = xilinx_msi_top_irq_ack,
}; };
static int xilinx_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{ {
struct xilinx_pcie *pcie = irq_data_get_irq_chip_data(data); struct xilinx_pcie *pcie = irq_data_get_irq_chip_data(data);
...@@ -225,7 +220,6 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -225,7 +220,6 @@ static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
static struct irq_chip xilinx_msi_bottom_chip = { static struct irq_chip xilinx_msi_bottom_chip = {
.name = "Xilinx MSI", .name = "Xilinx MSI",
.irq_set_affinity = xilinx_msi_set_affinity,
.irq_compose_msi_msg = xilinx_compose_msi_msg, .irq_compose_msi_msg = xilinx_compose_msi_msg,
}; };
...@@ -271,7 +265,8 @@ static const struct irq_domain_ops xilinx_msi_domain_ops = { ...@@ -271,7 +265,8 @@ static const struct irq_domain_ops xilinx_msi_domain_ops = {
}; };
static struct msi_domain_info xilinx_msi_info = { static struct msi_domain_info xilinx_msi_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_NO_AFFINITY,
.chip = &xilinx_msi_top_chip, .chip = &xilinx_msi_top_chip,
}; };
......
...@@ -76,17 +76,10 @@ static void plda_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ...@@ -76,17 +76,10 @@ static void plda_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
(int)data->hwirq, msg->address_hi, msg->address_lo); (int)data->hwirq, msg->address_hi, msg->address_lo);
} }
static int plda_msi_set_affinity(struct irq_data *irq_data,
const struct cpumask *mask, bool force)
{
return -EINVAL;
}
static struct irq_chip plda_msi_bottom_irq_chip = { static struct irq_chip plda_msi_bottom_irq_chip = {
.name = "PLDA MSI", .name = "PLDA MSI",
.irq_ack = plda_msi_bottom_irq_ack, .irq_ack = plda_msi_bottom_irq_ack,
.irq_compose_msi_msg = plda_compose_msi_msg, .irq_compose_msi_msg = plda_compose_msi_msg,
.irq_set_affinity = plda_msi_set_affinity,
}; };
static int plda_irq_msi_domain_alloc(struct irq_domain *domain, static int plda_irq_msi_domain_alloc(struct irq_domain *domain,
...@@ -146,8 +139,8 @@ static struct irq_chip plda_msi_irq_chip = { ...@@ -146,8 +139,8 @@ static struct irq_chip plda_msi_irq_chip = {
}; };
static struct msi_domain_info plda_msi_domain_info = { static struct msi_domain_info plda_msi_domain_info = {
.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX), MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.chip = &plda_msi_irq_chip, .chip = &plda_msi_irq_chip,
}; };
......
...@@ -204,22 +204,11 @@ static void vmd_irq_disable(struct irq_data *data) ...@@ -204,22 +204,11 @@ static void vmd_irq_disable(struct irq_data *data)
raw_spin_unlock_irqrestore(&list_lock, flags); raw_spin_unlock_irqrestore(&list_lock, flags);
} }
/*
* XXX: Stubbed until we develop acceptable way to not create conflicts with
* other devices sharing the same vector.
*/
static int vmd_irq_set_affinity(struct irq_data *data,
const struct cpumask *dest, bool force)
{
return -EINVAL;
}
static struct irq_chip vmd_msi_controller = { static struct irq_chip vmd_msi_controller = {
.name = "VMD-MSI", .name = "VMD-MSI",
.irq_enable = vmd_irq_enable, .irq_enable = vmd_irq_enable,
.irq_disable = vmd_irq_disable, .irq_disable = vmd_irq_disable,
.irq_compose_msi_msg = vmd_compose_msi_msg, .irq_compose_msi_msg = vmd_compose_msi_msg,
.irq_set_affinity = vmd_irq_set_affinity,
}; };
static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info, static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
...@@ -326,7 +315,7 @@ static struct msi_domain_ops vmd_msi_domain_ops = { ...@@ -326,7 +315,7 @@ static struct msi_domain_ops vmd_msi_domain_ops = {
static struct msi_domain_info vmd_msi_domain_info = { static struct msi_domain_info vmd_msi_domain_info = {
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
MSI_FLAG_PCI_MSIX, MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX,
.ops = &vmd_msi_domain_ops, .ops = &vmd_msi_domain_ops,
.chip = &vmd_msi_controller, .chip = &vmd_msi_controller,
}; };
......
...@@ -554,6 +554,8 @@ enum { ...@@ -554,6 +554,8 @@ enum {
MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19), MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19),
/* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */ /* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */
MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20), MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20),
/* PCI MSIs cannot be steered separately to CPU cores */
MSI_FLAG_NO_AFFINITY = (1 << 21),
}; };
/** /**
......
...@@ -832,7 +832,7 @@ static void msi_domain_update_chip_ops(struct msi_domain_info *info) ...@@ -832,7 +832,7 @@ static void msi_domain_update_chip_ops(struct msi_domain_info *info)
struct irq_chip *chip = info->chip; struct irq_chip *chip = info->chip;
BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask); BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
if (!chip->irq_set_affinity) if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY))
chip->irq_set_affinity = msi_domain_set_affinity; chip->irq_set_affinity = msi_domain_set_affinity;
} }
......
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