Commit fd7090e3 authored by Martin K. Petersen's avatar Martin K. Petersen

Merge patch series "scsi: mpt3sas: Use flexible arrays and do a few cleanups"

James Seo <james@equiv.tech> says:

Commit df8fc4e9 ("kbuild: Enable -fstrict-flex-arrays=3") has
resulted in the only arrays that UBSAN_BOUNDS considers unbounded
being trailing arrays declared with [] as the last member of a
struct. Unbounded trailing arrays declared with [1] are common in
mpt3sas, which is causing spurious warnings to appear in some
situations, e.g. when more than one physical disk is connected:

  UBSAN: array-index-out-of-bounds in drivers/scsi/mpt3sas/mpt3sas_scsih.c:6810:36
  index 1 is out of range for type 'MPI2_SAS_IO_UNIT0_PHY_DATA [1]'

which relates to this unbounded array access:

  port_id = sas_iounit_pg0->PhyData[i].Port;

and is just one example of 10 similar warnings currently occurring for
me during boot.

This series converts most trailing arrays declared with [1] in mptsas
into proper C99 flexible array members. Those that are not unbounded
and really are fixed-length arrays of length 1 are left alone.

I didn't find any conversions that required further source edits
besides changing [1] to [], and everything seems to work with my
SAS2008-based add-in card, but please look things over in case I
missed something subtle.

Rounding out the series are some opportunistic cleanups.

The only dependency is that patch 7 ("Use struct_size() for struct
size calculations") depends on patches 3-5.

Link: https://lore.kernel.org/r/20230806170604.16143-1-james@equiv.techSigned-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parents b85ea95d e1882155
This diff is collapsed.
...@@ -295,20 +295,9 @@ typedef struct _MPI2_EXT_IMAGE_HEADER { ...@@ -295,20 +295,9 @@ typedef struct _MPI2_EXT_IMAGE_HEADER {
/*FLASH Layout Extended Image Data */ /*FLASH Layout Extended Image Data */
/* /*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to *Host code (drivers, BIOS, utilities, etc.) should check NumberOfLayouts and
*one and check RegionsPerLayout at runtime. *RegionsPerLayout at runtime before using Layout[] and Region[].
*/ */
#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
#define MPI2_FLASH_NUMBER_OF_REGIONS (1)
#endif
/*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to
*one and check NumberOfLayouts at runtime.
*/
#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1)
#endif
typedef struct _MPI2_FLASH_REGION { typedef struct _MPI2_FLASH_REGION {
U8 RegionType; /*0x00 */ U8 RegionType; /*0x00 */
...@@ -325,7 +314,7 @@ typedef struct _MPI2_FLASH_LAYOUT { ...@@ -325,7 +314,7 @@ typedef struct _MPI2_FLASH_LAYOUT {
U32 Reserved1; /*0x04 */ U32 Reserved1; /*0x04 */
U32 Reserved2; /*0x08 */ U32 Reserved2; /*0x08 */
U32 Reserved3; /*0x0C */ U32 Reserved3; /*0x0C */
MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS]; /*0x10 */ MPI2_FLASH_REGION Region[]; /*0x10 */
} MPI2_FLASH_LAYOUT, *PTR_MPI2_FLASH_LAYOUT, } MPI2_FLASH_LAYOUT, *PTR_MPI2_FLASH_LAYOUT,
Mpi2FlashLayout_t, *pMpi2FlashLayout_t; Mpi2FlashLayout_t, *pMpi2FlashLayout_t;
...@@ -339,7 +328,7 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA { ...@@ -339,7 +328,7 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA {
U16 MinimumSectorAlignment; /*0x08 */ U16 MinimumSectorAlignment; /*0x08 */
U16 Reserved3; /*0x0A */ U16 Reserved3; /*0x0A */
U32 Reserved4; /*0x0C */ U32 Reserved4; /*0x0C */
MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS]; /*0x10 */ MPI2_FLASH_LAYOUT Layout[]; /*0x10 */
} MPI2_FLASH_LAYOUT_DATA, *PTR_MPI2_FLASH_LAYOUT_DATA, } MPI2_FLASH_LAYOUT_DATA, *PTR_MPI2_FLASH_LAYOUT_DATA,
Mpi2FlashLayoutData_t, *pMpi2FlashLayoutData_t; Mpi2FlashLayoutData_t, *pMpi2FlashLayoutData_t;
...@@ -373,12 +362,9 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA { ...@@ -373,12 +362,9 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA {
/*Supported Devices Extended Image Data */ /*Supported Devices Extended Image Data */
/* /*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to *Host code (drivers, BIOS, utilities, etc.) should check NumberOfDevices at
*one and check NumberOfDevices at runtime. *runtime before using SupportedDevice[].
*/ */
#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1)
#endif
typedef struct _MPI2_SUPPORTED_DEVICE { typedef struct _MPI2_SUPPORTED_DEVICE {
U16 DeviceID; /*0x00 */ U16 DeviceID; /*0x00 */
...@@ -399,7 +385,7 @@ typedef struct _MPI2_SUPPORTED_DEVICES_DATA { ...@@ -399,7 +385,7 @@ typedef struct _MPI2_SUPPORTED_DEVICES_DATA {
U8 Reserved2; /*0x03 */ U8 Reserved2; /*0x03 */
U32 Reserved3; /*0x04 */ U32 Reserved3; /*0x04 */
MPI2_SUPPORTED_DEVICE MPI2_SUPPORTED_DEVICE
SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES];/*0x08 */ SupportedDevice[]; /*0x08 */
} MPI2_SUPPORTED_DEVICES_DATA, *PTR_MPI2_SUPPORTED_DEVICES_DATA, } MPI2_SUPPORTED_DEVICES_DATA, *PTR_MPI2_SUPPORTED_DEVICES_DATA,
Mpi2SupportedDevicesData_t, *pMpi2SupportedDevicesData_t; Mpi2SupportedDevicesData_t, *pMpi2SupportedDevicesData_t;
...@@ -464,7 +450,7 @@ typedef struct _MPI25_ENCRYPTED_HASH_ENTRY { ...@@ -464,7 +450,7 @@ typedef struct _MPI25_ENCRYPTED_HASH_ENTRY {
U8 EncryptionAlgorithm; /*0x02 */ U8 EncryptionAlgorithm; /*0x02 */
U8 Reserved1; /*0x03 */ U8 Reserved1; /*0x03 */
U32 Reserved2; /*0x04 */ U32 Reserved2; /*0x04 */
U32 EncryptedHash[1]; /*0x08 */ /* variable length */ U32 EncryptedHash[]; /*0x08 */
} MPI25_ENCRYPTED_HASH_ENTRY, *PTR_MPI25_ENCRYPTED_HASH_ENTRY, } MPI25_ENCRYPTED_HASH_ENTRY, *PTR_MPI25_ENCRYPTED_HASH_ENTRY,
Mpi25EncryptedHashEntry_t, *pMpi25EncryptedHashEntry_t; Mpi25EncryptedHashEntry_t, *pMpi25EncryptedHashEntry_t;
...@@ -508,7 +494,7 @@ typedef struct _MPI25_ENCRYPTED_HASH_DATA { ...@@ -508,7 +494,7 @@ typedef struct _MPI25_ENCRYPTED_HASH_DATA {
U8 NumHash; /*0x01 */ U8 NumHash; /*0x01 */
U16 Reserved1; /*0x02 */ U16 Reserved1; /*0x02 */
U32 Reserved2; /*0x04 */ U32 Reserved2; /*0x04 */
MPI25_ENCRYPTED_HASH_ENTRY EncryptedHashEntry[1]; /*0x08 */ MPI25_ENCRYPTED_HASH_ENTRY EncryptedHashEntry[]; /*0x08 */
} MPI25_ENCRYPTED_HASH_DATA, *PTR_MPI25_ENCRYPTED_HASH_DATA, } MPI25_ENCRYPTED_HASH_DATA, *PTR_MPI25_ENCRYPTED_HASH_DATA,
Mpi25EncryptedHashData_t, *pMpi25EncryptedHashData_t; Mpi25EncryptedHashData_t, *pMpi25EncryptedHashData_t;
......
...@@ -808,12 +808,9 @@ typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK { ...@@ -808,12 +808,9 @@ typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK {
/*Integrated RAID Configuration Change List Event data */ /*Integrated RAID Configuration Change List Event data */
/* /*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to *Host code (drivers, BIOS, utilities, etc.) should check NumElements at
*one and check NumElements at runtime. *runtime before using ConfigElement[].
*/ */
#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1)
#endif
typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT { typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT {
U16 ElementFlags; /*0x00 */ U16 ElementFlags; /*0x00 */
...@@ -848,7 +845,7 @@ typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST { ...@@ -848,7 +845,7 @@ typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST {
U8 ConfigNum; /*0x03 */ U8 ConfigNum; /*0x03 */
U32 Flags; /*0x04 */ U32 Flags; /*0x04 */
MPI2_EVENT_IR_CONFIG_ELEMENT MPI2_EVENT_IR_CONFIG_ELEMENT
ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];/*0x08 */ ConfigElement[];/*0x08 */
} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
*PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, *PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
Mpi2EventDataIrConfigChangeList_t, Mpi2EventDataIrConfigChangeList_t,
...@@ -969,12 +966,9 @@ typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW { ...@@ -969,12 +966,9 @@ typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW {
/*SAS Topology Change List Event data */ /*SAS Topology Change List Event data */
/* /*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to *Host code (drivers, BIOS, utilities, etc.) should check NumEntries at
*one and check NumEntries at runtime. *runtime before using PHY[].
*/ */
#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1)
#endif
typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY { typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY {
U16 AttachedDevHandle; /*0x00 */ U16 AttachedDevHandle; /*0x00 */
...@@ -994,7 +988,7 @@ typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST { ...@@ -994,7 +988,7 @@ typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST {
U8 ExpStatus; /*0x0A */ U8 ExpStatus; /*0x0A */
U8 PhysicalPort; /*0x0B */ U8 PhysicalPort; /*0x0B */
MPI2_EVENT_SAS_TOPO_PHY_ENTRY MPI2_EVENT_SAS_TOPO_PHY_ENTRY
PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /*0x0C */ PHY[]; /*0x0C */
} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
*PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, *PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
Mpi2EventDataSasTopologyChangeList_t, Mpi2EventDataSasTopologyChangeList_t,
...@@ -1229,12 +1223,9 @@ typedef struct _MPI26_EVENT_DATA_PCIE_ENUMERATION { ...@@ -1229,12 +1223,9 @@ typedef struct _MPI26_EVENT_DATA_PCIE_ENUMERATION {
/*PCIe Topology Change List Event data (MPI v2.6 and later) */ /*PCIe Topology Change List Event data (MPI v2.6 and later) */
/* /*
*Host code (drivers, BIOS, utilities, etc.) should leave this define set to *Host code (drivers, BIOS, utilities, etc.) should check NumEntries at
*one and check NumEntries at runtime. *runtime before using PortEntry[].
*/ */
#ifndef MPI26_EVENT_PCIE_TOPO_PORT_COUNT
#define MPI26_EVENT_PCIE_TOPO_PORT_COUNT (1)
#endif
typedef struct _MPI26_EVENT_PCIE_TOPO_PORT_ENTRY { typedef struct _MPI26_EVENT_PCIE_TOPO_PORT_ENTRY {
U16 AttachedDevHandle; /*0x00 */ U16 AttachedDevHandle; /*0x00 */
...@@ -1286,7 +1277,7 @@ typedef struct _MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST { ...@@ -1286,7 +1277,7 @@ typedef struct _MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST {
U8 SwitchStatus; /*0x0A */ U8 SwitchStatus; /*0x0A */
U8 PhysicalPort; /*0x0B */ U8 PhysicalPort; /*0x0B */
MPI26_EVENT_PCIE_TOPO_PORT_ENTRY MPI26_EVENT_PCIE_TOPO_PORT_ENTRY
PortEntry[MPI26_EVENT_PCIE_TOPO_PORT_COUNT]; /*0x0C */ PortEntry[]; /*0x0C */
} MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, } MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST,
*PTR_MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST, *PTR_MPI26_EVENT_DATA_PCIE_TOPOLOGY_CHANGE_LIST,
Mpi26EventDataPCIeTopologyChangeList_t, Mpi26EventDataPCIeTopologyChangeList_t,
......
...@@ -4893,8 +4893,7 @@ mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, ...@@ -4893,8 +4893,7 @@ mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
if (!num_phys) if (!num_phys)
return; return;
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys * sz = struct_size(sas_iounit_pg1, PhyData, num_phys);
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) { if (!sas_iounit_pg1) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -5044,7 +5043,7 @@ _base_get_event_diag_triggers(struct MPT3SAS_ADAPTER *ioc) ...@@ -5044,7 +5043,7 @@ _base_get_event_diag_triggers(struct MPT3SAS_ADAPTER *ioc)
{ {
Mpi26DriverTriggerPage2_t trigger_pg2; Mpi26DriverTriggerPage2_t trigger_pg2;
struct SL_WH_EVENT_TRIGGER_T *event_tg; struct SL_WH_EVENT_TRIGGER_T *event_tg;
MPI26_DRIVER_MPI_EVENT_TIGGER_ENTRY *mpi_event_tg; MPI26_DRIVER_MPI_EVENT_TRIGGER_ENTRY *mpi_event_tg;
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
int r = 0, i = 0; int r = 0, i = 0;
u16 count = 0; u16 count = 0;
...@@ -5096,7 +5095,7 @@ _base_get_scsi_diag_triggers(struct MPT3SAS_ADAPTER *ioc) ...@@ -5096,7 +5095,7 @@ _base_get_scsi_diag_triggers(struct MPT3SAS_ADAPTER *ioc)
{ {
Mpi26DriverTriggerPage3_t trigger_pg3; Mpi26DriverTriggerPage3_t trigger_pg3;
struct SL_WH_SCSI_TRIGGER_T *scsi_tg; struct SL_WH_SCSI_TRIGGER_T *scsi_tg;
MPI26_DRIVER_SCSI_SENSE_TIGGER_ENTRY *mpi_scsi_tg; MPI26_DRIVER_SCSI_SENSE_TRIGGER_ENTRY *mpi_scsi_tg;
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
int r = 0, i = 0; int r = 0, i = 0;
u16 count = 0; u16 count = 0;
...@@ -5148,7 +5147,7 @@ _base_get_mpi_diag_triggers(struct MPT3SAS_ADAPTER *ioc) ...@@ -5148,7 +5147,7 @@ _base_get_mpi_diag_triggers(struct MPT3SAS_ADAPTER *ioc)
{ {
Mpi26DriverTriggerPage4_t trigger_pg4; Mpi26DriverTriggerPage4_t trigger_pg4;
struct SL_WH_MPI_TRIGGER_T *status_tg; struct SL_WH_MPI_TRIGGER_T *status_tg;
MPI26_DRIVER_IOCSTATUS_LOGINFO_TIGGER_ENTRY *mpi_status_tg; MPI26_DRIVER_IOCSTATUS_LOGINFO_TRIGGER_ENTRY *mpi_status_tg;
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
int r = 0, i = 0; int r = 0, i = 0;
u16 count = 0; u16 count = 0;
...@@ -5379,10 +5378,9 @@ _base_update_diag_trigger_pages(struct MPT3SAS_ADAPTER *ioc) ...@@ -5379,10 +5378,9 @@ _base_update_diag_trigger_pages(struct MPT3SAS_ADAPTER *ioc)
static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc) static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc)
{ {
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL; Mpi2SasIOUnitPage1_t sas_iounit_pg1;
Mpi26PCIeIOUnitPage1_t pcie_iounit_pg1; Mpi26PCIeIOUnitPage1_t pcie_iounit_pg1;
u16 depth; u16 depth;
int sz;
int rc = 0; int rc = 0;
ioc->max_wideport_qd = MPT3SAS_SAS_QUEUE_DEPTH; ioc->max_wideport_qd = MPT3SAS_SAS_QUEUE_DEPTH;
...@@ -5392,28 +5390,21 @@ static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc) ...@@ -5392,28 +5390,21 @@ static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc)
if (!ioc->is_gen35_ioc) if (!ioc->is_gen35_ioc)
goto out; goto out;
/* sas iounit page 1 */ /* sas iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData);
sas_iounit_pg1 = kzalloc(sizeof(Mpi2SasIOUnitPage1_t), GFP_KERNEL);
if (!sas_iounit_pg1) {
pr_err("%s: failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__);
return rc;
}
rc = mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply, rc = mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
sas_iounit_pg1, sz); &sas_iounit_pg1, sizeof(Mpi2SasIOUnitPage1_t));
if (rc) { if (rc) {
pr_err("%s: failure at %s:%d/%s()!\n", pr_err("%s: failure at %s:%d/%s()!\n",
ioc->name, __FILE__, __LINE__, __func__); ioc->name, __FILE__, __LINE__, __func__);
goto out; goto out;
} }
depth = le16_to_cpu(sas_iounit_pg1->SASWideMaxQueueDepth); depth = le16_to_cpu(sas_iounit_pg1.SASWideMaxQueueDepth);
ioc->max_wideport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); ioc->max_wideport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH);
depth = le16_to_cpu(sas_iounit_pg1->SASNarrowMaxQueueDepth); depth = le16_to_cpu(sas_iounit_pg1.SASNarrowMaxQueueDepth);
ioc->max_narrowport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); ioc->max_narrowport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH);
depth = sas_iounit_pg1->SATAMaxQDepth; depth = sas_iounit_pg1.SATAMaxQDepth;
ioc->max_sata_qd = (depth ? depth : MPT3SAS_SATA_QUEUE_DEPTH); ioc->max_sata_qd = (depth ? depth : MPT3SAS_SATA_QUEUE_DEPTH);
/* pcie iounit page 1 */ /* pcie iounit page 1 */
...@@ -5432,7 +5423,6 @@ static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc) ...@@ -5432,7 +5423,6 @@ static int _base_assign_fw_reported_qd(struct MPT3SAS_ADAPTER *ioc)
"MaxWidePortQD: 0x%x MaxNarrowPortQD: 0x%x MaxSataQD: 0x%x MaxNvmeQD: 0x%x\n", "MaxWidePortQD: 0x%x MaxNarrowPortQD: 0x%x MaxSataQD: 0x%x MaxNvmeQD: 0x%x\n",
ioc->max_wideport_qd, ioc->max_narrowport_qd, ioc->max_wideport_qd, ioc->max_narrowport_qd,
ioc->max_sata_qd, ioc->max_nvme_qd)); ioc->max_sata_qd, ioc->max_nvme_qd));
kfree(sas_iounit_pg1);
return rc; return rc;
} }
...@@ -5588,6 +5578,7 @@ mpt3sas_atto_init(struct MPT3SAS_ADAPTER *ioc) ...@@ -5588,6 +5578,7 @@ mpt3sas_atto_init(struct MPT3SAS_ADAPTER *ioc)
static int static int
_base_static_config_pages(struct MPT3SAS_ADAPTER *ioc) _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
{ {
Mpi2IOUnitPage8_t iounit_pg8;
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
u32 iounit_pg1_flags; u32 iounit_pg1_flags;
int tg_flags = 0; int tg_flags = 0;
...@@ -5684,7 +5675,7 @@ _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc) ...@@ -5684,7 +5675,7 @@ _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
rc = mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); rc = mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
if (rc) if (rc)
return rc; return rc;
rc = mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8); rc = mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &iounit_pg8);
if (rc) if (rc)
return rc; return rc;
_base_display_ioc_capabilities(ioc); _base_display_ioc_capabilities(ioc);
...@@ -5706,8 +5697,8 @@ _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc) ...@@ -5706,8 +5697,8 @@ _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
if (rc) if (rc)
return rc; return rc;
if (ioc->iounit_pg8.NumSensors) if (iounit_pg8.NumSensors)
ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors; ioc->temp_sensors_count = iounit_pg8.NumSensors;
if (ioc->is_aero_ioc) { if (ioc->is_aero_ioc) {
rc = _base_update_ioc_page1_inlinewith_perf_mode(ioc); rc = _base_update_ioc_page1_inlinewith_perf_mode(ioc);
if (rc) if (rc)
......
...@@ -1237,7 +1237,6 @@ typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); ...@@ -1237,7 +1237,6 @@ typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
* @ioc_pg8: static ioc page 8 * @ioc_pg8: static ioc page 8
* @iounit_pg0: static iounit page 0 * @iounit_pg0: static iounit page 0
* @iounit_pg1: static iounit page 1 * @iounit_pg1: static iounit page 1
* @iounit_pg8: static iounit page 8
* @sas_hba: sas host object * @sas_hba: sas host object
* @sas_expander_list: expander object list * @sas_expander_list: expander object list
* @enclosure_list: enclosure object list * @enclosure_list: enclosure object list
...@@ -1465,7 +1464,6 @@ struct MPT3SAS_ADAPTER { ...@@ -1465,7 +1464,6 @@ struct MPT3SAS_ADAPTER {
Mpi2IOCPage8_t ioc_pg8; Mpi2IOCPage8_t ioc_pg8;
Mpi2IOUnitPage0_t iounit_pg0; Mpi2IOUnitPage0_t iounit_pg0;
Mpi2IOUnitPage1_t iounit_pg1; Mpi2IOUnitPage1_t iounit_pg1;
Mpi2IOUnitPage8_t iounit_pg8;
Mpi2IOCPage1_t ioc_pg1_copy; Mpi2IOCPage1_t ioc_pg1_copy;
struct _boot_device req_boot_device; struct _boot_device req_boot_device;
......
...@@ -2334,7 +2334,7 @@ mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc, ...@@ -2334,7 +2334,7 @@ mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
tg_pg2.NumMPIEventTrigger = 0; tg_pg2.NumMPIEventTrigger = 0;
memset(&tg_pg2.MPIEventTriggers[0], 0, memset(&tg_pg2.MPIEventTriggers[0], 0,
NUM_VALID_ENTRIES * sizeof( NUM_VALID_ENTRIES * sizeof(
MPI26_DRIVER_MPI_EVENT_TIGGER_ENTRY)); MPI26_DRIVER_MPI_EVENT_TRIGGER_ENTRY));
} }
rc = _config_set_driver_trigger_pg2(ioc, &mpi_reply, &tg_pg2); rc = _config_set_driver_trigger_pg2(ioc, &mpi_reply, &tg_pg2);
...@@ -2493,7 +2493,7 @@ mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc, ...@@ -2493,7 +2493,7 @@ mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
tg_pg3.NumSCSISenseTrigger = 0; tg_pg3.NumSCSISenseTrigger = 0;
memset(&tg_pg3.SCSISenseTriggers[0], 0, memset(&tg_pg3.SCSISenseTriggers[0], 0,
NUM_VALID_ENTRIES * sizeof( NUM_VALID_ENTRIES * sizeof(
MPI26_DRIVER_SCSI_SENSE_TIGGER_ENTRY)); MPI26_DRIVER_SCSI_SENSE_TRIGGER_ENTRY));
} }
rc = _config_set_driver_trigger_pg3(ioc, &mpi_reply, &tg_pg3); rc = _config_set_driver_trigger_pg3(ioc, &mpi_reply, &tg_pg3);
...@@ -2649,7 +2649,7 @@ mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc, ...@@ -2649,7 +2649,7 @@ mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
tg_pg4.NumIOCStatusLogInfoTrigger = 0; tg_pg4.NumIOCStatusLogInfoTrigger = 0;
memset(&tg_pg4.IOCStatusLoginfoTriggers[0], 0, memset(&tg_pg4.IOCStatusLoginfoTriggers[0], 0,
NUM_VALID_ENTRIES * sizeof( NUM_VALID_ENTRIES * sizeof(
MPI26_DRIVER_IOCSTATUS_LOGINFO_TIGGER_ENTRY)); MPI26_DRIVER_IOCSTATUS_LOGINFO_TRIGGER_ENTRY));
} }
rc = _config_set_driver_trigger_pg4(ioc, &mpi_reply, &tg_pg4); rc = _config_set_driver_trigger_pg4(ioc, &mpi_reply, &tg_pg4);
......
...@@ -2431,8 +2431,7 @@ _scsih_get_volume_capabilities(struct MPT3SAS_ADAPTER *ioc, ...@@ -2431,8 +2431,7 @@ _scsih_get_volume_capabilities(struct MPT3SAS_ADAPTER *ioc,
} }
raid_device->num_pds = num_pds; raid_device->num_pds = num_pds;
sz = offsetof(Mpi2RaidVolPage0_t, PhysDisk) + (num_pds * sz = struct_size(vol_pg0, PhysDisk, num_pds);
sizeof(Mpi2RaidVol0PhysDisk_t));
vol_pg0 = kzalloc(sz, GFP_KERNEL); vol_pg0 = kzalloc(sz, GFP_KERNEL);
if (!vol_pg0) { if (!vol_pg0) {
dfailprintk(ioc, dfailprintk(ioc,
...@@ -5966,8 +5965,7 @@ _scsih_update_vphys_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -5966,8 +5965,7 @@ _scsih_update_vphys_after_reset(struct MPT3SAS_ADAPTER *ioc)
/* /*
* Read SASIOUnitPage0 to get each HBA Phy's data. * Read SASIOUnitPage0 to get each HBA Phy's data.
*/ */
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + sz = struct_size(sas_iounit_pg0, PhyData, ioc->sas_hba.num_phys);
(ioc->sas_hba.num_phys * sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) { if (!sas_iounit_pg0) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -6145,8 +6143,7 @@ _scsih_get_port_table_after_reset(struct MPT3SAS_ADAPTER *ioc, ...@@ -6145,8 +6143,7 @@ _scsih_get_port_table_after_reset(struct MPT3SAS_ADAPTER *ioc,
u64 attached_sas_addr; u64 attached_sas_addr;
u8 found = 0, port_count = 0, port_id; u8 found = 0, port_count = 0, port_id;
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys sz = struct_size(sas_iounit_pg0, PhyData, ioc->sas_hba.num_phys);
* sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) { if (!sas_iounit_pg0) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -6579,8 +6576,7 @@ _scsih_sas_host_refresh(struct MPT3SAS_ADAPTER *ioc) ...@@ -6579,8 +6576,7 @@ _scsih_sas_host_refresh(struct MPT3SAS_ADAPTER *ioc)
ioc_info(ioc, "updating handles for sas_host(0x%016llx)\n", ioc_info(ioc, "updating handles for sas_host(0x%016llx)\n",
(u64)ioc->sas_hba.sas_address)); (u64)ioc->sas_hba.sas_address));
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys sz = struct_size(sas_iounit_pg0, PhyData, ioc->sas_hba.num_phys);
* sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) { if (!sas_iounit_pg0) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -6731,8 +6727,7 @@ _scsih_sas_host_add(struct MPT3SAS_ADAPTER *ioc) ...@@ -6731,8 +6727,7 @@ _scsih_sas_host_add(struct MPT3SAS_ADAPTER *ioc)
ioc->sas_hba.num_phys = num_phys; ioc->sas_hba.num_phys = num_phys;
/* sas_iounit page 0 */ /* sas_iounit page 0 */
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys * sz = struct_size(sas_iounit_pg0, PhyData, ioc->sas_hba.num_phys);
sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) { if (!sas_iounit_pg0) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -6754,8 +6749,7 @@ _scsih_sas_host_add(struct MPT3SAS_ADAPTER *ioc) ...@@ -6754,8 +6749,7 @@ _scsih_sas_host_add(struct MPT3SAS_ADAPTER *ioc)
} }
/* sas_iounit page 1 */ /* sas_iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys * sz = struct_size(sas_iounit_pg1, PhyData, ioc->sas_hba.num_phys);
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) { if (!sas_iounit_pg1) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -10376,8 +10370,8 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10376,8 +10370,8 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
Mpi2ExpanderPage0_t expander_pg0; Mpi2ExpanderPage0_t expander_pg0;
Mpi2SasDevicePage0_t sas_device_pg0; Mpi2SasDevicePage0_t sas_device_pg0;
Mpi26PCIeDevicePage0_t pcie_device_pg0; Mpi26PCIeDevicePage0_t pcie_device_pg0;
Mpi2RaidVolPage1_t *volume_pg1; Mpi2RaidVolPage1_t volume_pg1;
Mpi2RaidVolPage0_t *volume_pg0; Mpi2RaidVolPage0_t volume_pg0;
Mpi2RaidPhysDiskPage0_t pd_pg0; Mpi2RaidPhysDiskPage0_t pd_pg0;
Mpi2EventIrConfigElement_t element; Mpi2EventIrConfigElement_t element;
Mpi2ConfigReply_t mpi_reply; Mpi2ConfigReply_t mpi_reply;
...@@ -10392,16 +10386,6 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10392,16 +10386,6 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
u8 retry_count; u8 retry_count;
unsigned long flags; unsigned long flags;
volume_pg0 = kzalloc(sizeof(*volume_pg0), GFP_KERNEL);
if (!volume_pg0)
return;
volume_pg1 = kzalloc(sizeof(*volume_pg1), GFP_KERNEL);
if (!volume_pg1) {
kfree(volume_pg0);
return;
}
ioc_info(ioc, "scan devices: start\n"); ioc_info(ioc, "scan devices: start\n");
_scsih_sas_host_refresh(ioc); _scsih_sas_host_refresh(ioc);
...@@ -10511,7 +10495,7 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10511,7 +10495,7 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
/* volumes */ /* volumes */
handle = 0xFFFF; handle = 0xFFFF;
while (!(mpt3sas_config_get_raid_volume_pg1(ioc, &mpi_reply, while (!(mpt3sas_config_get_raid_volume_pg1(ioc, &mpi_reply,
volume_pg1, MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, handle))) { &volume_pg1, MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, handle))) {
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
MPI2_IOCSTATUS_MASK; MPI2_IOCSTATUS_MASK;
if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
...@@ -10519,15 +10503,15 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10519,15 +10503,15 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
ioc_status, le32_to_cpu(mpi_reply.IOCLogInfo)); ioc_status, le32_to_cpu(mpi_reply.IOCLogInfo));
break; break;
} }
handle = le16_to_cpu(volume_pg1->DevHandle); handle = le16_to_cpu(volume_pg1.DevHandle);
spin_lock_irqsave(&ioc->raid_device_lock, flags); spin_lock_irqsave(&ioc->raid_device_lock, flags);
raid_device = _scsih_raid_device_find_by_wwid(ioc, raid_device = _scsih_raid_device_find_by_wwid(ioc,
le64_to_cpu(volume_pg1->WWID)); le64_to_cpu(volume_pg1.WWID));
spin_unlock_irqrestore(&ioc->raid_device_lock, flags); spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
if (raid_device) if (raid_device)
continue; continue;
if (mpt3sas_config_get_raid_volume_pg0(ioc, &mpi_reply, if (mpt3sas_config_get_raid_volume_pg0(ioc, &mpi_reply,
volume_pg0, MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, handle, &volume_pg0, MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, handle,
sizeof(Mpi2RaidVolPage0_t))) sizeof(Mpi2RaidVolPage0_t)))
continue; continue;
ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
...@@ -10537,17 +10521,17 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10537,17 +10521,17 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
ioc_status, le32_to_cpu(mpi_reply.IOCLogInfo)); ioc_status, le32_to_cpu(mpi_reply.IOCLogInfo));
break; break;
} }
if (volume_pg0->VolumeState == MPI2_RAID_VOL_STATE_OPTIMAL || if (volume_pg0.VolumeState == MPI2_RAID_VOL_STATE_OPTIMAL ||
volume_pg0->VolumeState == MPI2_RAID_VOL_STATE_ONLINE || volume_pg0.VolumeState == MPI2_RAID_VOL_STATE_ONLINE ||
volume_pg0->VolumeState == MPI2_RAID_VOL_STATE_DEGRADED) { volume_pg0.VolumeState == MPI2_RAID_VOL_STATE_DEGRADED) {
memset(&element, 0, sizeof(Mpi2EventIrConfigElement_t)); memset(&element, 0, sizeof(Mpi2EventIrConfigElement_t));
element.ReasonCode = MPI2_EVENT_IR_CHANGE_RC_ADDED; element.ReasonCode = MPI2_EVENT_IR_CHANGE_RC_ADDED;
element.VolDevHandle = volume_pg1->DevHandle; element.VolDevHandle = volume_pg1.DevHandle;
ioc_info(ioc, "\tBEFORE adding volume: handle (0x%04x)\n", ioc_info(ioc, "\tBEFORE adding volume: handle (0x%04x)\n",
volume_pg1->DevHandle); volume_pg1.DevHandle);
_scsih_sas_volume_add(ioc, &element); _scsih_sas_volume_add(ioc, &element);
ioc_info(ioc, "\tAFTER adding volume: handle (0x%04x)\n", ioc_info(ioc, "\tAFTER adding volume: handle (0x%04x)\n",
volume_pg1->DevHandle); volume_pg1.DevHandle);
} }
} }
...@@ -10636,9 +10620,6 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc) ...@@ -10636,9 +10620,6 @@ _scsih_scan_for_devices_after_reset(struct MPT3SAS_ADAPTER *ioc)
handle, (u64)le64_to_cpu(pcie_device_pg0.WWID)); handle, (u64)le64_to_cpu(pcie_device_pg0.WWID));
} }
kfree(volume_pg0);
kfree(volume_pg1);
ioc_info(ioc, "\tpcie devices: pcie end devices complete\n"); ioc_info(ioc, "\tpcie devices: pcie end devices complete\n");
ioc_info(ioc, "scan devices: complete\n"); ioc_info(ioc, "scan devices: complete\n");
} }
......
...@@ -1792,8 +1792,7 @@ _transport_phy_enable(struct sas_phy *phy, int enable) ...@@ -1792,8 +1792,7 @@ _transport_phy_enable(struct sas_phy *phy, int enable)
/* handle hba phys */ /* handle hba phys */
/* read sas_iounit page 0 */ /* read sas_iounit page 0 */
sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys * sz = struct_size(sas_iounit_pg0, PhyData, ioc->sas_hba.num_phys);
sizeof(Mpi2SasIOUnit0PhyData_t));
sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg0) { if (!sas_iounit_pg0) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -1833,8 +1832,7 @@ _transport_phy_enable(struct sas_phy *phy, int enable) ...@@ -1833,8 +1832,7 @@ _transport_phy_enable(struct sas_phy *phy, int enable)
} }
/* read sas_iounit page 1 */ /* read sas_iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys * sz = struct_size(sas_iounit_pg1, PhyData, ioc->sas_hba.num_phys);
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) { if (!sas_iounit_pg1) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
...@@ -1944,8 +1942,7 @@ _transport_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) ...@@ -1944,8 +1942,7 @@ _transport_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
/* handle hba phys */ /* handle hba phys */
/* sas_iounit page 1 */ /* sas_iounit page 1 */
sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys * sz = struct_size(sas_iounit_pg1, PhyData, ioc->sas_hba.num_phys);
sizeof(Mpi2SasIOUnit1PhyData_t));
sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
if (!sas_iounit_pg1) { if (!sas_iounit_pg1) {
ioc_err(ioc, "failure at %s:%d/%s()!\n", ioc_err(ioc, "failure at %s:%d/%s()!\n",
......
...@@ -20,12 +20,12 @@ ...@@ -20,12 +20,12 @@
#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_PERSISTENT_TRIGGER (0xE0) #define MPI2_CONFIG_EXTPAGETYPE_DRIVER_PERSISTENT_TRIGGER (0xE0)
#define MPI26_DRIVER_TRIGGER_PAGE0_PAGEVERSION (0x01) #define MPI26_DRIVER_TRIGGER_PAGE0_PAGEVERSION (0x01)
typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_0 { typedef struct _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_0 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
U16 TriggerFlags; /* 0x08 */ U16 TriggerFlags; /* 0x08 */
U16 Reserved0xA; /* 0x0A */ U16 Reserved0xA; /* 0x0A */
U32 Reserved0xC[61]; /* 0x0C */ U32 Reserved0xC[61]; /* 0x0C */
} _MPI26_CONFIG_PAGE_DRIVER_TIGGER_0, Mpi26DriverTriggerPage0_t; } _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_0, Mpi26DriverTriggerPage0_t;
/* Trigger Flags */ /* Trigger Flags */
#define MPI26_DRIVER_TRIGGER0_FLAG_MASTER_TRIGGER_VALID (0x0001) #define MPI26_DRIVER_TRIGGER0_FLAG_MASTER_TRIGGER_VALID (0x0001)
...@@ -34,61 +34,61 @@ typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_0 { ...@@ -34,61 +34,61 @@ typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_0 {
#define MPI26_DRIVER_TRIGGER0_FLAG_LOGINFO_TRIGGER_VALID (0x0008) #define MPI26_DRIVER_TRIGGER0_FLAG_LOGINFO_TRIGGER_VALID (0x0008)
#define MPI26_DRIVER_TRIGGER_PAGE1_PAGEVERSION (0x01) #define MPI26_DRIVER_TRIGGER_PAGE1_PAGEVERSION (0x01)
typedef struct _MPI26_DRIVER_MASTER_TIGGER_ENTRY { typedef struct _MPI26_DRIVER_MASTER_TRIGGER_ENTRY {
U32 MasterTriggerFlags; U32 MasterTriggerFlags;
} MPI26_DRIVER_MASTER_TIGGER_ENTRY; } MPI26_DRIVER_MASTER_TRIGGER_ENTRY;
#define MPI26_MAX_MASTER_TRIGGERS (1) #define MPI26_MAX_MASTER_TRIGGERS (1)
typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_1 { typedef struct _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_1 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
U16 NumMasterTrigger; /* 0x08 */ U16 NumMasterTrigger; /* 0x08 */
U16 Reserved0xA; /* 0x0A */ U16 Reserved0xA; /* 0x0A */
MPI26_DRIVER_MASTER_TIGGER_ENTRY MasterTriggers[MPI26_MAX_MASTER_TRIGGERS]; /* 0x0C */ MPI26_DRIVER_MASTER_TRIGGER_ENTRY MasterTriggers[MPI26_MAX_MASTER_TRIGGERS]; /* 0x0C */
} MPI26_CONFIG_PAGE_DRIVER_TIGGER_1, Mpi26DriverTriggerPage1_t; } MPI26_CONFIG_PAGE_DRIVER_TRIGGER_1, Mpi26DriverTriggerPage1_t;
#define MPI26_DRIVER_TRIGGER_PAGE2_PAGEVERSION (0x01) #define MPI26_DRIVER_TRIGGER_PAGE2_PAGEVERSION (0x01)
typedef struct _MPI26_DRIVER_MPI_EVENT_TIGGER_ENTRY { typedef struct _MPI26_DRIVER_MPI_EVENT_TRIGGER_ENTRY {
U16 MPIEventCode; /* 0x00 */ U16 MPIEventCode; /* 0x00 */
U16 MPIEventCodeSpecific; /* 0x02 */ U16 MPIEventCodeSpecific; /* 0x02 */
} MPI26_DRIVER_MPI_EVENT_TIGGER_ENTRY; } MPI26_DRIVER_MPI_EVENT_TRIGGER_ENTRY;
#define MPI26_MAX_MPI_EVENT_TRIGGERS (20) #define MPI26_MAX_MPI_EVENT_TRIGGERS (20)
typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_2 { typedef struct _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_2 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
U16 NumMPIEventTrigger; /* 0x08 */ U16 NumMPIEventTrigger; /* 0x08 */
U16 Reserved0xA; /* 0x0A */ U16 Reserved0xA; /* 0x0A */
MPI26_DRIVER_MPI_EVENT_TIGGER_ENTRY MPIEventTriggers[MPI26_MAX_MPI_EVENT_TRIGGERS]; /* 0x0C */ MPI26_DRIVER_MPI_EVENT_TRIGGER_ENTRY MPIEventTriggers[MPI26_MAX_MPI_EVENT_TRIGGERS]; /* 0x0C */
} MPI26_CONFIG_PAGE_DRIVER_TIGGER_2, Mpi26DriverTriggerPage2_t; } MPI26_CONFIG_PAGE_DRIVER_TRIGGER_2, Mpi26DriverTriggerPage2_t;
#define MPI26_DRIVER_TRIGGER_PAGE3_PAGEVERSION (0x01) #define MPI26_DRIVER_TRIGGER_PAGE3_PAGEVERSION (0x01)
typedef struct _MPI26_DRIVER_SCSI_SENSE_TIGGER_ENTRY { typedef struct _MPI26_DRIVER_SCSI_SENSE_TRIGGER_ENTRY {
U8 ASCQ; /* 0x00 */ U8 ASCQ; /* 0x00 */
U8 ASC; /* 0x01 */ U8 ASC; /* 0x01 */
U8 SenseKey; /* 0x02 */ U8 SenseKey; /* 0x02 */
U8 Reserved; /* 0x03 */ U8 Reserved; /* 0x03 */
} MPI26_DRIVER_SCSI_SENSE_TIGGER_ENTRY; } MPI26_DRIVER_SCSI_SENSE_TRIGGER_ENTRY;
#define MPI26_MAX_SCSI_SENSE_TRIGGERS (20) #define MPI26_MAX_SCSI_SENSE_TRIGGERS (20)
typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_3 { typedef struct _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_3 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
U16 NumSCSISenseTrigger; /* 0x08 */ U16 NumSCSISenseTrigger; /* 0x08 */
U16 Reserved0xA; /* 0x0A */ U16 Reserved0xA; /* 0x0A */
MPI26_DRIVER_SCSI_SENSE_TIGGER_ENTRY SCSISenseTriggers[MPI26_MAX_SCSI_SENSE_TRIGGERS]; /* 0x0C */ MPI26_DRIVER_SCSI_SENSE_TRIGGER_ENTRY SCSISenseTriggers[MPI26_MAX_SCSI_SENSE_TRIGGERS]; /* 0x0C */
} MPI26_CONFIG_PAGE_DRIVER_TIGGER_3, Mpi26DriverTriggerPage3_t; } MPI26_CONFIG_PAGE_DRIVER_TRIGGER_3, Mpi26DriverTriggerPage3_t;
#define MPI26_DRIVER_TRIGGER_PAGE4_PAGEVERSION (0x01) #define MPI26_DRIVER_TRIGGER_PAGE4_PAGEVERSION (0x01)
typedef struct _MPI26_DRIVER_IOCSTATUS_LOGINFO_TIGGER_ENTRY { typedef struct _MPI26_DRIVER_IOCSTATUS_LOGINFO_TRIGGER_ENTRY {
U16 IOCStatus; /* 0x00 */ U16 IOCStatus; /* 0x00 */
U16 Reserved; /* 0x02 */ U16 Reserved; /* 0x02 */
U32 LogInfo; /* 0x04 */ U32 LogInfo; /* 0x04 */
} MPI26_DRIVER_IOCSTATUS_LOGINFO_TIGGER_ENTRY; } MPI26_DRIVER_IOCSTATUS_LOGINFO_TRIGGER_ENTRY;
#define MPI26_MAX_LOGINFO_TRIGGERS (20) #define MPI26_MAX_LOGINFO_TRIGGERS (20)
typedef struct _MPI26_CONFIG_PAGE_DRIVER_TIGGER_4 { typedef struct _MPI26_CONFIG_PAGE_DRIVER_TRIGGER_4 {
MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
U16 NumIOCStatusLogInfoTrigger; /* 0x08 */ U16 NumIOCStatusLogInfoTrigger; /* 0x08 */
U16 Reserved0xA; /* 0x0A */ U16 Reserved0xA; /* 0x0A */
MPI26_DRIVER_IOCSTATUS_LOGINFO_TIGGER_ENTRY IOCStatusLoginfoTriggers[MPI26_MAX_LOGINFO_TRIGGERS]; /* 0x0C */ MPI26_DRIVER_IOCSTATUS_LOGINFO_TRIGGER_ENTRY IOCStatusLoginfoTriggers[MPI26_MAX_LOGINFO_TRIGGERS]; /* 0x0C */
} MPI26_CONFIG_PAGE_DRIVER_TIGGER_4, Mpi26DriverTriggerPage4_t; } MPI26_CONFIG_PAGE_DRIVER_TRIGGER_4, Mpi26DriverTriggerPage4_t;
#endif #endif
...@@ -141,8 +141,7 @@ mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, ...@@ -141,8 +141,7 @@ mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
return; return;
} }
sz = offsetof(Mpi2RaidVolPage0_t, PhysDisk) + (num_pds * sz = struct_size(vol_pg0, PhysDisk, num_pds);
sizeof(Mpi2RaidVol0PhysDisk_t));
vol_pg0 = kzalloc(sz, GFP_KERNEL); vol_pg0 = kzalloc(sz, GFP_KERNEL);
if (!vol_pg0) { if (!vol_pg0) {
ioc_info(ioc, "WarpDrive : Direct IO is disabled Memory allocation failure for RVPG0\n"); ioc_info(ioc, "WarpDrive : Direct IO is disabled Memory allocation failure for RVPG0\n");
......
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