1. 02 Apr, 2024 7 commits
  2. 01 Apr, 2024 31 commits
  3. 29 Mar, 2024 2 commits
    • Jakub Kicinski's avatar
      Merge branch 'add-property-in-dwmac-stm32-documentation' · d79b28fd
      Jakub Kicinski authored
      Christophe Roullier says:
      
      ====================
      Add property in dwmac-stm32 documentation
      
      Introduce property in dwmac-stm32 documentation
      
       - st,ext-phyclk: is present since 2020 in driver so need to explain
         it and avoid dtbs check issue : views/kernel/upstream/net-next/arch/arm/boot/dts/st/stm32mp157c-dk2.dtb:
      ethernet@5800a000: Unevaluated properties are not allowed
      ('st,ext-phyclk' was unexpected)
         Furthermore this property will be use in upstream of MP13 dwmac glue. (next step)
      ====================
      
      Link: https://lore.kernel.org/r/20240328185337.332703-1-christophe.roullier@foss.st.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      d79b28fd
    • Christophe Roullier's avatar
      dt-bindings: net: dwmac: Document STM32 property st,ext-phyclk · 929107d3
      Christophe Roullier authored
      The Linux kernel dwmac-stm32 driver currently supports three DT
      properties used to configure whether PHY clock are generated by
      the MAC or supplied to the MAC from the PHY.
      
      Originally there were two properties, st,eth-clk-sel and
      st,eth-ref-clk-sel, each used to configure MAC clocking in
      different bus mode and for different MAC clock frequency.
      Since it is possible to determine the MAC 'eth-ck' clock
      frequency from the clock subsystem and PHY bus mode from
      the 'phy-mode' property, two disparate DT properties are
      no longer required to configure MAC clocking.
      
      Linux kernel commit 1bb694e2 ("net: ethernet: stmmac: simplify phy modes management for stm32")
      introduced a third, unified, property st,ext-phyclk. This property
      covers both use cases of st,eth-clk-sel and st,eth-ref-clk-sel DT
      properties, as well as a new use case for 25 MHz clock generated
      by the MAC.
      
      The third property st,ext-phyclk is so far undocumented,
      document it.
      
      Below table summarizes the clock requirement and clock sources for
      supported PHY interface modes.
       __________________________________________________________________________
      |PHY_MODE | Normal | PHY wo crystal|   PHY wo crystal   |No 125Mhz from PHY|
      |         |        |      25MHz    |        50MHz       |                  |
      
      ---------------------------------------------------------------------------
      |  MII    |    -   |     eth-ck    |        n/a         |       n/a        |
      |         |        | st,ext-phyclk |                    |                  |
      
      ---------------------------------------------------------------------------
      |  GMII   |    -   |     eth-ck    |        n/a         |       n/a        |
      |         |        | st,ext-phyclk |                    |                  |
      
      ---------------------------------------------------------------------------
      | RGMII   |    -   |     eth-ck    |        n/a         |      eth-ck      |
      |         |        | st,ext-phyclk |                    | st,eth-clk-sel or|
      |         |        |               |                    | st,ext-phyclk    |
      
      ---------------------------------------------------------------------------
      | RMII    |    -   |     eth-ck    |      eth-ck        |       n/a        |
      |         |        | st,ext-phyclk | st,eth-ref-clk-sel |                  |
      |         |        |               | or st,ext-phyclk   |                  |
      
      ---------------------------------------------------------------------------
      Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
      Reviewed-by: default avatarMarek Vasut <marex@denx.de>
      Signed-off-by: default avatarChristophe Roullier <christophe.roullier@foss.st.com>
      Link: https://lore.kernel.org/r/20240328185337.332703-2-christophe.roullier@foss.st.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      929107d3