- 20 Jul, 2007 40 commits
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Bob Nelson authored
From: Maynard Johnson <mpjohn@us.ibm.com> This patch updates the existing arch/powerpc/oprofile/op_model_cell.c to add in the SPU profiling capabilities. In addition, a 'cell' subdirectory was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code. Exports spu_set_profile_private_kref and spu_get_profile_private_kref which are used by OProfile to store private profile information in spufs data structures. Also incorporated several fixes from other patches (rrn). Check pointer returned from kzalloc. Eliminated unnecessary cast. Better error handling and cleanup in the related area. 64-bit unsigned long parameter was being demoted to 32-bit unsigned int and eventually promoted back to unsigned long. Signed-off-by:
Carl Love <carll@us.ibm.com> Signed-off-by:
Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by:
Bob Nelson <rrnelson@us.ibm.com> Signed-off-by:
Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by:
Paul Mackerras <paulus@samba.org>
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Bob Nelson authored
From: Maynard Johnson <mpjohn@us.ibm.com> This patch adds to the capability of spu_switch_event_register so that the caller is also notified of currently active SPU tasks. Exports spu_switch_event_register and spu_switch_event_unregister so that OProfile can get access to the notifications provided. Signed-off-by:
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Christoph Hellwig authored
Sort out the locking mess in spu_base and document the current rules. As an added benefit spu_alloc* and spu_free don't block anymore. Signed-off-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
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Arnd Bergmann authored
This patch links spus according to their physical position using information provided by the firmware through a special vicinity device-tree property. This property is present in current version of Malta firmware. Example of vicinity properties for a node in Malta: Node: Vicinity property contains phandles of: spe@0 [ spe@100000 , mic-tm@50a000 ] spe@100000 [ spe@0 , spe@200000 ] spe@200000 [ spe@100000 , spe@300000 ] spe@300000 [ spe@200000 , bif0@512000 ] spe@80000 [ spe@180000 , mic-tm@50a000 ] spe@180000 [ spe@80000 , spe@280000 ] spe@280000 [ spe@180000 , spe@380000 ] spe@380000 [ spe@280000 , bif0@512000 ] Only spe@* have a vicinity property (e.g., bif0@512000 and mic-tm@50a000 do not have it). Signed-off-by:
Andre Detsch <adetsch@br.ibm.com> Signed-off-by:
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Arnd Bergmann authored
This patch makes the scheduller honor affinity information for each context being scheduled. If the context has no affinity information, behaviour is unchanged. If there are affinity information, context is schedulled to be run on the exact spu recommended by the affinity placement algorithm. Signed-off-by:
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Arnd Bergmann authored
This patch provides the spu affinity placement logic for the spufs scheduler. Each time a gang is going to be scheduled, the placement of a reference context is defined. The placement of all other contexts with affinity from the gang is defined based on this reference context location and on a precomputed displacement offset. Signed-off-by:
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Arnd Bergmann authored
This patch adds support for additional flags at spu_create, which relate to the establishment of affinity between contexts and contexts to memory. A fourth, optional, parameter is supported. This parameter represent a affinity neighbor of the context being created, and is used when defining SPU-SPU affinity. Affinity is represented as a doubly linked list of spu_contexts. Signed-off-by:
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Arnd Bergmann authored
This patch allows the use of spu affinity on QS20, whose original FW does not provide affinity information. This is done through two hardcoded arrays, and by reading the reg property from each spu. Signed-off-by:
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Arnd Bergmann authored
This patch adds affinity data to each spu instance. A doubly linked list is created, meant to connect the spus in the physical order they are placed in the BE. SPUs near to memory should be marked as having memory affinity. Adjustments of the fields acording to FW properties is done in separate patches, one for CPBW, one for Malta (patch for Malta under testing). Signed-off-by:
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Arnd Bergmann authored
Addition of a spufs-global "cbe_info" array. Each entry contains information about one Cell/B.E. node, namelly: * list of spus (both free and busy spus are in this list); * list of free spus (replacing the static spu_list from spu_base.c) * number of spus; * number of reserved (non scheduleable) spus. SPE affinity implementation actually requires only access to one spu per BE node (since it implements its own pointer to walk through the other spus of the ring) and the number of scheduleable spus (n_spus - non_sched_spus) However having this more general structure can be useful for other functionalities, concentrating per-cbe statistics / data. Signed-off-by:
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Masato Noguchi authored
spu_sched->bitmap has MAX_PRIO(=140) width in bits.However, since ff80a77f, sched_find_first_bit() only supports 100-bit bitmaps. Thus, spu_sched->bitmap should be treated by generic find_first_bit(). Signed-off-by:
Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
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Jeremy Kerr authored
From: Sebastian Siewior <cbe-oss-dev@ml.breakpoint.cc> The 'file' argument is unused in spufs_run_spu(). This change removes it. Signed-off-by:
Sebastian Siewior <sebastian@breakpoint.cc> Signed-off-by:
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Masato Noguchi authored
The SPU decrementer should be restored after the LSCSA DMA has completed. Signed-off-by:
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Masato Noguchi authored
No need to halt the SPE decrementer at context restore step 47, it will be done in step 7. Signed-off-by:
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Masato Noguchi authored
At save step 8, the mfc control register in the CSA should be written _only_ with Sc and Sm bits (at least MFC_CNTL[Dh] should be set to 0) Signed-off-by:
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Masato Noguchi authored
The decr_status in the LSCSA is valid only in the sequence of context restore. Thus, it's nonsense to read and/or write it through spufs. This patch changes decr_status node to access MFC_CNTL[Ds] in the CSA. Signed-off-by:
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Masato Noguchi authored
The decr_status in the LSCSA is confusedly used as two meanings: * SPU decrementer was running * SPU decrementer was wrapped as a result of adjust and the code to set decr_status is missing. This patch fixes these problems by using the decr_status argument as a set of flags. This requires a rebuild of the shipped spu_restore code. Signed-off-by:
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Masato Noguchi authored
The following steps are not needed in the SPE context save/restore paths: Save Step 12: save_mfc_decr() save suspend_time to CSA (It will be done by step 14) save ch 7 (decrementer value will be saved in LSCSA by spe-side step 10) Restore Step 59: restore_ch_part1() restore ch 1 (it will be done by spe-side step 15) This change removes the unnecessary steps. Signed-off-by:
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Jeremy Kerr authored
Based on a fix from Masato Noguchi <Masato.Noguchi@jp.sony.com>. Remove the (incorrect) array size declarations in the spufs channel arrays, and use ARRAY_SIZE rather than hardcoded values. Signed-off-by:
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Christoph Hellwig authored
Currently a process is removed from the physical spu when spu_acquire_saved is saved but never put back. This patch adds a new spu_release_saved that is to be paired with spu_acquire_saved and put the process back if it has been in RUNNABLE state before. Niether Jeremy not be are entirely happy about this exact patch because it adds another spu_activate call outside of the owner thread, but I feel this is the best short-term fix we can come up with. Signed-off-by:
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Andre Detsch authored
This patch exports per-context statistics in spufs as long as spu statistics in sysfs. It was formed by merging: "spufs: add spu stats in sysfs" From: Christoph Hellwig "spufs: add stat file to spufs" From: Christoph Hellwig "spufs: fix libassist accounting" From: Jeremy Kerr "spusched: fix spu utilization statistics" From: Luke Browning And some adjustments by myself, after suggestions on cbe-oss-dev. Having separate patches was making the review process harder than it should, as we end up integrating spus and ctx statistics accounting much more than it was on the first implementation. Signed-off-by:
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Jeremy Kerr authored
In 6cbf93960e64f313f6e247cbca7afaa50e3ee2c we added a WARN_ON for calling spu_deactivate on contexts created with the SPU_CREATE_NOSCHED flag. However, all NOSCHED contexts will need to be deactivated when the context is destroyed, so this gives a spurious warning when any NOSCHED context is closed. This change removes the WARN_ON. Signed-off-by:
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Jeremy Kerr authored
Reading from the signal{1,2} files requires a spu_acquire_saved, so make these files write-only for contexts created with SPU_CREATE_NOSCHED. Signed-off-by: -
Kazunori Asayama authored
The current SPU context saving procedure in SPUFS unexpectedly restarts MFC when halting decrementer, because MFC_CNTL[Dh] is set without MFC_CNTL[Sm]. This bug causes, for example, saving broken DMA queues. Here is a patch to fix the problem. Signed-off-by:
Kazunori Asayama <asayama@sm.sony.co.jp> Signed-off-by:
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Sebastian Siewior authored
WARNING: arch/powerpc/platforms/cell/spufs/spufs.o(.init.text+0x158): Section mismatch: reference to .exit.text:.spu_sched_exit (between '.init_module' and '.spu_sched_init') was introduced by c99c1994 This patch removes the warning. Cc: Christoph Hellwig <hch@lst.de> Signed-off-by:
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Michael Ellerman authored
This patch adds support for the setup and decoding of MSIs on Axon-based Cell systems, using the MSIC mechanism. This involves setting up an area of BE memory which the Axon then uses as a FIFO for MSI messages. When one or more MSIs are decoded by the MSIC we receive an interrupt on the MPIC, and the MSI messages are written into the FIFO. At the moment we use a 64KB FIFO, one per MSIC/BE. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Andre Detsch authored
This patch adds support for investigating spus information after a kernel crash event, through kdump vmcore file. Implementation is based on xmon code, but the new functionality was kept independent from xmon. Signed-off-by:
Lucio Jose Herculano Correia <luciojhc@br.ibm.com> Signed-off-by:
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Maxim Shchetynin authored
The Axon bridge chip used on new Cell/B.E. based blade servers comes with a DDR2 memory controller that can be used to attach cheap memory modules, as opposed to the high-speed XDR memory that is used by the CPU itself. Since the memory controller does not participate in the cache coherency protocol, we can not use the memory direcly for Linux applications, but by providing a block device it can be used for swap space, temporary file storage and through the use of the direct_access block device operation for mapping into user addresses, when it is mounted with an appropriate file system. Signed-off-by:
Maxim Shchetynin <maxim@de.ibm.com> Signed-off-by:
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Jean-Christophe DUBOIS authored
The platforms missing the "cpus" property in the "be" node are mono-Cell platforms such as CAB or Getaway. Therefore it is possible to assume that if there is no "cpus" properties under the "be" node then we can safely return the "device node" without more checking. This is a bit hacky but ... it allows it to work on these platforms. Signed-off-by:
Jean-Christophe DUBOIS <jcd@tribudubois.net> Acked-by:
Christian Krafft <krafft@de.ibm.com> Signed-off-by:
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Jean-Christophe DUBOIS authored
Previous patch changed based on Christian Krafft's comment. On some legacy SLOF tree the generic code is unable to ioremap some Cell BE registers. Therefore the "generic" functions are returning a NULL pointer, triggering a crash on such platforms. Let's handle this more gracefully. Signed-off-by:
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Jean-Christophe DUBOIS authored
Previous patch changed based on Christian Krafft's comment. On some legacy SLOF tree the generic code is unable to ioremap some Cell BE registers. Therefore the "generic" functions are returning a NULL pointer, triggering a crash on such platforms. Let's handle this more gracefully. Signed-off-by:
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Christian Krafft authored
This patch reorganizes the code of the driver into three files. Two cbe_cpufreq_pmi.c and cbe_cpufreq_pervasive.c care about hardware. cbe_cpufreq.c contains the logic. There is no changed behaviour, except that the PMI related function is now located in a seperate module cbe_cpufreq_pmi. This module will be required by cbe_cpufreq, if CONFIG_CBE_CPUFREQ_PMI has been set. Signed-off-by:
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Christian Krafft authored
Minor issues have been fixed: * added a missing call to of_node_put() * signedness of a function parameter * added some line breaks * changed global pmi_frequency_limit to a per node pmi_slow_mode_limit array Signed-off-by:
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Christian Krafft authored
This patch fixes the initialization of the cbe_cpufreq driver. The code that initializes the PMI related functions was called per cpu: * registering cpufreq notifier block * registering a pmi handler This ends in a bug that the notifier block gets called in an endless loop. The initialization code is being put to the module init code path by this patch. This way it only gets called once. Signed-off-by:
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Christian Krafft authored
This patch fixes the debug code that calculates the transition time when changing the slow modes on a Cell BE cpu. Signed-off-by:
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Christian Krafft authored
The pmi driver got simplified by removing support for multiple devices. As there is no more than one pmi device per maschine, there is no need to specify the device for listening and sending messages. This way the caller (cbe_cpufreq) doesn't need to scan the device tree. When registering the handler on a board without a pmi interface, pmi.c will just return -ENODEV. The patch that fixed the breakage of cell_defconfig has been broken out of the earlier version of this patch. So this is the version that applies cleanly on top of it. Signed-off-by:
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Avi Kivity authored
The kvm mmu uses page->private on shadow page tables; so does slub, and an oops result. Fix by allocating regular pages for shadows instead of using slub. Tested-by:
S.Çağlar Onur <caglar@pardus.org.tr> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Allow real-mode emulation of rdmsr and wrmsr. This allows smp Windows to boot, presumably for its sipi trampoline. Signed-off-by: -
Avi Kivity authored
The memory slot management functions were oriented against vcpu 0, where they should be kvm-wide. This causes hangs starting X on guest smp. Fix by making the functions (and resultant tail in the mmu) non-vcpu-specific. Unfortunately this reduces the efficiency of the mmu object cache a bit. We may have to revisit this later. Signed-off-by: -
Avi Kivity authored
We need to distinguish between large page shadows which have the nx bit set and those which don't. The problem shows up when booting a newer smp Linux kernel, where the trampoline page (which is in real mode, which uses the same shadow pages as large pages) is using the same mapping as a kernel data page, which is mapped using nx, causing kvm to spin on that page. Signed-off-by:
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