1. 22 Mar, 2021 7 commits
    • Qi Zhang's avatar
      ice: Enable FDIR Configure for AVF · 1f7ea1cd
      Qi Zhang authored
      The virtual channel is going to be extended to support FDIR and
      RSS configure from AVF. New data structures and OP codes will be
      added, the patch enable the FDIR part.
      
      To support above advanced AVF feature, we need to figure out
      what kind of data structure should be passed from VF to PF to describe
      an FDIR rule or RSS config rule. The common part of the requirement is
      we need a data structure to represent the input set selection of a rule's
      hash key.
      
      An input set selection is a group of fields be selected from one or more
      network protocol layers that could be identified as a specific flow.
      For example, select dst IP address from an IPv4 header combined with
      dst port from the TCP header as the input set for an IPv4/TCP flow.
      
      The patch adds a new data structure virtchnl_proto_hdrs to abstract
      a network protocol headers group which is composed of layers of network
      protocol header(virtchnl_proto_hdr).
      
      A protocol header contains a 32 bits mask (field_selector) to describe
      which fields are selected as input sets, as well as a header type
      (enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
      enum virtchnl_proto_hdr_field guided by its header type.
      
      +------------+-----------+------------------------------+
      |            | Proto Hdr | Header Type A                |
      |            |           +------------------------------+
      |            |           | BIT 31 | ... | BIT 1 | BIT 0 |
      |            |-----------+------------------------------+
      |Proto Hdrs  | Proto Hdr | Header Type B                |
      |            |           +------------------------------+
      |            |           | BIT 31 | ... | BIT 1 | BIT 0 |
      |            |-----------+------------------------------+
      |            | Proto Hdr | Header Type C                |
      |            |           +------------------------------+
      |            |           | BIT 31 | ... | BIT 1 | BIT 0 |
      |            |-----------+------------------------------+
      |            |    ....                                  |
      +-------------------------------------------------------+
      
      All fields in enum virtchnl_proto_hdr_fields are grouped with header type
      and the value of the first field of a header type is always 32 aligned.
      
      enum proto_hdr_type {
              header_type_A = 0;
              header_type_B = 1;
              ....
      }
      
      enum proto_hdr_field {
              /* header type A */
              header_A_field_0 = 0,
              header_A_field_1 = 1,
              header_A_field_2 = 2,
              header_A_field_3 = 3,
      
              /* header type B */
              header_B_field_0 = 32, // = header_type_B << 5
              header_B_field_0 = 33,
              header_B_field_0 = 34
              header_B_field_0 = 35,
              ....
      };
      
      So we have:
      proto_hdr_type = proto_hdr_field / 32
      bit offset = proto_hdr_field % 32
      
      To simply the protocol header's operations, couple help macros are added.
      For example, to select src IP and dst port as input set for an IPv4/UDP
      flow.
      
      we have:
      struct virtchnl_proto_hdr hdr[2];
      
      VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
      VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)
      
      VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
      VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)
      
      The byte array is used to store the protocol header of a training package.
      The byte array must be network order.
      
      The patch added virtual channel support for iAVF FDIR add/validate/delete
      filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function
      which can direct Ethernet packets to the queues of the Network Interface
      Card. Add/delete command is adding or deleting one rule for each virtual
      channel message, while validate command is just verifying if this rule
      is valid without any other operations.
      
      To add or delete one rule, driver needs to config TCAM and Profile,
      build training packets which contains the input set value, and send
      the training packets through FDIR Tx queue. In addition, driver needs to
      manage the software context to avoid adding duplicated rules, deleting
      non-existent rule, input set conflicts and other invalid cases.
      
      NOTE:
      Supported pattern/actions and their parse functions are not be included in
      this patch, they will be added in a separate one.
      Signed-off-by: default avatarJeff Guo <jia.guo@intel.com>
      Signed-off-by: default avatarYahui Cao <yahui.cao@intel.com>
      Signed-off-by: default avatarSimei Su <simei.su@intel.com>
      Signed-off-by: default avatarBeilei Xing <beilei.xing@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      1f7ea1cd
    • Qi Zhang's avatar
      ice: Add support for per VF ctrl VSI enabling · da62c5ff
      Qi Zhang authored
      We are going to enable FDIR configure for AVF through virtual channel.
      The first step is to add helper functions to support control VSI setup.
      A control VSI will be allocated for a VF when AVF creates its
      first FDIR rule through ice_vf_ctrl_vsi_setup().
      The patch will also allocate FDIR rule space for VF's control VSI.
      If a VF asks for flow director rules, then those should come entirely
      from the best effort pool and not from the guaranteed pool. The patch
      allow a VF VSI to have only space in the best effort rules.
      Signed-off-by: default avatarXiaoyun Li <xiaoyun.li@intel.com>
      Signed-off-by: default avatarYahui Cao <yahui.cao@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      da62c5ff
    • Qi Zhang's avatar
      ice: Enhanced IPv4 and IPv6 flow filter · 7012dfd1
      Qi Zhang authored
      Separate IPv4 and IPv6 ptype bit mask table into 2 tables:
      with or without L4 protocols.
      
      When a flow filter without any l4 type is specified, the
      ICE_FLOW_SEG_HDR_IPV_OTHER flag can be used to describe if user
      want to create a IP rule target for all IP packet or just IP
      packet without l4 header.
      Signed-off-by: default avatarDan Nowlin <dan.nowlin@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      7012dfd1
    • Qi Zhang's avatar
      ice: Support to separate GTP-U uplink and downlink · cbad5db8
      Qi Zhang authored
      To apply different input set for GTP-U packet with or without extend
      header as well as GTP-U uplink and downlink, we need to add TCAM mask
      matching capability. This allows comprehending different PTYPE
      attributes by examining flags from the parser. Using this method,
      different profiles can be used by examining flag values from the parser.
      Signed-off-by: default avatarDan Nowlin <dan.nowlin@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      cbad5db8
    • Qi Zhang's avatar
      ice: Add more advanced protocol support in flow filter · 0577313e
      Qi Zhang authored
      Add more protocol support in flow filter, these
      include PPPoE, L2TPv3, GTP, PFCP, ESP and AH.
      Signed-off-by: default avatarTing Xu <ting.xu@intel.com>
      Signed-off-by: default avatarYahui Cao <yahui.cao@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      0577313e
    • Qi Zhang's avatar
      ice: Support non word aligned input set field · b199dddb
      Qi Zhang authored
      To support FDIR input set with protocol field like DSCP, TTL,
      PROT, etc. which is not word aligned, we need to enable field
      vector masking.
      Signed-off-by: default avatarDan Nowlin <dan.nowlin@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      b199dddb
    • Qi Zhang's avatar
      ice: Add more basic protocol support for flow filter · 390bd141
      Qi Zhang authored
      Add more protocol and field support for flow filter include:
      ETH, VLAN, ICMP, ARP and TCP flag.
      Signed-off-by: default avatarKevin Scott <kevin.c.scott@intel.com>
      Signed-off-by: default avatarQi Zhang <qi.z.zhang@intel.com>
      Tested-by: default avatarChen Bo <BoX.C.Chen@intel.com>
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      390bd141
  2. 21 Mar, 2021 9 commits
    • Vladimir Oltean's avatar
      Revert "net: dsa: sja1105: Clear VLAN filtering offload netdev feature" · a1e6f641
      Vladimir Oltean authored
      This reverts commit e9bf9694.
      
      The topic of the reverted patch is the support for switches with global
      VLAN filtering, added by commit 061f6a50 ("net: dsa: Add
      ndo_vlan_rx_{add, kill}_vid implementation"). Be there a switch with 4
      ports swp0 -> swp3, and the following setup:
      
      ip link add br0 type bridge vlan_filtering 1
      ip link set swp0 master br0
      ip link set swp1 master br0
      
      What would happen with VLAN-tagged traffic received on standalone ports
      swp2 and swp3? Well, it would get dropped, were it not for the
      .ndo_vlan_rx_add_vid and .ndo_vlan_rx_kill_vid implementations (called
      from vlan_vid_add and vlan_vid_del respectively). Basically, for DSA
      switches where VLAN filtering is a global attribute, we enforce the
      standalone ports to have 'rx-vlan-filter: off [fixed]' in their ethtool
      features, which lets the user know that all VLAN-tagged packets that are
      not explicitly added in the RX filtering list are dropped.
      
      As for the sja1105 driver, at the time of the reverted patch, it was
      operating in a pretty handicapped mode when it had ports under a bridge
      with vlan_filtering=1. Specifically, it was unable to terminate traffic
      through the CPU port (for further explanation see "Traffic support" in
      Documentation/networking/dsa/sja1105.rst).
      
      However, since then, the sja1105 driver has made considerable progress,
      and that limitation is no longer as severe now. Specifically, since
      commit 2cafa72e ("net: dsa: sja1105: add a new
      best_effort_vlan_filtering devlink parameter"), the driver is able to
      perform CPU termination even when some ports are under bridges with
      vlan_filtering=1. Then, since commit 8841f6e6 ("net: dsa: sja1105:
      make devlink property best_effort_vlan_filtering true by default"), this
      even became the default operating mode.
      
      So we can now take advantage of the logic in the DSA core.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a1e6f641
    • Heiner Kallweit's avatar
      r8169: add support for ethtool get_ringparam · dc4aa50b
      Heiner Kallweit authored
      Add support for the ethtool get_ringparam operation.
      Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      dc4aa50b
    • David S. Miller's avatar
      Merge branch 'ipa-cfg-data-updates' · e0e7af0d
      David S. Miller authored
      Alex Elder says:
      
      ====================
      net: ipa: more configuration data updates
      
      This series starts with two patches that should have been included
      in an earlier series.  With these in place, QSB settings are
      programmed from information found in the data files rather than
      being embedded in code.  Support is then added for reprenting
      another QSB property (supported for IPA v4.0+).
      
      The third patch updates the definition of the sequencer type used
      for an endpoint.  Previously a set of 2-byte symbols with fairly
      long names defined the sequencer type, but now those are broken into
      1-byte halves whose names are a little more informative.
      
      The fourth patch moves the sequencer type definition so it only
      applies to TX endpoints (they aren't valid for RX endpoints).  And
      the last makes some minor documentation updates.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e0e7af0d
    • Alex Elder's avatar
      net: ipa: update some comments in "ipa_data.h" · b259cc2a
      Alex Elder authored
      Fix/expand some comments in "ipa_data.h".
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b259cc2a
    • Alex Elder's avatar
      net: ipa: sequencer type is for TX endpoints only · 1690d8a7
      Alex Elder authored
      We only program the sequencer type for TX endpoints.  So move the
      definition of the sequencer type fields into the TX-specific portion
      of the endpoint configuration data.  There's no need to maintain
      this in the IPA structure; we can extract it from the configuration
      data it points to in the one spot it's needed.
      
      We previously specified the sequencer type for RX endpoints with
      INVALID values.  These are no longer needed, so get rid of them.
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1690d8a7
    • Alex Elder's avatar
      net: ipa: split sequencer type in two · 8ee5df65
      Alex Elder authored
      An IPA endpoint has a sequencer that must be configured based on how
      the endpoint is to be used.  Currently the IPA code programs the
      sequencer type by splitting a value into four 4-bit nibbles.  Doing
      that doesn't really add much value, and regardless, a better way of
      splitting the sequencer type is into two halves--the lower byte
      describing how normal packet processing is handled, and the next
      byte describing information about processing replicas.
      
      So split the sequencer type into two sub-parts:  the sequencer type
      and the replication sequencer type.  Define the values supported for
      the "main" sequencer type, and define the values supported for the
      replication part separately.
      
      In addition, the sequencer type names are quite verbose, encoding
      what the type includes, but also what it *excludes*.  Rename the
      sequencer types in a way that mainly describes the number of passes
      that a packet takes through the IPA processing pipeline, and how
      many of those passes end by supplying the processed packet to the
      microprocessor.
      
      The result expands the supported types beyond what is required for
      now, but simplifies the way these are defined.
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8ee5df65
    • Alex Elder's avatar
      net: ipa: implement MAX_READS_BEATS QSB data · b9aa0805
      Alex Elder authored
      Starting with IPA v4.0, a limit is placed on the number of bytes
      outstanding in a transaction, to reduce latency.  The limit is
      imposed only if this value is non-zero.
      
      We don't use a non-zero value for SC7180, but newer versions of IPA
      do.  Prepare for that by allowing a programmed value to be specified
      in the platform configuration data.
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b9aa0805
    • Alex Elder's avatar
      net: ipa: use configuration data for QSB settings · 8a81efac
      Alex Elder authored
      Use the QSB configuration data in ipa_hardware_config_qsb(), rather
      than determining in code what values to use based on IPA version.
      Pass configuration data to ipa_hardware_config() so it can be passed
      to ipa_hardware_config_qsb().
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8a81efac
    • Sai Kalyaan Palla's avatar
      net: decnet: Fixed multiple coding style issues · b29648ad
      Sai Kalyaan Palla authored
      Made changes to coding style as suggested by checkpatch.pl
      changes are of the type:
      	open brace '{' following struct go on the same line
      	do not use assignment in if condition
      Signed-off-by: default avatarSai Kalyaan Palla <saikalyaan63@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b29648ad
  3. 19 Mar, 2021 24 commits