- 01 Apr, 2015 40 commits
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Ralf Baechle authored
Signed-off-by:Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
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Ralf Baechle authored
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Ralf Baechle authored
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Florian Fainelli authored
Since we are always sourcing arch/mips/bmips/Kconfig and there is no dependency on BMIPS_GENERIC, we will offer building BMIPS-related DTBs while this is not relevant for the other MIPS platforms. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jaedon.shin@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/9603/Signed-off-by:
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Ralf Baechle authored
BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer may cause parts of the DMA buffer to be prefetched into the RAC. To avoid possible coherency problems, flush the RAC upon DMA completion. Derived from Kevin Cernekee's https://patchwork.linux-mips.org/patch/9602/. Signed-off-by:
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Ralf Baechle authored
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Ralf Baechle authored
These got merged with the ath25 support after 4e7f7266 (MIPS: Remove unnecessary platform dma helper functions) had already removed them for all other platforms. Signed-off-by:
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Michael Opdenacker authored
This removes the use of the IRQF_DISABLED flag from arch/mips/loongson/loongson-3/hpet.c It's a NOOP since 2.6.35. Signed-off-by:
Michael Opdenacker <michael.opdenacker@free-electrons.com> Cc: chenhc@lemote.com Cc: taohl@lemote.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9609/Signed-off-by:
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Rafał Miłecki authored
There are two reasons for having this header in the common place: 1) Simplifying drivers that read NVRAM entries. We will be able to safely call bcm47xx_nvram_* functions without #ifdef-s. 2) Getting NVRAM driver out of MIPS arch code. This is needed to support BCM5301X arch which also requires this NVRAM driver. Patch for that will follow once we get is reviewed. Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Acked-by:
Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Walmsley <paul@pwsan.com> Cc: linux-soc@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8619/Signed-off-by:
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David Daney authored
With CONFIG_MIGRATION, the PFN of the migrating pages is stored in __swp_offset(), so we must have enough bits to store the largest possible PFN. OCTEON NUMA systems have 41 bits of physical address space, so with 4K pages (12-bits), we need at least 29 bits to store the PFN. The current width of 24-bits is too narrow, so expand it all the way out to 40-bits. This leaves the low order 16 bits as zero which does not interfere with any of the PTE bits. Signed-off-by:
David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9315/Signed-off-by:
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Rafał Miłecki authored
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Rafał Miłecki authored
Also drop some unneeded memset-s. Signed-off-by:
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Aaro Koskinen authored
On OCTEON the function is non-trivial and we can potentially even save some memory. Signed-off-by:
Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by:
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Andrew Bresticker authored
If a machine-specific hook is not implemented for restart, poweroff, or halt, fall back to halting secondary CPUs, disabling interrupts, and spinning. In the case of restart, attempt to restart the system via do_kernel_restart() (which will call any registered restart handlers) before halting. Signed-off-by:
Andrew Bresticker <abrestic@chromium.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9600/Signed-off-by:
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Andrew Bresticker authored
Since cpu_wait() enables interrupts upon return, CPUs which have entered stop_this_cpu() may still end up handling interrupts. This can lead to the softlockup detector firing on a panic or restart/poweroff/halt. Just disable interrupts and spin to ensure nothing else runs on the CPU once it has entered stop_this_cpu(). Signed-off-by:
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Helmut Schaa authored
At least QCA955x can handle up to 256MBytes. Signed-off-by:
Helmut Schaa <helmut.schaa@googlemail.com> Cc: linux-mips@linux-mips.org Cc: Gabor Juhos <juhosg@openwrt.org> Cc: Helmut Schaa <helmut.schaa@googlemail.com> Patchwork: https://patchwork.linux-mips.org/patch/8738/Signed-off-by:
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David Daney authored
Delay slot emulation in the FPU emulator is the only kernel user of an executable stack, it is also very slow. Add a counter so we can see how many of these emulations are done. Signed-off-by:
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Joshua Kinard authored
Update arch/mips/include/asm/sgi/sgi.h with some updated information on SGI systems. Signed-off-by:
Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8666/Signed-off-by:
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Wolfram Sang authored
This platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by:
Wolfram Sang <wsa@the-dreams.de> Cc: linux-kernel@vger.kernel.org Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8824/Signed-off-by:
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Wolfram Sang authored
This platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by:
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Ganesan Ramalingam authored
Signed-off-by:
Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by:
Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8896/Signed-off-by:
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Subhendu Sekhar Behera authored
The new I2C block in XLP9XX has 4 interrupts, add the mapping for these in nlm_hal.c Signed-off-by:
Subhendu Sekhar Behera <sbehera@broadcom.com> Signed-off-by:
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Ganesan Ramalingam authored
Add support for third XHCI port in XLPII processors. Signed-off-by:
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Jayachandran C authored
Enabling the SUE bit for core can can result in rare cache errors which are difficult to track down, so do not enable it. This can cause a minor performance loss in some tests. Signed-off-by:
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Jayachandran C authored
Core configuration register IFU_BRUB_RESERVE has to be setup to handle a silicon errata which can result in a CPU hang. Signed-off-by:
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Jayachandran C authored
Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent with the rest of the functions in the file. Pass the the size of the array 'dram_map' to the function, and ensure that it does not write past the end of the array. Signed-off-by:
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Prem Mallappa authored
Enable CPU_SUPPORTS_HUGEPAGES for XLP processors. Signed-off-by:
Prem Mallappa <pmallapp@broadcom.com> Signed-off-by:
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Jayachandran C authored
XLP9XX has 5 bits that specify the core in the EBASE register. XLP5XX case added as well for completeness. Signed-off-by:
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Jayachandran C authored
Use the current_cpu_data package field to get the node of the current CPU. This allows us to remove xlp_cores_per_node and move nlm_threads_per_node() and nlm_cores_per_node() to netlogic/common.h, which simplifies code. Signed-off-by:
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Jayachandran C authored
commit bda4584c ("MIPS: Support CPU topology files in sysfs") added topology related macros for all MIPS platforms and commit bbbf6d87 ("MIPS: NL: Fix nlm_xlp_defconfig build error") removed most of the contents from mach-netlogic/topology.h. The netlogic specific topology is not needed anymore, we just need to setup the package field in current_cpu_data. Signed-off-by:
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Jayachandran C authored
The per-cpu interrupt ACK using EIRR has to be done just once after all the bits in the status register are processed. PIC ack has to be done once in case of MSI, and for every interrupt in case of MSI-X Signed-off-by:
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Ganesan Ramalingam authored
Change the PIC frequency calculation to use the register that has the current configuration. The existing code used the register that is written to change frequency, which can have an invalid value if the firmware did not set it up correctly. Signed-off-by:
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Jayachandran C authored
If the device header of a block is not present, return invalid IRT value so that we do not program an incorrect offset. Signed-off-by:
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Ganesan Ramalingam authored
PRID register should be masked with IMP_MASK to get processor ID. Signed-off-by:
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Qingmin Liu authored
The variable ref_div is initialized to the correct divisor but not used in the frequency calculation. This caused incorrect frequency to be reported when the clock divisor is not 3. Signed-off-by:
Qingmin Liu <qingmin@broadcom.com> Signed-off-by:
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Shanghui Liu authored
For core 0, the condition of "cpu == bootcpu" is always true, so it does not wait for other three threads to become ready. Fix this by using correct check. Signed-off-by:
Shanghui Liu <shliu@broadcom.com> Signed-off-by:
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Toma Tabacu authored
Remove variable self-assignments. This silences a bunch of -Wself-assign warnings reported by clang. The changed code can be compiled without warnings by both gcc and clang. Signed-off-by:
Toma Tabacu <toma.tabacu@imgtec.com> Signed-off-by:
Daniel Sanders <daniel.sanders@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9314/Signed-off-by:
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Daniel Sanders authored
Replace incorrect matching constraint that caused the error with an alternative that still has the required constraints on the inline assembly. This is the error message reported by clang: arch/mips/include/asm/checksum.h:285:27: error: unsupported inline asm: input with type '__be32' (aka 'unsigned int') matching output with type 'unsigned short' "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); ^~~~~~~~~~~~ The changed code can be compiled successfully by both gcc and clang. Signed-off-by:Maciej W. Rozycki <macro@linux-mips.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9313/Signed-off-by:
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Toma Tabacu authored
Remove a cast to the 'mips16e_instruction' union inside an if condition and instead do an assignment to a local 'union mips16e_instruction' variable's 'full' member before the if statement and use this variable in the if condition. This is the error message reported by clang: arch/mips/kernel/branch.c:38:8: error: cast to union type from type 'unsigned short' not present in union if (((union mips16e_instruction)inst).ri.opcode ^ ~~~~ The changed code can be compiled successfully by both gcc and clang. Signed-off-by:
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