- 18 Oct, 2023 1 commit
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AngeloGioacchino Del Regno authored
Due to the initial confusion about MIPI_DSI_MODE_EOT_PACKET, properly renamed to MIPI_DSI_MODE_NO_EOT_PACKET, reflecting its actual meaning, both the DSI_TXRX_CON register setting for bit (HSTX_)DIS_EOT and the later calculation for horizontal sync-active (HSA), back (HBP) and front (HFP) porches got incorrect due to the logic being inverted. This means that a number of settings were wrong because....: - DSI_TXRX_CON register setting: bit (HSTX_)DIS_EOT should be set in order to disable the End of Transmission packet; - Horizontal Sync and Back/Front porches: The delta used to calculate all of HSA, HBP and HFP should account for the additional EOT packet. Before this change... - Bit (HSTX_)DIS_EOT was being set when EOT packet was enabled; - For HSA/HBP/HFP delta... all three were wrong, as words were added when EOT disabled, instead of when EOT packet enabled! Invert the logic around flag MIPI_DSI_MODE_NO_EOT_PACKET in the MediaTek DSI driver to fix the aforementioned issues. Fixes: 8b2b99fd ("drm/mediatek: dsi: Fine tune the line time caused by EOTp") Fixes: c87d1c4b ("drm/mediatek: dsi: Use symbolized register definition") Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Alexandre Mergnat <amergnat@baylibre.com> Tested-by:
Michael Walle <mwalle@kernel.org> Link: https://patchwork.kernel.org/project/dri-devel/patch/20230523104234.7849-1-angelogioacchino.delregno@collabora.com/Signed-off-by:
Chun-Kuang Hu <chunkuang.hu@kernel.org>
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- 16 Oct, 2023 12 commits
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AngeloGioacchino Del Regno authored
Compress the entry for mediatek,mt8173-disp-aal, as it fits in one line, and fix the style; while at it, also add the usual sentinel comment to the last entry. This commit brings no functional changes. Reviewed-by:
CK Hu <ck.hu@mediatek.com> Signed-off-by:
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AngeloGioacchino Del Regno authored
The mtk_disp_gamma structure was completely undocumented: add some kerneldoc documentation to it. Reviewed-by:
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AngeloGioacchino Del Regno authored
The kerneldoc for struct mtk_disp_aal is missing: write one and document this structure. Reviewed-by:
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AngeloGioacchino Del Regno authored
All of the SoCs that don't have dithering control in the gamma IP have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is "descending" (bit set) or "rising" (bit cleared): make sure to set it correctly after programming the LUT. Reviewed-by:
Jason-JH.Lin <jason-jh.lin@mediatek.com> Reviewed-by:
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AngeloGioacchino Del Regno authored
Disable relay mode at the end of LUT programming to make sure that the processed image goes through in both DISP_GAMMA and DISP_AAL for gamma setting. Reviewed-by:
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AngeloGioacchino Del Regno authored
Now that this driver supports 12-bit LUTs, we can add support for the DISP_GAMMA found on the MT8195 SoC: add its driver data and compatible. Signed-off-by:
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AngeloGioacchino Del Regno authored
New SoCs, like MT8195, not only may support bigger lookup tables, but have got a different register layout to support bigger precision: support specifying the number of `lut_bits` for each SoC and use it in mtk_gamma_set_common() to perform the right calculations and add support for 12-bit gamma lookup tables. While at it, also reorder the variables in mtk_gamma_set_common() and rename `lut_base` to `lut0_base` to improve readability. Reviewed-by:
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AngeloGioacchino Del Regno authored
Newer Gamma IP have got multiple LUT banks: support specifying the size of the LUT banks and handle bank-switching before programming the LUT in mtk_gamma_set_common() in preparation for adding support for MT8195 and newer SoCs. Suggested-by:
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AngeloGioacchino Del Regno authored
In preparation for adding a 12-bits gamma support for the DISP_GAMMA IP, remove the mtk_gamma_set_common() function and move the relevant bits in mtk_gamma_set() for DISP_GAMMA and mtk_aal_gamma_set() for DISP_AAL: since the latter has no more support for gamma manipulation (being moved to a different IP) in newer revisions, those functions are about to diverge and it makes no sense to keep a common one (with all the complications of passing common data and making exclusions for device driver data) for just a few bits. This commit brings no functional changes. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
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AngeloGioacchino Del Regno authored
Make the code more robust and improve readability by using bitfield macros instead of open coding bit operations. Reviewed-by:
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AngeloGioacchino Del Regno authored
Make the code more robust and improve readability by using bitfield macros instead of open coding bit operations. Reviewed-by:
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AngeloGioacchino Del Regno authored
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after programming the actual table to avoid potential visual glitches during table modification. Note: GAMMA should get enabled in between vblanks, but this requires many efforts in order to make this happen, as that requires migrating all of the writes to make use of CMDQ instead of cpu writes and that's not trivial. For this reason, this patch only moves the LUT enable. The CMDQ rework will come at a later time. Reviewed-by:
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- 15 Oct, 2023 4 commits
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AngeloGioacchino Del Regno authored
Use drm_color_lut_extract() to avoid open-coding the bits reduction calculations for each color channel and use a struct drm_color_lut to temporarily store the information instead of an array of u32. Also, slightly improve the precision of the HW LUT calculation in the LUT DIFF case by performing the subtractions on the 16-bits values and doing the 10 bits conversion later. Reviewed-by:
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AngeloGioacchino Del Regno authored
Newer SoCs support a bigger Gamma LUT table: wire up a callback to retrieve the correct LUT size for each different Gamma IP. Co-developed-by:
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AngeloGioacchino Del Regno authored
Invert the check for state->gamma_lut and move it at the beginning of the function to reduce indentation: this prepares the code for keeping readability on later additions. This commit brings no functional changes. Reviewed-by:
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Jason-JH.Lin authored
Adjust the parameters in mtk_drm_gamma_set_common() - add (struct device *dev) to get lut_diff from gamma's driver data - remove (bool lut_diff) and use false as default value in the function Signed-off-by:
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- 08 Oct, 2023 10 commits
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Jason-JH.Lin authored
The difference between drm_atomic_helper_commit_tail() and drm_atomic_helper_commit_tail_rpm() is drm_atomic_helper_commit_tail() will commit plane first and then enable crtc, drm_atomic_helper_commit_tail_rpm() will enable crtc first and then commit plane. Before mediatek-drm enables crtc, the power and clk required by OVL have not been turned on, so the commit plane cannot be committed before crtc is enabled. That means OVL layer should not be enabled before crtc is enabled. Therefore, the atomic_commit_tail of mediatek-drm is hooked with drm_atomic_helper_commit_tail_rpm(). Another reason is that the plane_state of drm_atomic_state is not synchronized with the plane_state stored in mtk_crtc during crtc enablng, so just set all planes to disabled. Fixes: 119f5173 ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") Signed-off-by:
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Jason-JH.Lin authored
According to the comment in drm_atomic_helper_async_commit(), we should make sure FBs have been swapped, so that cleanups in the new_state performs a cleanup in the old FB. So we should move swapping FBs after calling mtk_plane_update_new_state(), to avoid using the old FB which could be freed. Fixes: 1a64a7af ("drm/mediatek: Fix cursor plane no update") Signed-off-by:
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Jason-JH.Lin authored
Move DDP_COMPONENT_DP_INTF0 from mt8188_mtk_ddp_main array to a connector routes array called mt8188_mtk_ddp_main_routes and add DDP_COMPONENT_DSI0 to mt8188_mtk_ddp_main_routes to support dynamic selection capability for mt8188. Signed-off-by:
Nathan Lu <nathan.lu@mediatek.com> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by:
Fei Shao <fshao@chromium.org> Tested-by:
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Jason-JH.Lin authored
Add implementation of mtk_dsi_encoder_index to mtk_ddp_comp_func to make mtk_dsi support dynamic connector selection. Signed-off-by:
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Jason-JH.Lin authored
Add implementation of mtk_dpi_encoder_index to mtk_ddp_comp_func to make mtk_dpi support dynamic connector selection. Signed-off-by:
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Jason-JH.Lin authored
Add dynamic select available connector flow in mtk_drm_crtc_create() and mtk_drm_crtc_atomic_enable(). In mtk_drm_crtc_create(), if there is a connector routes array in drm driver data, all components definded in the connector routes array will be checked and their encoder_index will be set. In mtk_drm_crtc_atomic_enable(), crtc will check its encoder_index to identify which componet in the connector routes array should append. Signed-off-by:
Nancy Lin <nancy.lin@mediatek.com> Signed-off-by:
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Jason-JH.Lin authored
To support dynamic connector selection function, each ddp_comp need to get their encoder_index to identify which connector should be selected. Add encoder_index interface for mtk_ddp_comp_funcs to get the encoder identifier by drm_encoder_index(). Then drm driver will call mtk_ddp_comp_encoder_index_set() to store the encoder_index to each ddp_comp in connector routes. Signed-off-by:
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Jason-JH.Lin authored
According to mtk_drm_kms_init(), the all_drm_private array in each drm private data stores all drm private data in display path order. In mtk_drm_get_all_drm_priv(), each element in all_drm_priv should have one display path private data, such as: all_drm_priv[CRTC_MAIN] should only have main_path data all_drm_priv[CRTC_EXT] should only have ext_path data all_drm_priv[CRTC_THIRD] should only have third_path data So we need to add the length checking for each display path before assigning their drm private data into all_drm_priv array. Then the all_drm_private array in each drm private data needs to be assigned in their display path order. Fixes: 1ef7ed48 ("drm/mediatek: Modify mediatek-drm for mt8195 multi mmsys support") Signed-off-by:
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Jason-JH.Lin authored
Add mtk_drm_crtc_path enum for each display path. Instead of using array index of all_drm_priv in mtk_drm_kms_init(), mtk_drm_crtc_path enum can make code more readable. Signed-off-by:
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Jason-JH.Lin authored
Add missing mmsys_dev_num to mt8188 vdosys0 driver data. Fixes: 54b48080 ("drm/mediatek: Add mediatek-drm of vdosys0 support for mt8188") Signed-off-by:
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- 27 Sep, 2023 1 commit
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Shuijing Li authored
Support IGT (Intel GPU Tools) in Mediatek DSI driver. According to the description of MIPI Alliance Specification for D-PHY Version 1.1, the maximum supported data rate is 1.5Gbps, so add mode_valid callback to dsi bridge to filter out the data rate exceeding the Specification. Signed-off-by:
Shuijing Li <shuijing.li@mediatek.com> Reviewed-by:
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- 24 Sep, 2023 6 commits
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Jani Nikula authored
Setting new_edid to NULL leaks the buffer. Fixes: f70ac097 ("drm/mediatek: Add MT8195 Embedded DisplayPort driver") Cc: Markus Schneider-Pargmann <msp@baylibre.com> Cc: Guillaume Ranquet <granquet@baylibre.com> Cc: Bo-Chen Chen <rex-bc.chen@mediatek.com> Cc: CK Hu <ck.hu@mediatek.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Dmitry Osipenko <dmitry.osipenko@collabora.com> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: <stable@vger.kernel.org> # v6.1+ Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Reviewed-by:
Guillaume Ranquet <granquet@baylibre.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20230914131058.2472260-1-jani.nikula@intel.com/Signed-off-by:
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Jani Nikula authored
The sads returned by drm_edid_to_sad() needs to be freed. Fixes: e71a8ebb ("drm/mediatek: dp: Audio support for MT8195") Cc: Guillaume Ranquet <granquet@baylibre.com> Cc: Bo-Chen Chen <rex-bc.chen@mediatek.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Dmitry Osipenko <dmitry.osipenko@collabora.com> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: <stable@vger.kernel.org> # v6.1+ Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://patchwork.kernel.org/project/dri-devel/patch/20230914155317.2511876-1-jani.nikula@intel.com/Signed-off-by:
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Shuijing Li authored
Add support MT8188 dp/edp function Signed-off-by:
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Shuijing Li authored
Due to the difference of HW, different dividers need to be set. Signed-off-by:
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Shuijing Li authored
The audio packet arrangement function is to only arrange audio packets into the Hblanking area. In order to align with the HW default setting of mt8195, this function needs to be turned off. Signed-off-by:
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Shuijing Li authored
Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC. Signed-off-by:
Jitao Shi <jitao.shi@mediatek.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patchwork.kernel.org/project/dri-devel/patch/20230822024155.26670-2-shuijing.li@mediatek.com/Signed-off-by:
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- 11 Sep, 2023 4 commits
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Jason-JH.Lin authored
1. Instead of multiplying 2 variable of different types. Change to assign a value of one variable and then multiply the other variable. 2. Add a int variable for multiplier calculation instead of calculating different types multiplier with dma_addr_t variable directly. Fixes: 1a64a7af ("drm/mediatek: Fix cursor plane no update") Signed-off-by:
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Shuijing Li authored
Add the compatible because there are different definitions for cmdq register bit control in mt8188. Signed-off-by:
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Shuijing Li authored
For mt8188, add dsi cmdq reg control to send long packets to panel initialization. MT8188 hardware has been changed to automatically set the cmdq_size value by default when sending long packets. In this patch, the cmdq_size value is set manually instead. Remain consistent with previous IC. Signed-off-by:
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Shuijing Li authored
Add dt-binding documentation of dsi for MediaTek MT8188 SoC. Signed-off-by:
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- 10 Sep, 2023 2 commits
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Linus Torvalds authored
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git://anongit.freedesktop.org/drm/drmLinus Torvalds authored
Pull drm ci scripts from Dave Airlie: "This is a bunch of ci integration for the freedesktop gitlab instance where we currently do upstream userspace testing on diverse sets of GPU hardware. From my perspective I think it's an experiment worth going with and seeing how the benefits/noise playout keeping these files useful. Ideally I'd like to get this so we can do pre-merge testing on PRs eventually. Below is some info from danvet on why we've ended up making the decision and how we can roll it back if we decide it was a bad plan. Why in upstream? - like documentation, testcases, tools CI integration is one of these things where you can waste endless amounts of time if you accidentally have a version that doesn't match your source code - but also like the above, there's a balance, this is the initial cut of what we think makes sense to keep in sync vs out-of-tree, probably needs adjustment - gitlab supports out-of-repo gitlab integration and that's what's been used for the kernel in drm, but it results in per-driver fragmentation and lots of duplicated effort. the simple act of smashing an arbitrary winner into a topic branch already started surfacing patches on dri-devel and sparking good cross driver team discussions Why gitlab? - it's not any more shit than any of the other CI - drm userspace uses it extensively for everything in userspace, we have a lot of people and experience with this, including integration of hw testing labs - media userspace like gstreamer is also on gitlab.fd.o, and there's discussion to extend this to the media subsystem in some fashion Can this be shared? - there's definitely a pile of code that could move to scripts/ if other subsystem adopt ci integration in upstream kernel git. other bits are more drm/gpu specific like the igt-gpu-tests/tools integration - docker images can be run locally or in other CI runners Will we regret this? - it's all in one directory, intentionally, for easy deletion - probably 1-2 years in upstream to see whether this is worth it or a Big Mistake. that's roughly what it took to _really_ roll out solid CI in the bigger userspace projects we have on gitlab.fd.o like mesa3d" * tag 'topic/drm-ci-2023-08-31-1' of git://anongit.freedesktop.org/drm/drm: drm: ci: docs: fix build warning - add missing escape drm: Add initial ci/ subdirectory
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