- 20 Oct, 2023 31 commits
-
-
André Almeida authored
Giving that we use codedump just for device resets, move it's functions and structs to a more semantic file, the amdgpu_reset.{c, h}. Signed-off-by:André Almeida <andrealmeid@igalia.com> Signed-off-by:
Shashank Sharma <shashank.sharma@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com>
-
André Almeida authored
To better organize struct amdgpu_device, keep all reset information related fields together in a separated struct. Signed-off-by:
-
Shiwu Zhang authored
XGMI TA will set the capability flag to indicate whether the port_num info is supported or not. KGD checks the flag and accordingly picks up the right buffer format and send the right command to TA to retrieve the info. v2: simplify the code by reusing the same statement (lijo) Signed-off-by:
Shiwu Zhang <shiwu.zhang@amd.com> Acked-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Le Ma <le.ma@amd.com> Signed-off-by:
-
Shiwu Zhang authored
Per the xgmi ta implementation, KGD needs to fill in node_ids in concern into the shared command output buffer rather than the command input buffer. Input buffer is not used for GET_PEER_LINKS command execution. In this way, xgmi ta can reuse the node info in the output buffer just filled in and populate the same buffer with link info directly. Signed-off-by:
-
Tao Zhou authored
PMFW will be responsible for them. v2: remove query interfaces. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
-
Shiwu Zhang authored
Update the header file to the v20.00.00.13 v1: rename TA_COMMAND_XGMI__GET_GET_TOPOLOGY_INFO to TA_COMMAND_XGMI__GET_TOPOLOGY_INFO And also rename struct ta_xgmi_cmd_get_peer_link_info_output to ta_xgmi_cmd_get_peer_link_info accordingly v2: add structs to support xgmi GET_EXTEND_PEER_LINK command Signed-off-by:
-
Tao Zhou authored
Record the debug mode status in RAS. Signed-off-by:
-
Tao Zhou authored
Simplify the code. Signed-off-by:
-
Li Ma authored
add clockgating support for NBIO ip 7.7.1 Signed-off-by:
Li Ma <li.ma@amd.com> Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Reviewed-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
-
Li Ma authored
add get_clockgating_state, update_medium_grain_light_sleep and update_medium_grain_clock_gating in nbio_v7_11_funcs v1: add missing funcs in nbio_v7_11.c v2: modify the if condition and add spport for nbio v7.11 clockgating. Signed-off-by:
-
Stanley.Yang authored
Enable RAS feature by default for aqua vanjaram on apu platform. Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
-
Yang Wang authored
typo fix. Fixes: 5b1270be ("drm/amdgpu: add ras_err_info to identify RAS error source") Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Candice Li <candice.li@amd.com> Signed-off-by:
-
Bokun Zhang authored
- In VCN 4 SRIOV code path, add code to enable RB decouple feature Signed-off-by:
Bokun Zhang <bokun.zhang@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
-
Bokun Zhang authored
- Update VCN header for RB decouple feature - Add metadata struct, metadata will be placed after each RB Signed-off-by:
-
Bokun Zhang authored
- Add function to check if RB decouple is enabled under SRIOV Signed-off-by:
-
Bokun Zhang authored
- Update SRIOV header with RB decouple flag Signed-off-by:
-
Stanley.Yang authored
Fix delete nodes that it has been freed. Fixes: 5b1270be ("drm/amdgpu: add ras_err_info to identify RAS error source") Signed-off-by:
-
Stanley.Yang authored
Enable smu_v13_0_6 mca debug mode if ras is enabled. Changed from V1: enable mca debug mode if ras enabled. Signed-off-by:
-
Hawking Zhang authored
Add RAS sepcifc programming to dpg sram. Signed-off-by:
-
Nathan Chancellor authored
display_mode_code.c is unconditionally built with -Wframe-larger-than=2048, which causes warnings even when CONFIG_FRAME_WARN has been set to 0, which should show no warnings. Use the existing $(frame_warn_flag) variable, which handles this situation. This is basically commit 25f178bb ("drm/amd/display: Respect CONFIG_FRAME_WARN=0 in dml Makefile") but for DML2. Fixes: 7966f319 ("drm/amd/display: Introduce DML2") Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
-
Jiapeng Chong authored
No functional modification involved. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:2902 dm_resume() warn: inconsistent indenting. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6940Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
-
Yang Li authored
./drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c:4802:84-89: WARNING: conversion to bool not needed here Reported-by:
Yang Li <yang.lee@linux.alibaba.com> Signed-off-by:
-
Yang Li authored
./drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c:464:3-4: Unneeded semicolon Reported-by:
-
Yang Li authored
./drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c: dce110_hwseq.h is included more than once. Reported-by:
-
Yang Li authored
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn35/dcn35_fpu.c:261 dcn35_update_bw_bounding_box_fpu() warn: inconsistent indenting Signed-off-by:
-
Bas Nieuwenhuizen authored
The incoming strings might not be terminated by a newline or a 0. (found while testing a program that just wrote the string itself, causing a crash) Cc: stable@vger.kernel.org Fixes: e3933f26 ("drm/amd/pp: Add edit/commit/show OD clock/voltage support in sysfs") Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by:
-
Hawking Zhang authored
Set VCN/JPEG RAS masks to enable software RAS for VCN and JPEG. Signed-off-by:
-
Tao Zhou authored
Make the code architecture more simple. v2: reuse ras_reset_error_count in ras_reset_error_status. Signed-off-by:
-
Jesse Zhang authored
Function svm_range_split_by_grinity is not used, so it is removed. Signed-off-by:
Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
-
Ma Jun authored
Support for getting power1_cap_min value on smu13 and smu11. For other Asics, we still use 0 as the default value. Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
-
Candice Li authored
Support replay mode where UE could be converted to CE. Signed-off-by:
-
- 19 Oct, 2023 9 commits
-
-
Felix Kuehling authored
In amdgpu_dma_buf_move_notify reserve fences for the page table updates in amdgpu_vm_clear_freed and amdgpu_vm_handle_moved. This fixes a BUG_ON in dma_resv_add_fence when using SDMA for page table updates. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
-
Felix Kuehling authored
abo->tbo.resource may be NULL in amdgpu_vm_bo_update. Fixes: 18025378 ("drm/ttm: stop allocating dummy resources during BO creation") Signed-off-by:
-
Stanley.Yang authored
This is workaround, kiq ring test failed in suspend stage when do ras recovery. Signed-off-by:
-
Colin Ian King authored
There are a few spelling mistakes and an minor grammatical issue in some dml_print messages. Fix these. Signed-off-by:
Colin Ian King <colin.i.king@gmail.com> Signed-off-by:
-
Jiapeng Chong authored
No functional modification involved. drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c:305 svm_range_free() warn: inconsistent indenting. Reported-by:
-
Stylon Wang authored
[Why] Many of the register macros defined ind dcn32_resource.h have extra brackets. This is not conforming to the style of those defined in other DC header files. [How] Remove these brackets in dcn32_resource.h Reviewed-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
-
Mario Limonciello authored
If the IMU version wasn't discovered from the header, such as when the firmware was directly loaded by PSP then there is no firmware version to show to userspace from sysfs or IOCTL. The IMU F/W stores the version in the first scratch register though, so fetch it in these cases to let the driver export. Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
-
Mario Limonciello authored
When the IMU ucode is loaded by the PSP parsing the version that comes from Linux will vary. Rather than showing the wrong data to kernel interface consumers, avoid populating it in this case. Reviewed-by:
-
Mario Limonciello authored
The intention for early init is to find any missing microcode early and fail the driver load if it's missing. Move this step to earlier in driver init to match other IP blocks. Reviewed-by:
-
