- 12 Jan, 2018 3 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
A few fixes for 4.16: - Cleanup the the remains of ttm io_mem_pfn - A couple dpm quirks for SI - Add Chunming as another amdgpu maintainer - A few more huge page fixes - A few other misc fixes * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: drm/amd/pp: Implement get_max_high_clocks for CI/VI MAINTAINERS: add David (Chunming) Zhou as additional amdgpu maintainer drm/amdgpu: fix 64bit BAR detection drm/amdgpu: optimize moved handling only when vm_debug is inactive drm/amdgpu: simplify huge page handling drm/amdgpu: update VM PDs after the PTs drm/amdgpu: minor optimize VM moved handling v2 drm/amdgpu: loosen the criteria for huge pages a bit drm/amd/powerplay: set pp_num_states as 0 on error situation drm/ttm: specify DMA_ATTR_NO_WARN for huge page pools drm/ttm: remove ttm_bo_default_io_mem_pfn staging: remove the default io_mem_pfn set drm/amd/powerplay: fix memory leakage when reload (v2) drm/amdgpu/gfx9: only init the apertures used by KGD (v2) drm/amdgpu: add atpx quirk handling (v2) drm/amdgpu: Add dpm quirk for Jet PRO (v2) drm/radeon: Add dpm quirk for Jet PRO (v2)
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git://anongit.freedesktop.org/tegra/linuxDave Airlie authored
drm/tegra: Changes for v4.16-rc1 The bulk of these changes are preparation work and addition of support for Tegra186. Currently only HDMI output (the primary output on Jetson TX2) is supported, but the hardware is also capable of doing DSI and DisplayPort. Tegra DRM now also uses the atomic commit helpers instead of the open- coded variant that was only doing half its job. As a bit of a byproduct of the Tegra186 support the driver also gained HDMI 2.0 as well as zpos property support. Along the way there are also a few patches to clean up a few things and fix minor issues. * tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux: (51 commits) drm/tegra: dc: Properly cleanup overlay planes drm/tegra: dc: Fix possible_crtcs mask for planes drm/tegra: dc: Restore YUV overlay support drm/tegra: dc: Implement legacy blending drm/tegra: Correct timeout in tegra_syncpt_wait drm/tegra: gem: Correct iommu_map_sg() error checking drm/tegra: dc: Link DC1 to DC0 on Tegra20 drm/tegra: Fix non-debugfs builds drm/tegra: dpaux: Keep reset defaults for hybrid pad parameters drm/tegra: Mark Tegra186 display hub PM functions __maybe_unused drm/tegra: Use IOMMU groups gpu: host1x: Use IOMMU groups drm/tegra: Implement zpos property drm/tegra: dc: Remove redundant spinlock drm/tegra: dc: Use direct offset to plane registers drm/tegra: dc: Support more formats drm/tegra: fb: Force alpha formats drm/tegra: dpaux: Add Tegra186 support drm/tegra: dpaux: Implement runtime PM drm/tegra: sor: Support HDMI 2.0 modes ...
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git://people.freedesktop.org/~robclark/linuxDave Airlie authored
Updates for 4.16.. fairly small this time around, main thing is devfreq support for the gpu. * tag 'drm-msm-next-2018-01-10' of git://people.freedesktop.org/~robclark/linux: drm/msm: Add devfreq support for the GPU drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter drm/msm/adreno: Read the speed bins for a5xx targets drm/msm/adreno: Move clock parsing to adreno_gpu_init() drm/msm/adreno: Cleanup chipid parsing drm/msm/gpu: Remove unused bus scaling code drm/msm/adreno: Remove a useless call to dev_pm_opp_get_freq() drm/msm/adreno: Call dev_pm_opp_put() drm/msm: Fix NULL deref in adreno_load_gpu drm/msm: gpu: Only sync fences on rings that exist drm/msm: fix leak in failed get_pages drm/msm: avoid false-positive -Wmaybe-uninitialized warning drm/msm/mdp4: Deduplicate bus_find_device() by name matching drm/msm: add missing MODULE_FIRMWARE declarations drm/msm: update adreno firmware path in MODULE_FIRMWARE drm/msm: free kstrdup'd cmdline drm/msm: fix msm_rd_dump_submit prototype drm/msm: fix spelling mistake: "ringubffer" -> "ringbuffer"
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- 10 Jan, 2018 25 commits
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Rex Zhu authored
v2: add table length check. DC component expect PP to give max engine clock and memory clock through pp_get_display_mode_validation_clocks on DGPU as well. This patch can fix MultiGPU-Display blank out with 1 IGPU-4k display and 2 DGPU-two 4K displays. Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Just another contact for the amdgpu driver. Signed-off-by:
Christian König <christian.koenig@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Windows added by the BIOS are not marked as 64bit because they are usually not changeable anyway. This fixes large BAR support on my new Ryzen build system. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Otherwise we would completely circumvent that debugging feature. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Roger He <Hongbo.He@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Update the PDEs after resetting the huge flag. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Acked-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Necessary for the next patch. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Acked-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Try to lock moved BOs if it's successful we can update the PTEs directly to the new location. v2: rebase Signed-off-by:
Christian König <christian.koenig@amd.com> Acked-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
We can actually handle invalid huge pages perfectly fine now. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Acked-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Suppress warning messages when allocating huge pages fails since we can always fall back to normal pages. Signed-off-by:
Christian König <christian.koenig@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Tan Xiaojun authored
No one will use this function except ttm_bo_io_mem_pfn() now, so move the calculation of ttm_bo_default_io_mem_pfn() into ttm_bo_io_mem_pfn() and do some cleanup. Signed-off-by:
Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Tan Xiaojun authored
The default interface situation has been taken into the framework, so remove the default set of each module. Signed-off-by:
Tan Xiaojun <tanxiaojun@huawei.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Yintian Tao authored
add smu_free_memory when smu fini to prevent memory leakage v2: squash in typo fix (Yintian) and warning (Harry) Signed-off-by:
Yintian Tao <yttao@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use adev->vm_manager.id_mgr[0].num_ids rather than hardcoded 16. v2: use AMDGPU_GFXHUB rather than hardcoded 0 (Christian) Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Noticed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add quirks for handling PX/HG systems. In this case, add a quirk for a weston dGPU that only seems to properly power down using ATPX power control rather than HG (_PR3). v2: append a new weston XT Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> (v2) Reviewed-and-Tested-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
Fixes stability issues. v2: clamp sclk to 600 Mhz Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
Fixes stability issues. v2: clamp sclk to 600 Mhz Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Jordan Crouse authored
Add support for devfreq to dynamically control the GPU frequency. By default try to use the 'simple_ondemand' governor which can adjust the frequency based on GPU load. v2: Fix __aeabi_uldivmod issue from the 0 day bot and use devfreq_recommended_opp() as suggested by Rob. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
Even though the default countable for CP0 is CP_ALWAYS_COUNT (0), program the selector during HW initialization in an effort to be up front about which counters are programmed and why. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
Some 5xx based chipsets have different bins for GPU clock speeds. Read the fuses (if applicable) and set the appropriate OPP table. This will only work with OPP v2 tables - the bin will be ignored for legacy pwrlevel tables. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
Move the clock parsing to adreno_gpu_init() to allow for target specific probing and manipulation of the clock tables. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
We don't need to convert the chipid to an intermediate value and then back again into a struct adreno_rev. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
Remove the downstream bus scaling code. It isn't needed for for compatibility with a downstream or vendor kernel. Get it out of the way to clear space for devfreq support. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
Calling dev_pm_opp_find_freq_floor() returns the matched frequency in 'freq'. We don't need to call dev_pm_opp_get_freq() again to get the frequency value. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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Jordan Crouse authored
We need to call dev_pm_opp_put() to put back the reference for the OPP struct after calling the various dev_pm_opp_get_* functions. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
Rob Clark <robdclark@gmail.com>
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- 09 Jan, 2018 3 commits
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Arnd Bergmann authored
The newly added get_local_mem_info() function prints a phys_addr_t using 0x%llx, which is wrong on most 32-bit systems, as shown by this warning: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c: In function 'get_local_mem_info': include/linux/kern_levels.h:5:18: error: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'resource_size_t {aka unsigned int}' [-Werror=format=] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:297:31: note: format string is defined here pr_debug("Address base: 0x%llx limit 0x%llx public 0x%llx private 0x%llx\n", Passing the address by reference to the special %pap format string will produce the correct output and avoid the warning. Fixes: 30f1c042 ("drm/amdgpu: Implement get_local_mem_info") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 4.16: Cross-subsystem Changes: - some dt-binding changes for Ilitek and sun4i devices Core Changes: - panel_orientation_quirks: fix tainted kernel Driver Changes: - panel changes - A83T and LVDS support to sun4i * tag 'drm-misc-next-2018-01-08' of git://anongit.freedesktop.org/drm/drm-misc: drm/panel: lvds: Add support for the power-supply property dt-bindings: panel: lvds: Document power-supply property drm/sun4i: Add A83T support drm/sun4i: Add LVDS support drm/sun4i: Create minimal multipliers and dividers drm/sun4i: Force the mixer rate at 150MHz dt-bindings: display: sun4i-drm: Add A83T pipeline dt-bindings: display: sun4i-drm: Add LVDS properties drm/tinydrm: add driver for ST7735R panels dt-bindings: Add binding for Sitronix ST7735R display panels dt-bindings: add jianda vendor prefix drm/tinydrm: Update ILI9225 compatible string dt-bindings: update compatible string for ILI9225 dt-bindings: Add "vot" vendor prefix drm: fix tainted kernel caused by drm_panel_orientation_quirks.c drm/panel: Add Ilitek ILI9322 driver drm/panel: Add DT bindings for Ilitek ILI9322
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Last few updates for 4.16: - Misc fixes for amdgpu - Enable swapout for reserved BOs during allocation for ttm - Misc cleanups for ttm * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (24 commits) drm/amdgpu: Correct the IB size of bo update mapping. drm/ttm: enable swapout for reserved BOs during allocation drm/ttm: add new function to check if bo is allowable to evict or swapout drm/ttm: use an operation ctx for ttm_tt_bind drm/ttm: use an operation ctx for ttm_tt_populate in ttm_bo_driver (v2) drm/ttm: use an operation ctx for ttm_mem_global_alloc_page drm/ttm: use an operation ctx for ttm_mem_global_alloc drm/ttm: call ttm_bo_swapout directly when ttm shrink drm/vmwgfx: remove the default io_mem_pfn set drm/virtio: remove the default io_mem_pfn set drm/radeon: remove the default io_mem_pfn set drm/qxl: remove the default io_mem_pfn set drm/nouveau: remove the default io_mem_pfn set drm/mgag200: remove the default io_mem_pfn set drm/cirrus: remove the default io_mem_pfn set drm/bochs: remove the default io_mem_pfn set drm/ast: remove the default io_mem_pfn set drm/ttm: add ttm_bo_io_mem_pfn to check io_mem_pfn drm/amdgpu: fix VM faults with per VM BOs drm/ttm: drop the spin in delayed delete if the trylock doesn't work ...
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- 08 Jan, 2018 3 commits
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Thierry Reding authored
The first overlay plane can leak if initialization of the second overlay plane fails. Fix this by properly destroying the first overlay plane on error. Suggested-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Cursor and overlay planes use a possible_crtcs mask based on the DC pipe number. However, DRM requires each bit in the mask to correspond to the index of the CRTC, which will be different from the DC pipe number for a configuration where the first display controller is disabled, or where a deferred probe leads to the first display controller being probed after the first. Suggested-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Commit ebae8d07 ("drm/tegra: dc: Implement legacy blending") broke support for YUV overlays by accident. The reason is that YUV formats are considered opaque because they have no alpha component, but on the other hand no corresponding format with an alpha component can be returned. In the case of YUV formats, the opaque format is the same as the alpha format, so add the special case to restore YUV overlay support. Reported-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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- 05 Jan, 2018 3 commits
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Maxime Ripard authored
A significant number of panels need to power up a regulator in order to operate properly. Add support for the power-supply property to enable and disable such a regulator whenever needed. Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/0c0819bdf88fa948188df95e57a10820a8a4548d.1513854122.git-series.maxime.ripard@free-electrons.com
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Maxime Ripard authored
The power-supply property is used by a vast majority of panels, including panel-simple. Let's document it as a common property Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/0a6a3abcf1a6b7f0e66a81af8a44c5c0566ce06c.1513854122.git-series.maxime.ripard@free-electrons.com
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
drm/imx: format modifier support - Add tiled prefetch support to PRE - Add format modifier support to PRG and imx-drm-core - Use runtime PM to control PRG clock - Allow building ipu-v3 under COMPILE_TEST * tag 'imx-drm-next-2018-01-02' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: allow to build with COMPILE_TEST drm/imx: advertise supported plane format modifiers drm/imx: add FB modifier support gpu: ipu-v3: prg: add modifier support gpu: ipu-v3: pre: add tiled prefetch support gpu: ipu-v3: prg: switch to runtime PM
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- 04 Jan, 2018 3 commits
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git://git.armlinux.org.uk/~rmk/linux-armDave Airlie authored
This series builds upon the set of fixes previously submitted to move Armada DRM closer to atomic modeset. We're nowhere near yet, but this series helps to get us closer by unifying some of the differences between the primary and overlay planes. New features added allows userspace to disable the primary plane if overlay is full screen and there's nothing obscuring the colorkey - this saves having to fetch an entire buffer containing nothing but colorkey when displaying full screen video. [airlied: fixup for atomic plane helper rename: a01cb8ba Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Wed Nov 1 22:16:19 2017 +0200 drm: Move drm_plane_helper_check_state() into drm_atomic_helper.c ] * 'drm-armada-devel-4.15' of git://git.armlinux.org.uk/~rmk/linux-arm: (29 commits) drm/armada: expand overlay trace entry drm/armada: implement primary plane update drm/armada: extract register generation from armada_drm_primary_set() drm/armada: wait for previous work when moving overlay window drm/armada: move overlay plane register update generation drm/armada: re-organise overlay register update generation drm/armada: disable planes at next blanking period drm/armada: avoid work allocation drm/armada: allow armada_drm_plane_work_queue() to silently fail drm/armada: use drm_plane_helper_check_state() drm/armada: only enable HSMOOTH if scaling horizontally drm/armada: move writes of LCD_SPU_SRAM_PARA1 under lock drm/armada: move regs into armada_plane_work drm/armada: move event sending into armada_plane_work drm/armada: move fb retirement into armada_plane_work drm/armada: move overlay plane work out from under spinlock drm/armada: clear plane enable bit when disabling drm/armada: clean up armada_drm_crtc_plane_disable() drm/armada: allow the primary plane to be disabled drm/armada: wait and cancel any pending frame work at disable ...
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https://git.pengutronix.de/git/lst/linuxDave Airlie authored
Highlights this time: 1. Fix for a nasty Kconfig dependency chain issue from Philipp. 2. Occlusion query buffer address added to the cmdstream validator by Christian. 3. Fixes and cleanups to the job handling from me. This allows us to turn on the GPU performance profiling added in the last cycle. It is also prep work for hooking in the DRM GPU scheduler, which I hope to land for the next cycle. * 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux: (32 commits) drm/etnaviv: use memset32 to init pagetable drm/etnaviv: move submit free out of critical section drm/etnaviv: re-enable perfmon support drm/etnaviv: couple runtime PM management to submit object lifetime drm/etnaviv: move GPU active handling to bo pin/unpin drm/etnaviv: move cmdbuf into submit object drm/etnaviv: use submit exec_state for perfmon sampling drm/etnaviv: move exec_state to submit object drm/etnaviv: move PMRs to submit object drm/etnaviv: refcount the submit object drm/etnaviv: move ww_acquire_ctx out of submit object drm/etnaviv: move object unpinning to submit cleanup drm/etnaviv: attach in fence to submit and move fence wait to fence_sync drm/etnaviv: rename submit fence to out_fence drm/etnaviv: move object fence attachment to gem_submit path drm/etnaviv: simplify submit_create drm/etnaviv: add lockdep annotations to buffer manipulation functions drm/etnaviv: hold GPU lock while inserting END command drm/etnaviv: move workqueue to be per GPU drm/etnaviv: remove switch_context member from etnaviv_gpu ...
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Dave Airlie authored
Merge tag 'exynos-drm-next-for-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Remove lagacy IPP driver - This driver isn't used anymore so remove it. Marek is preparing new one which includes completely rewritten API so this driver will be replaced with the new version[1] later. And cleanups. [1] https://patches.linaro.org/cover/118386/ * tag 'exynos-drm-next-for-v4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: ipp: Remove Exynos DRM IPP subsystem drm/exynos/decon: Add include guard to the Exynos7 header drm/exynos/decon: Move headers from global to local place drm/exynos: decon5433: Remove unnecessary platform_get_resource() error check
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