- 23 Apr, 2013 10 commits
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Alex Deucher authored
v2: add richland support Signed-off-by:Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
Golden registers are arrays of register settings from the hw team that need to be initialized at asic startup. Signed-off-by: -
Alex Deucher authored
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Alex Deucher authored
Register audio callbacks for asic where we support audio. Cleans up the code and makes it easier to add support for newer asics. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
Split into DCE2/3 and DCE4/5 variants. Still todo is to calculate the DTO dividers properly. Add proper formula to the comments. Reviewed-by:
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Alex Deucher authored
Reviewed-by:
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Christian König authored
v2: not only raise the clocks on VCPU boot, but also on IB test. v3: agd5f: fix r600_uvd_init return value. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=63730Signed-off-by:
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Christian König authored
That not only saves some power, but also solves problems with older chips where an idle UVD block on higher clocks can cause problems. Signed-off-by:
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- 22 Apr, 2013 30 commits
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Christian König authored
Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by:
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Alex Deucher authored
The audio format change interrupts are an aid in debugging, but not required for operation. Signed-off-by: -
Alex Deucher authored
These chips were previously skipped since they are pre-R600. Signed-off-by: -
Rafał Miłecki authored
Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Signed-off-by:
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Rafał Miłecki authored
Driver fglrx setups audio and ACR packets after basic initialization, which sounds sane, do the same. Signed-off-by:
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Rafał Miłecki authored
Closed source driver fglrx seems to enable infoframes and audio packets at the end, which makes sense, do the same. Signed-off-by:
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Rafał Miłecki authored
Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Christian König authored
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Christian König authored
Message and feedback buffers must be at start of VRAM, not at start of address space. Signed-off-by:
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Alex Deucher authored
Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=57567 https://bugs.freedesktop.org/show_bug.cgi?id=43655 https://bugzilla.kernel.org/show_bug.cgi?id=56441 v2: blank displays first, then disable. Signed-off-by:
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Alex Deucher authored
Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. v2: blank displays first, then disable. Signed-off-by: -
Alex Deucher authored
Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: -
Alex Deucher authored
Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: -
Alex Deucher authored
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: -
Alex Deucher authored
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: -
Alex Deucher authored
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: -
git://anongit.freedesktop.org/tegra/linuxDave Airlie authored
drm/tegra: Changes for v3.10-rc1 The bulk of this pull-request is the host1x series that has been in the works for a few months. The current implementation looks good and has been tested by several independent parties. So far no issues have been found. To be on the safe side, the new Tegra-specific DRM IOCTLs depend on staging in order to give some amount of flexibility to change them just in case. The plan is to remove that dependency once more userspace exists to verify the adequacy of the IOCTLs. Currently only the 2D engine is supported, but patches are in the works to enable 3D support on top of this framework as well. Various bits of open-source userspace exist to test the 2D and 3D support[0]. This is still a bit immature but it allows to verify that the kernel interfaces work properly. To round things off there are two smaller cleanup patches, one of them adding a new pixel format and the other removing a redundent Kconfig dependency. [0]: https://github.com/grate-driver * tag 'drm/tegra/for-3.10' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: don't depend on OF drm/tegra: Support the XBGR8888 pixelformat drm/tegra: Add gr2d device gpu: host1x: drm: Add memory manager and fb gpu: host1x: Remove second host1x driver gpu: host1x: drm: Rename host1x to host1x_drm drm/tegra: Move drm to live under host1x gpu: host1x: Add debug support gpu: host1x: Add channel support gpu: host1x: Add syncpoint wait and interrupts gpu: host1x: Add host1x driver
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Stephen Warren authored
ARCH_TEGRA always enabled OF, so there's no need for any driver to depend on it. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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Thierry Reding authored
While at it, also include the RGB565 pixelformat in the list of formats supported by overlays. Signed-off-by:
Erik Faye-Lund <kusmabite@gmail.com>
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Terje Bergstrom authored
Add client driver for 2D device, and IOCTLs to pass work to host1x channel for 2D. Also adds functions that can be called to access sync points from DRM. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
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Arto Merilainen authored
This patch introduces a memory manager for tegra drm and moves existing parts to use it. As cma framebuffer helpers can no more be used, this patch adds also a separate framebuffer driver for tegra. Signed-off-by:
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Terje Bergstrom authored
Remove second host1x driver, and bind tegra-drm to the new host1x driver. The logic to parse device tree and track clients is moved to drm.c. Signed-off-by:
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Arto Merilainen authored
Both host1x and drm drivers have host1x structures. This patch renames the host1x structure under drm to follow name host1x_drm. Signed-off-by:
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Terje Bergstrom authored
Make drm part of host1x driver. Signed-off-by:
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Terje Bergstrom authored
Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by:
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Terje Bergstrom authored
Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by:
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Terje Bergstrom authored
Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by:
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Terje Bergstrom authored
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by:
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Laurent Pinchart authored
Test whether the pixel format changes in the mode set handler, and perform a full mode set instead of a mode set base if it does. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Laurent Pinchart authored
A page flip is not a mode set, changing the frame buffer pixel format doesn't make sense and isn't handled by most drivers anyway. Disallow it. Signed-off-by:
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