1. 18 Feb, 2015 6 commits
    • Emil Medve's avatar
      clk: qoriq: Add support for the platform PLL · a513b72c
      Emil Medve authored
      Change-Id: Iac11ed95f274485a86d2c11f32a3dc502bcd020f
      Signed-off-by: default avatarEmil Medve <Emilian.Medve@Freescale.com>
      Acked-by: default avatarTang Yuantian <Yuantian.Tang@freescale.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      a513b72c
    • Emil Medve's avatar
      powerpc/corenet: Enable CLK_QORIQ · 8f0ab1e1
      Emil Medve authored
      Change-Id: I1a80ad7b9f6854791bd270b746f93a91439155a6
      Signed-off-by: default avatarEmil Medve <Emilian.Medve@Freescale.com>
      Acked-by: default avatarTang Yuantian <Yuantian.Tang@freescale.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      8f0ab1e1
    • Javier Martinez Canillas's avatar
      clk: Replace explicit clk assignment with __clk_hw_set_clk · 4e907ef6
      Javier Martinez Canillas authored
      The change in the clk API to return a per-user clock instance, moved
      the clock state to struct clk_core so now the struct clk_hw .core field
      is used instead of .clk for most operations.
      
      So for hardware clocks that needs to share the same clock state, both
      the .core and .clk pointers have to be assigned but currently only the
      .clk is set. This leads to NULL pointer dereference when the operations
      try to access the hw clock .core. For example, the composite clock rate
      and mux components didn't have a .core set which leads to this error:
      
      Unable to handle kernel NULL pointer dereference at virtual address 00000034
      pgd = c0004000
      [00000034] *pgd=00000000
      Internal error: Oops: 5 [#1] PREEMPT SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.19.0-next-20150211-00002-g1fb7f0e1150d #423
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      task: ee480000 ti: ee488000 task.ti: ee488000
      PC is at clk_mux_determine_rate_flags+0x14/0x19c
      LR is at __clk_mux_determine_rate+0x24/0x2c
      pc : [<c03a355c>]    lr : [<c03a3734>]    psr: a0000113
      sp : ee489ce8  ip : ee489d84  fp : ee489d84
      r10: 0000005c  r9 : 00000001  r8 : 016e3600
      r7 : 00000000  r6 : 00000000  r5 : ee442200  r4 : ee440c98
      r3 : ffffffff  r2 : 00000000  r1 : 016e3600  r0 : ee440c98
      Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 4000406a  DAC: 00000015
      Process swapper/0 (pid: 1, stack limit = 0xee488210)
      Stack: (0xee489ce8 to 0xee48a000)
      9ce0:                   00000000 ffffffff 60000113 ee440c98 ee442200 00000000
      9d00: 016e3600 ffffffff 00000001 0000005c ee489d84 c03a3734 ee489d80 ee489d84
      9d20: 00000000 c048b130 00000400 c03a5798 ee489d80 ee489d84 c0607f60 ffffffea
      9d40: 00000001 00000001 ee489d5c c003f844 c06e3340 ee402680 ee440d0c ed935000
      9d60: 016e3600 00000003 00000001 0000005c eded3700 c03a11a0 ee489d80 ee489d84
      9d80: 016e3600 ee402680 c05b413a eddc9900 016e3600 c03a1228 00000000 ffffffff
      9da0: ffffffff eddc9900 016e3600 c03a1c1c ffffffff 016e3600 ed8c6710 c03d6ce4
      9dc0: eded3400 00000000 00000000 c03c797c 00000001 0000005c eded3700 eded3700
      9de0: 000005e0 00000001 0000005c c03db8ac c06e7e54 c03c8f08 00000000 c06e7e64
      9e00: c06b6e74 c06e7f64 000005e0 c06e7df8 c06e5100 00000000 c06e7e6c c06e7f54
      9e20: 00000000 00000000 eebd9550 00000000 c06e7da0 c06e7e54 ee7b5010 c06e7da0
      9e40: eddc9690 c06e7db4 c06b6e74 00000097 00000000 c03d4398 00000000 ee7b5010
      9e60: eebd9550 c06e7da0 00000000 c03db824 ee7b5010 fffffffe c06e7db4 c0299c7c
      9e80: ee7b5010 c072a05c 00000000 c0298858 ee7b5010 c06e7db4 ee7b5044 00000000
      9ea0: eddc9580 c0298a04 c06e7db4 00000000 c0298978 c02971d4 ee405c78 ee732b40
      9ec0: c06e7db4 eded3800 c06d6738 c0298044 c0608300 c06e7db4 00000000 c06e7db4
      9ee0: 00000000 c06beb58 c06beb58 c0299024 00000000 c068dd00 00000000 c0008944
      9f00: 00000038 c049013c ee462200 c0711920 ee480000 60000113 c06c2cb0 00000000
      9f20: 00000000 c06c2cb0 60000113 00000000 ef7fcafc 00000000 c0640194 c00389ec
      9f40: c05ec3a8 c063f824 00000006 00000006 c06c2c50 c0696444 00000006 c0696424
      9f60: c06ee1c0 c066b588 c06b6e74 00000097 00000000 c066bd44 00000006 00000006
      9f80: c066b588 c003d684 00000000 c0481938 00000000 00000000 00000000 00000000
      9fa0: 00000000 c0481940 00000000 c000e680 00000000 00000000 00000000 00000000
      9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
      [<c03a355c>] (clk_mux_determine_rate_flags) from [<c03a3734>] (__clk_mux_determine_rate+0x24/0x2c)
      [<c03a3734>] (__clk_mux_determine_rate) from [<c03a5798>] (clk_composite_determine_rate+0xbc/0x238)
      [<c03a5798>] (clk_composite_determine_rate) from [<c03a11a0>] (clk_core_round_rate_nolock+0x5c/0x9c)
      [<c03a11a0>] (clk_core_round_rate_nolock) from [<c03a1228>] (__clk_round_rate+0x38/0x40)
      [<c03a1228>] (__clk_round_rate) from [<c03a1c1c>] (clk_round_rate+0x20/0x38)
      [<c03a1c1c>] (clk_round_rate) from [<c03d6ce4>] (max98090_dai_set_sysclk+0x34/0x118)
      [<c03d6ce4>] (max98090_dai_set_sysclk) from [<c03c797c>] (snd_soc_dai_set_sysclk+0x38/0x80)
      [<c03c797c>] (snd_soc_dai_set_sysclk) from [<c03db8ac>] (snow_late_probe+0x24/0x48)
      [<c03db8ac>] (snow_late_probe) from [<c03c8f08>] (snd_soc_register_card+0xf04/0x1070)
      [<c03c8f08>] (snd_soc_register_card) from [<c03d4398>] (devm_snd_soc_register_card+0x30/0x64)
      [<c03d4398>] (devm_snd_soc_register_card) from [<c03db824>] (snow_probe+0x68/0xcc)
      [<c03db824>] (snow_probe) from [<c0299c7c>] (platform_drv_probe+0x48/0x98)
      [<c0299c7c>] (platform_drv_probe) from [<c0298858>] (driver_probe_device+0x114/0x234)
      [<c0298858>] (driver_probe_device) from [<c0298a04>] (__driver_attach+0x8c/0x90)
      [<c0298a04>] (__driver_attach) from [<c02971d4>] (bus_for_each_dev+0x54/0x88)
      [<c02971d4>] (bus_for_each_dev) from [<c0298044>] (bus_add_driver+0xd8/0x1cc)
      [<c0298044>] (bus_add_driver) from [<c0299024>] (driver_register+0x78/0xf4)
      [<c0299024>] (driver_register) from [<c0008944>] (do_one_initcall+0x80/0x1d0)
      [<c0008944>] (do_one_initcall) from [<c066bd44>] (kernel_init_freeable+0x10c/0x1d8)
      [<c066bd44>] (kernel_init_freeable) from [<c0481940>] (kernel_init+0x8/0xe4)
      [<c0481940>] (kernel_init) from [<c000e680>] (ret_from_fork+0x14/0x34)
      Code: e24dd00c e5907000 e1a08001 e88d000c (e5970034)
      
      The changes were made using the following cocinelle semantic patch:
      
      @i@
      @@
      
      @depends on i@
      identifier dst;
      @@
      
      - dst->clk = hw->clk;
      + __clk_hw_set_clk(dst, hw);
      
      @depends on i@
      identifier dst;
      @@
      
      - dst->hw.clk = hw->clk;
      + __clk_hw_set_clk(&dst->hw, hw);
      
      Fixes: 035a61c3 ("clk: Make clk API return per-user struct clk instances")
      Signed-off-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
      Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      4e907ef6
    • Javier Martinez Canillas's avatar
      clk: Add __clk_hw_set_clk helper function · 2e65d8bf
      Javier Martinez Canillas authored
      After the clk API change to return a per-user clock instance, both the
      struct clk_core and struct clk pointers from the hw clock needs to be
      assigned to clock that share the same state.
      
      In the future the struct clk_core will be removed and this is going to
      change again so to avoid having to change the assignments twice in all
      the drivers, add a helper function to have an indirection level.
      Signed-off-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
      Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      2e65d8bf
    • Javier Martinez Canillas's avatar
      clk: Don't dereference parent clock if is NULL · 9e0ad7d2
      Javier Martinez Canillas authored
      The clock passed as an argument to clk_mux_determine_rate_flags()
      has the CLK_SET_RATE_PARENT flag set but it has no parent, then a
      NULL pointer will tried to be dereferenced.
      
      This shouldn't happen since setting that flag for a clock with no
      parent is a bug but the core should be robust to handle that case.
      
      Fixes: 035a61c3 ("clk: Make clk API return per-user struct clk instances")
      Signed-off-by: default avatarJavier Martinez Canillas <javier.martinez@collabora.co.uk>
      Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      9e0ad7d2
    • Tomeu Vizoso's avatar
      MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr · 69b59cb8
      Tomeu Vizoso authored
      They were added to this function by mistake when they were added to the
      clk_ops.determine_rate callback.
      
      Fixes: 1c8e6004 ("clk: Add rate constraints to clocks")
      Signed-off-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      69b59cb8
  2. 07 Feb, 2015 1 commit
    • Stephen Boyd's avatar
      clkdev: Always allocate a struct clk and call __clk_get() w/ CCF · 73e0e496
      Stephen Boyd authored
      of_clk_get_by_clkspec() returns a struct clk pointer but it
      doesn't create a new handle for the consumers when we're using
      the common clock framework. Instead it just returns whatever the
      clk provider hands out. When the consumers go to call clk_put()
      we get an Oops.
      
      Unable to handle kernel paging request at virtual address 00200200
      pgd = c0004000
      [00200200] *pgd=00000000
      Internal error: Oops: 805 [#1] PREEMPT SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.19.0-rc1-00104-ga251361a-dirty #992
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      task: ee00b000 ti: ee088000 task.ti: ee088000
      PC is at __clk_put+0x24/0xd0
      LR is at clk_prepare_lock+0xc/0xec
      pc : [<c03eef38>]    lr : [<c03ec1f4>]    psr: 20000153
      sp : ee089de8  ip : 00000000  fp : 00000000
      r10: ee02f480  r9 : 00000001  r8 : 00000000
      r7 : ee031cc0  r6 : ee089e08  r5 : 00000000  r4 : ee02f480
      r3 : 00100100  r2 : 00200200  r1 : 0000091e  r0 : 00000001
      Flags: nzCv  IRQs on  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 4000404a  DAC: 00000015
      Process swapper/0 (pid: 1, stack limit = 0xee088238)
      Stack: (0xee089de8 to 0xee08a000)
      9de0:                   ee7c8f14 c03f0ec8 ee089e08 00000000 c0718dc8 00000001
      9e00: 00000000 c04ee0f0 ee7e0844 00000001 00000181 c04edb58 ee2bd320 00000000
      9e20: 00000000 c011dc5c ee16a1e0 00000000 00000000 c0718dc8 ee16a1e0 ee2bd1e0
      9e40: c0641740 ee16a1e0 00000000 ee2bd320 c0718dc8 ee1d3e10 ee1d3e10 00000000
      9e60: c0769a88 00000000 c0718dc8 00000000 00000000 c02c3124 c02c310c ee1d3e10
      9e80: c07b4eec 00000000 c0769a88 c02c1d0c ee1d3e10 c0769a88 ee1d3e44 00000000
      9ea0: c07091dc c02c1eb8 00000000 c0769a88 c02c1e2c c02c0544 ee005478 ee1676c0
      9ec0: c0769a88 ee3a4e80 c0760ce8 c02c150c c0669b90 c0769a88 c0746cd8 c0769a88
      9ee0: c0746cd8 ee2bc4c0 c0778c00 c02c24e0 00000000 c0746cd8 c0746cd8 c07091f0
      9f00: 00000000 c0008944 c04f405c 00000025 ee00b000 60000153 c074ab00 00000000
      9f20: 00000000 c074ab90 60000153 00000000 ef7fca5d c050860c 000000b6 c0036b88
      9f40: c065ecc4 c06bc728 00000006 00000006 c074ab30 ef7fca40 c0739bdc 00000006
      9f60: c0718dbc c0778c00 000000b6 c0718dc8 c06ed598 c06edd64 00000006 00000006
      9f80: c06ed598 c003b438 00000000 c04e64f4 00000000 00000000 00000000 00000000
      9fa0: 00000000 c04e64fc 00000000 c000e838 00000000 00000000 00000000 00000000
      9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 c0c0c0c0 c0c0c0c0
      [<c03eef38>] (__clk_put) from [<c03f0ec8>] (of_clk_set_defaults+0xe0/0x2c0)
      [<c03f0ec8>] (of_clk_set_defaults) from [<c02c3124>] (platform_drv_probe+0x18/0xa4)
      [<c02c3124>] (platform_drv_probe) from [<c02c1d0c>] (driver_probe_device+0x10c/0x22c)
      [<c02c1d0c>] (driver_probe_device) from [<c02c1eb8>] (__driver_attach+0x8c/0x90)
      [<c02c1eb8>] (__driver_attach) from [<c02c0544>] (bus_for_each_dev+0x54/0x88)
      [<c02c0544>] (bus_for_each_dev) from [<c02c150c>] (bus_add_driver+0xd4/0x1d0)
      [<c02c150c>] (bus_add_driver) from [<c02c24e0>] (driver_register+0x78/0xf4)
      [<c02c24e0>] (driver_register) from [<c07091f0>] (fimc_md_init+0x14/0x30)
      [<c07091f0>] (fimc_md_init) from [<c0008944>] (do_one_initcall+0x80/0x1d0)
      [<c0008944>] (do_one_initcall) from [<c06edd64>] (kernel_init_freeable+0x108/0x1d4)
      [<c06edd64>] (kernel_init_freeable) from [<c04e64fc>] (kernel_init+0x8/0xec)
      [<c04e64fc>] (kernel_init) from [<c000e838>] (ret_from_fork+0x14/0x3c)
      Code: ebfff4ae e5943014 e5942018 e3530000 (e5823000)
      
      Let's create a per-user handle here so that clk_put() can
      properly unlink it and free the handle. Now that we allocate a
      clk structure here we need to free it if __clk_get() fails so
      bury the __clk_get() call in __of_clk_get_from_provider(). We
      need to handle the same problem in clk_get_sys() so export
      __clk_free_clk() to clkdev.c and do the same thing, except let's
      use a union to make this code #ifdef free.
      
      This fixes the above crash, properly calls __clk_get() when
      of_clk_get_from_provider() is called, and cleans up the clk
      structure on the error path of clk_get_sys().
      
      Fixes: 035a61c3 "clk: Make clk API return per-user struct clk instances"
      Reported-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
      Reported-by: default avatarAlban Browaeys <alban.browaeys@gmail.com>
      Tested-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
      Tested-by: default avatarAlban Browaeys <prahal@yahoo.com>
      Reviewed-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      73e0e496
  3. 04 Feb, 2015 1 commit
  4. 03 Feb, 2015 2 commits
    • Stefan Wahren's avatar
      clk: mxs: Fix invalid 32-bit access to frac registers · 039e5970
      Stefan Wahren authored
      According to i.MX23 and i.MX28 reference manual [1],[2] the fractional
      clock control register is 32-bit wide, but is separated in 4 parts.
      So write instructions must not apply to more than 1 part at once.
      
      The clk init for the i.MX28 violates this restriction and all the other
      accesses on that register suggest that there isn't such a restriction.
      
      This patch restricts the access to this register to byte instructions and
      extends the comment in the init functions.
      
      Btw the imx23 init now uses a R-M-W sequence just like imx28 init
      to avoid any clock glitches.
      
      The changes has been tested with a i.MX23 and a i.MX28 board.
      
      [1] - http://cache.freescale.com/files/dsp/doc/ref_manual/IMX23RM.pdf
      [2] - http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdfSigned-off-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Reviewed-by: default avatarMarek Vasut <marex@denx.de>
      Reviewed-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      039e5970
    • Arnd Bergmann's avatar
      clk: omap: compile legacy omap3 clocks conditionally · 6793a30a
      Arnd Bergmann authored
      The 'ARM: OMAP3: legacy clock data move under clk driver' patch series
      causes build errors when CONFIG_OMAP3 is not set:
      
      drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll':
      drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function)
        const struct clk_ops *ops = &omap3_dpll_ck_ops;
                                     ^
      drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in
      drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function)
         ops = &omap3_dpll_per_ck_ops;
                ^
      
      drivers/built-in.o: In function `ti_clk_register_gate':
      drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_omap3430es2_dss_usbhost_wait'
      drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_am35xx_ipss_module_wait'
      -in.o: In function `ti_clk_register_interface':
      drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_hsotgusb_wait'
      drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_dss_usbhost_wait'
      drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_ssi_wait'
      drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_am35xx_ipss_wait'
      drivers/built-in.o: In function `ti_clk_register_composite':
      :(.text+0x3da768): undefined reference to `ti_clk_build_component_gate'
      
      In order to fix that problem, this patch makes the omap3 legacy code
      compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Acked-by: default avatarTony Lindgren <tony@atomide.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
      6793a30a
  5. 02 Feb, 2015 19 commits
  6. 01 Feb, 2015 5 commits
    • Linus Torvalds's avatar
      Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc · fba7e994
      Linus Torvalds authored
      Pull ARM SoC fixes from Olof Johansson:
       "One more week's worth of fixes.  Worth pointing out here are:
      
         - A patch fixing detaching of iommu registrations when a device is
           removed -- earlier the ops pointer wasn't managed properly
         - Another set of Renesas boards get the same GIC setup fixup as
           others have in previous -rcs
         - Serial port aliases fixups for sunxi.  We did the same to tegra but
           we caught that in time before the merge window due to more machines
           being affected.  Here it took longer for anyone to notice.
         - A couple more DT tweaks on sunxi
         - A follow-up patch for the mvebu coherency disabling in last -rc
           batch"
      
      * tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
        arm: dma-mapping: Set DMA IOMMU ops in arm_iommu_attach_device()
        ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
        ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
        ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled
        ARM: sunxi: dt: Fix aliases
        ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipeline
        ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 alias
        ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5i
      fba7e994
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input · 3441456b
      Linus Torvalds authored
      Pull input layer updates from Dmitry Torokhov:
       "Just a few quirks for PS/2 this time"
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
        Input: elantech - add more Fujtisu notebooks to force crc_enabled
        Input: i8042 - add noloop quirk for Medion Akoya E7225 (MD98857)
        Input: synaptics - adjust min/max for Lenovo ThinkPad X1 Carbon 2nd
      3441456b
    • Linus Torvalds's avatar
      sched: don't cause task state changes in nested sleep debugging · 00845eb9
      Linus Torvalds authored
      Commit 8eb23b9f ("sched: Debug nested sleeps") added code to report
      on nested sleep conditions, which we generally want to avoid because the
      inner sleeping operation can re-set the thread state to TASK_RUNNING,
      but that will then cause the outer sleep loop not actually sleep when it
      calls schedule.
      
      However, that's actually valid traditional behavior, with the inner
      sleep being some fairly rare case (like taking a sleeping lock that
      normally doesn't actually need to sleep).
      
      And the debug code would actually change the state of the task to
      TASK_RUNNING internally, which makes that kind of traditional and
      working code not work at all, because now the nested sleep doesn't just
      sometimes cause the outer one to not block, but will cause it to happen
      every time.
      
      In particular, it will cause the cardbus kernel daemon (pccardd) to
      basically busy-loop doing scheduling, converting a laptop into a heater,
      as reported by Bruno Prémont.  But there may be other legacy uses of
      that nested sleep model in other drivers that are also likely to never
      get converted to the new model.
      
      This fixes both cases:
      
       - don't set TASK_RUNNING when the nested condition happens (note: even
         if WARN_ONCE() only _warns_ once, the return value isn't whether the
         warning happened, but whether the condition for the warning was true.
         So despite the warning only happening once, the "if (WARN_ON(..))"
         would trigger for every nested sleep.
      
       - in the cases where we knowingly disable the warning by using
         "sched_annotate_sleep()", don't change the task state (that is used
         for all core scheduling decisions), instead use '->task_state_change'
         that is used for the debugging decision itself.
      
      (Credit for the second part of the fix goes to Oleg Nesterov: "Can't we
      avoid this subtle change in behaviour DEBUG_ATOMIC_SLEEP adds?" with the
      suggested change to use 'task_state_change' as part of the test)
      Reported-and-bisected-by: default avatarBruno Prémont <bonbons@linux-vserver.org>
      Tested-by: default avatarRafael J Wysocki <rjw@rjwysocki.net>
      Acked-by: default avatarOleg Nesterov <oleg@redhat.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>,
      Cc: Ilya Dryomov <ilya.dryomov@inktank.com>,
      Cc: Mike Galbraith <umgwanakikbuti@gmail.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Peter Hurley <peter@hurleysoftware.com>,
      Cc: Davidlohr Bueso <dave@stgolabs.net>,
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      00845eb9
    • Rainer Koenig's avatar
      Input: elantech - add more Fujtisu notebooks to force crc_enabled · 47c1ffb2
      Rainer Koenig authored
      Add two more Fujitsu LIFEBOOK models that also ship with the Elantech
      touchpad and don't work with crc_disabled to the quirk list.
      Signed-off-by: default avatarRainer Koenig <Rainer.Koenig@ts.fujitsu.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarDmitry Torokhov <dmitry.torokhov@gmail.com>
      47c1ffb2
    • Olof Johansson's avatar
      Merge tag 'renesas-soc-fixes3-for-v3.19' of... · 28111dda
      Olof Johansson authored
      Merge tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
      
      Merge "Third Round of Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:
      
      * Instantiate GIC from C board code in legacy builds on r8a7790 and r8a73a4
      
      * tag 'renesas-soc-fixes3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
        ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
        ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      28111dda
  7. 31 Jan, 2015 4 commits
  8. 30 Jan, 2015 2 commits