- 11 Mar, 2020 14 commits
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Angus Ainslie (Purism) authored
Without a VBUS supply the dwc3 driver won't go into otg mode. Fixes: eb4ea085 ("arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit") Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Rabeeh Khoury authored
This patch adds 4 eeprom support on i2c mux channel #0 - 1. Bootable 512Kbit eeprom at address 0x50. 2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53. 3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing data. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Russell King authored
Add support for the LTC3882 regulator so that the hardware monitoring can be used with this device. This regulator provides the 0.78V supply for the LX2160A. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Add src node to support i.MX8MP reset controller. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Node name should be generic, use "pinctrl" instead of "iomuxc" for all i.MX8M SoCs. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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André Draszik authored
On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844e ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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André Draszik authored
On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844e ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Horia Geantă authored
Add node for CAAM - Cryptographic Acceleration and Assurance Module. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Add i.MX8QXP CPU thermal zone support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Since commit b9213899d2b0 ("arm64: dts: ls1028a: disable all enetc ports by default") all the network ports are disabled by default. This makes sense, but now we have to enable them explicitly in the boards. Do so for the sl28 module. Since we are at it. Make sure the second port is only enabled for the variant 4 of the module. Variant 3 has only one network port. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Claudiu Manoil authored
Link the switch PHY nodes to the central MDIO controller PCIe endpoint node on LS1028A (implemented as PF3) so that PHYs are accessible via MDIO. Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514 quad PHY is capable of in-band-status. The PHYs are used in poll mode due to an issue with the interrupt line on current revisions of the LS1028A-RDB board. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Claudiu Manoil authored
Add the switch device node, available on PF5, so that the switch port sub-nodes (net devices) can be linked to corresponding board specific phy nodes (external ports) or have their link mode defined (internal ports). The switch device features 6 ports, 4 with external links and 2 internally facing to the LS1028A SoC and connected via fixed links to 2 internal ENETC Ethernet controller ports. Add the corresponding ENETC host port device nodes, mapped to PF2 and PF6 PCIe functions. Since the switch only supports tagging on one CPU port, only one port pair (swp4, eno2) is enabled by default and the other, lower speed, port pair is disabled to prevent the PCI core from probing them. If enabled, swp5 will be a fixed-link slave port. DSA tagging can also be moved from the swp4-eno2 2.5G port pair to the 1G swp5-eno3 pair by changing the ethernet = <&enetc_port2> phandle to <&enetc_port3> and moving it under port5, but in that case enetc_port2 should not be disabled, because it is the hardware owner of the Felix PCS and disabling its memory would result in access faults in the Felix DSA driver. All ports are disabled by default, including the CPU port, and need to be enabled on a per-board basis. The phy-mode binding of the internal ENETC ports was modified from "gmii" to "internal" to match the phy-mode of the internal-facing switch ports connected to them. The ENETC driver does not perform any phy_mode validation anyway, so the change is only cosmetic. Also, enetc_port2 is defined as a fixed-link 1000 Mbps port even though it is 2500 Mbps (as can be seen by the fact that it is connected to mscc_felix_port4). The fact that it is currently defined as 1000 Mbps is an artifact of its PHYLIB implementation instead of PHYLINK (the former can't describe a fixed-link speed higher than what swphy can emulate from the Clause 22 MDIO spec). The switch's INTB interrupt line signals: - PTP TX timestamp availability - TSN Frame Preemption And don't forget to enable the 4MB BAR4 in the root complex ECAM space, where the switch registers are mapped. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Vladimir Oltean authored
There are few boards that enable all ENETC ports, so instead of having board DTs disable them, do so in the DTSI and have the boards enable the ports they use. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Vladimir Oltean authored
This specifier overrides the interrupt specifier with 3 cells from gic (/interrupt-controller@6000000), but in fact ENETC is not an interrupt controller, so the property is bogus. Interrupts used by the children of the ENETC RCIE must use the full 3-cell specifier required by the GIC. The issue has no functional consequence so there is no real reason to port the patch to stable trees. Fixes: 927d7f85 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 24 Feb, 2020 6 commits
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Anson Huang authored
According to latest datasheet Rev.0, 10/2019, there is restriction as below: "If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V." As by default SoC is running at OD mode(VDD_SOC = 0.95V), so VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
System counter timer is necessary as broadcast timer for cpu-idle, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
i.MX8MP EVK board has a GPIO LED to indicate status, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alifer Moraes authored
imx8mq-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin. Describe it in the device tree, following phy's datasheet reset duration of 10ms. Tested booting via NFS. Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alifer Moraes authored
imx8mm-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin. Describe it in the device tree, following phy's datasheet reset duration of 10ms. Tested booting via NFS. Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Hou Zhiqiang authored
The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 19 Feb, 2020 1 commit
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Michael Walle authored
The LS1028A has three (dual) SPI controller. These are compatible with the ones from the LS1021A. Add the nodes. The third controller was tested on a custom board. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 17 Feb, 2020 4 commits
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Alifer Moraes authored
Add support for ethernet on Google's i.MX 8MQ Phanbell Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Tested-by: Vitor Massaru Iha <vitor@massaru.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Add basic i.MM8MP EVK board support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
The i.MX8M Plus Media Applications Processor is part of the growing mScale family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in Samsung 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core ARM Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Add the basic dtsi support for i.MX8MP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Yangbo Lu authored
There is an external trigger timestamp fifo for PTP timer of LS1028A. Add property fsl,extts-fifo for that. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 14 Feb, 2020 3 commits
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Yangbo Lu authored
This patch is to add eMMC HS200 speed mode support on ls1088ardb whose controller and peripheral circut support such capability. And clocks dts property is needed for driver to get peripheral clock value used for this speed mode. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
Support for the vcnl4040 landet a while ago so add it and the corresponding pinmux. The irq is currently unused in the driver so don't configure it yet. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
There is interrupt-parent = <&gic> in root node, there is no need set it again in node ddr-pmu@3d800000. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 13 Feb, 2020 6 commits
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Peng Fan authored
Per devicetree specification, generic names are recommended to be used, such as bus. AIPS is a AHB - IP bridge bus, so we could use bus as node name. Script: sed -i "s/\<aips@/bus@/" arch/arm64/boot/dts/freescale/*.dtsi sed -i "s/\<aips-bus@/bus@/" arch/arm64/boot/freescale/*.dtsi Cc: Phu Luu An <phu.luuan@nxp.com> Cc: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Cc: Mihaela Martinas <Mihaela.Martinas@freescale.com> Cc: Dan Nica <dan.nica@nxp.com> Cc: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Add the initial configuration for clocks that need default parent and rate setting. NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs to run at 400MHz for better performance. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Add device tree files for the Kontron SMARC-sAL28 board and its carriers. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Horia Geantă authored
Initial commit adding imx8mn support: 6c3debcb ("arm64: dts: freescale: Add i.MX8MN dtsi support") added the "clock-names" property for the snvs rtc node, however it missed adding the clock. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Horia Geantă authored
i.mx8mn has support for clock gating the snvs module. Add it into clock tree so that rtc-snvs driver could use it. Note this will also be required in the snvs_pwrkey driver, once support for clock management will be added. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Horia Geantă authored
Add macro for the SNVS clock of the i.MX8MN. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 10 Feb, 2020 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuildLinus Torvalds authored
Pull more Kbuild updates from Masahiro Yamada: - fix randconfig to generate a sane .config - rename hostprogs-y / always to hostprogs / always-y, which are more natual syntax. - optimize scripts/kallsyms - fix yes2modconfig and mod2yesconfig - make multiple directory targets ('make foo/ bar/') work * tag 'kbuild-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kbuild: make multiple directory targets work kconfig: Invalidate all symbols after changing to y or m. kallsyms: fix type of kallsyms_token_table[] scripts/kallsyms: change table to store (strcut sym_entry *) scripts/kallsyms: rename local variables in read_symbol() kbuild: rename hostprogs-y/always to hostprogs/always-y kbuild: fix the document to use extra-y for vmlinux.lds kconfig: fix broken dependency in randconfig-generated .config
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- 09 Feb, 2020 4 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefsLinus Torvalds authored
Pull new zonefs file system from Damien Le Moal: "Zonefs is a very simple file system exposing each zone of a zoned block device as a file. Unlike a regular file system with native zoned block device support (e.g. f2fs or the on-going btrfs effort), zonefs does not hide the sequential write constraint of zoned block devices to the user. As a result, zonefs is not a POSIX compliant file system. Its goal is to simplify the implementation of zoned block devices support in applications by replacing raw block device file accesses with a richer file based API, avoiding relying on direct block device file ioctls which may be more obscure to developers. One example of this approach is the implementation of LSM (log-structured merge) tree structures (such as used in RocksDB and LevelDB) on zoned block devices by allowing SSTables to be stored in a zone file similarly to a regular file system rather than as a range of sectors of a zoned device. The introduction of the higher level construct "one file is one zone" can help reducing the amount of changes needed in the application while at the same time allowing the use of zoned block devices with various programming languages other than C. Zonefs IO management implementation uses the new iomap generic code. Zonefs has been successfully tested using a functional test suite (available with zonefs userland format tool on github) and a prototype implementation of LevelDB on top of zonefs" * tag 'zonefs-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefs: zonefs: Add documentation fs: New zonefs file system
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Marc Zyngier authored
In order to allow the GICv4 code to link properly on 32bit ARM, make sure we don't use 64bit divisions when it isn't strictly necessary. Fixes: 4e6437f1 ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.samba.org/sfrench/cifs-2.6Linus Torvalds authored
Pull cifs fixes from Steve French: "13 cifs/smb3 patches, most from testing at the SMB3 plugfest this week: - Important fix for multichannel and for modefromsid mounts. - Two reconnect fixes - Addition of SMB3 change notify support - Backup tools fix - A few additional minor debug improvements (tracepoints and additional logging found useful during testing this week)" * tag '5.6-rc-smb3-plugfest-patches' of git://git.samba.org/sfrench/cifs-2.6: smb3: Add defines for new information level, FileIdInformation smb3: print warning once if posix context returned on open smb3: add one more dynamic tracepoint missing from strict fsync path cifs: fix mode bits from dir listing when mounted with modefromsid cifs: fix channel signing cifs: add SMB3 change notification support cifs: make multichannel warning more visible cifs: fix soft mounts hanging in the reconnect code cifs: Add tracepoints for errors on flush or fsync cifs: log warning message (once) if out of disk space cifs: fail i/o on soft mounts if sessionsetup errors out smb3: fix problem with null cifs super block with previous patch SMB3: Backup intent flag missing from some more ops
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds authored
Pull vboxfs from Al Viro: "This is the VirtualBox guest shared folder support by Hans de Goede, with fixups for fs_parse folded in to avoid bisection hazards from those API changes..." * 'work.vboxsf' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: fs: Add VirtualBox guest shared folder (vboxsf) support
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