- 10 Mar, 2016 40 commits
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Jes Sorensen authored
Support for setting bandwidth and VHT parameters is still missing Signed-off-by:
Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by:
Kalle Valo <kvalo@codeaurora.org>
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Jes Sorensen authored
Define H2C command structure for setting the rate mask. Signed-off-by:
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Jes Sorensen authored
C2H events are delivered as RX packets on 8723bu/8192eu. When receiving a C2H event, do not parse the rest of the RX descriptor as the info isn't valid. Signed-off-by:
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Jes Sorensen authored
Further correct the handling of 40 byte TX descriptors. Signed-off-by:
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Jes Sorensen authored
Correct the setting of TX RTS for 8723a generation chips. In addition update documentation to match that this is part of data word 4, note data word 5. Signed-off-by:
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Jes Sorensen authored
TX data words 4 and 5 differ significantly between 32 byte and 40 byte descriptors. Signed-off-by:
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Jes Sorensen authored
SEQ changed location in the 40 byte TX descriptor. Set it correctly. Signed-off-by:
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Jes Sorensen authored
Fixup victim of the relocated bits for AGG_ENABLE/AGG_BREAK in the 40 byte TX descriptor Signed-off-by:
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Jes Sorensen authored
Add additional bit definitions for 40 byte TX descriptors, and rename bits for 32 byte descriptors that are located differently in the 40 byte descriptor format. Signed-off-by:
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Jes Sorensen authored
This adds documentation for some additional bits in TX descriptor word 0. Signed-off-by:
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Jes Sorensen authored
Reduce the log level in rtl8723bu_handle_c2h() Signed-off-by:
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Jes Sorensen authored
Note the descriptor checksum is still only calculated over the initial 32 bytes of the descriptor, ignoring the last 8 bytes of the descriptor. Signed-off-by:
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Jes Sorensen authored
Newer generation chips use a 40 byte TX descriptor, compared to the 32 byte descriptor used on older chips. This adds the definition for the 40 byte descriptor. Signed-off-by:
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Jes Sorensen authored
Older chips use RF register 0x24 to set the thermal meter. Newer chips use register 0x42. This change makes sure to set the correct thermal meter register depending on the chip. Signed-off-by:
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Jes Sorensen authored
This adds the missing support for setting MCS TX power rates on 8723bu. Signed-off-by:
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Jes Sorensen authored
This implements support for setting TX power for CCK and OFDM rates on 8723bu. MCS rates is still pending. Signed-off-by:
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Jes Sorensen authored
This should (hopefully) parse the power indices correctly for the 8723bu. Signed-off-by:
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Jes Sorensen authored
Newer generation chips have more channels groups. In order to carry the larger arrays in common structures, bump the array sizes to match. Signed-off-by:
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Jes Sorensen authored
Some newer chips have more channel groups in their efuse parameter tables, so use the size of the source, rather than the destination when copying them out. This avoids copying garbage when increasing the common array sizes. Signed-off-by:
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Jes Sorensen authored
The 8723b series is significantly different from the older generation in this sense. So far the 8723b version doesn't do anything useful. Signed-off-by:
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Jes Sorensen authored
Correct TX power definitions in rtl8723bu_efuse Signed-off-by:
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Jes Sorensen authored
These settings simply block the 8723bu, for now leave an empty function. With this change we can finally communicate with aliens using the 8723bu! Signed-off-by:
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Jes Sorensen authored
Use the same values as the vendor driver when setting up the BTCOEX table for 8723bu. Signed-off-by:
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Jes Sorensen authored
Another case where we should use the register name rather than the hard coded value when accessing it. Signed-off-by:
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Jes Sorensen authored
Register 0x0944 is REG_RFE_BUFFER. Use the name rather than hard coded value when accessing it. Signed-off-by:
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Jes Sorensen authored
The BT_COEX_TABLE register list contains 3 32 bit registers and one 8 bit register. Hence, use rtl8xxxu_write8() when writing the 8 bit register. Signed-off-by:
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Jes Sorensen authored
The initial code set the wrong setting in WLAN_ACT_CONTROL for the 8723bu. Signed-off-by:
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Jes Sorensen authored
Provide RF_T_METER register location for nextgen chips. Signed-off-by:
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Jes Sorensen authored
Vendor driver implements this for 8723b and 8821 series Signed-off-by:
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Jes Sorensen authored
Keep the automated tools happy Signed-off-by:
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Jes Sorensen authored
This initializes RX DMA aggregation on 8723bu. We should do this for all parts eventually, and also init TX aggregation. Signed-off-by:
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Jes Sorensen authored
Group chip quirks together instead of having them scattered all over in the init code. Signed-off-by:
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Jes Sorensen authored
List yet another new register found on the 8723b. Signed-off-by:
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Jes Sorensen authored
Set PHY lock after running the RF init sequence on 8723bu. Signed-off-by:
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Jes Sorensen authored
Having a version for the newer chips without calling it doesn't do much good..... Signed-off-by:
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Jes Sorensen authored
Implement burst parameter sequence for 8723bu parts. Eventually this should be moved into device specific sections. Signed-off-by:
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Jes Sorensen authored
Set the correct TRXFF boundary for 8723bu. Signed-off-by:
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Jes Sorensen authored
The vendor driver does not set FPGA0_TX_INFO here. In additiona the 8723bu can handler a larger PBP page size. Signed-off-by:
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Jes Sorensen authored
Reorganize the init sequence in order to be able to compare to the 8723bu vendor driver's init sequence. Signed-off-by:
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Jes Sorensen authored
Only apply the 80M spur hack for 8723au parts. Signed-off-by:
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