Device tree configuration for the I2C busses on the AST24XX and AST25XX SoCs.

Required Properties:
- #address-cells	: should be 1
- #size-cells		: should be 0
- reg			: address offset and range of bus
- compatible		: should be "aspeed,ast2400-i2c-bus"
			  or "aspeed,ast2500-i2c-bus"
- clocks		: root clock of bus, should reference the APB
			  clock in the second cell
- resets		: phandle to reset controller with the reset number in
			  the second cell
- interrupts		: interrupt number

Optional Properties:
- bus-frequency	: frequency of the bus clock in Hz defaults to 100 kHz when not
		  specified
- multi-master	: states that there is another master active on this bus.

Example:

i2c {
	compatible = "simple-bus";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0 0x1e78a000 0x1000>;

	i2c_ic: interrupt-controller@0 {
		#interrupt-cells = <1>;
		compatible = "aspeed,ast2400-i2c-ic";
		reg = <0x0 0x40>;
		interrupts = <12>;
		interrupt-controller;
	};

	i2c0: i2c-bus@40 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;
		reg = <0x40 0x40>;
		compatible = "aspeed,ast2400-i2c-bus";
		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
		bus-frequency = <100000>;
		interrupts = <0>;
		interrupt-parent = <&i2c_ic>;
	};
};
