• Ville Syrjälä's avatar
    drm/i915: Split the gamma/csc enable bits from the plane_ctl() function · 7eb31a0b
    Ville Syrjälä authored
    On g4x+ the pipe gamma enable bit for the primary plane affects
    the pipe bottom color as well. The same for the pipe csc enable
    bit on ilk+. Thus we must configure those bits correctly even
    when the primary plane is disabled.
    
    To make the feasible let's split those settings from the
    plane_ctl() function into a seprate funciton that we can
    call from the ->disable_plane() hook as well.
    
    For consistency we'll do that on all the plane types. While
    that has no real benefits at this time, it'll become useful
    when we start to control the pipe gamma/csc enable bits
    dynamically when we overhaul the color management code.
    
    On pre-g4x there doesn't appear to be any way to gamma
    correct the pipe bottom color, but sticking to the same
    pattern doesn't hurt. And it'll still help us to do
    crtc state readout correctly for the pipe gamma enable
    bit for the color management overhaul.
    
    An alternative apporach would be to still precompute these
    bits into plane_state->ctl, but that would require that we
    run through the plane check even when the plane isn't logically
    enabled on any crtc. Currently that condition causes us to
    short circuit the entire thing and not call ->check_plane().
    There would also be some chicken and egg problems with
    ->check_plane() vs. crtc color state check that would
    requite splitting certain things into multiple steps.
    So all in all this seems like the easier route.
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190205160848.24662-2-ville.syrjala@linux.intel.comReviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
    7eb31a0b
intel_display.c 465 KB