• James Jones's avatar
    drm: Generalized NV Block Linear DRM format mod · 82c8c4dd
    James Jones authored
    Builds upon the existing NVIDIA 16Bx2 block linear
    format modifiers by adding more "fields" to the
    existing parameterized
    DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifier
    macro that allow fully defining a unique-across-
    all-NVIDIA-hardware bit layout using a minimal
    set of fields and values.  The new modifier macro
    DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D is
    effectively backwards compatible with the existing
    macro, introducing a superset of the previously
    definable format modifiers.
    
    Backwards compatibility has two quirks.  First,
    the zero value for the "kind" field, which is
    implied by the DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK
    macro, must be special cased in drivers and
    assumed to map to the pre-Turing generic kind of
    0xfe, since a kind of "zero" is reserved for
    linear buffer layouts on all GPUs.
    
    Second, it is assumed backwards compatibility
    is only needed when running on Tegra GPUs, and
    specifically Tegra GPUs prior to Xavier.  This
    is based on two assertions:
    
    -Tegra GPUs prior to Xavier used a slightly
     different raw bit layout than desktop GPUs,
     making it impossible to directly share block
     linear buffers between the two.
    
    -Support for the existing block linear modifiers
     was incomplete, making them useful only for
     exporting buffers created by nouveau and
     importing them to Tegra DRM as framebuffers for
     scan out.  There was no support for adding
     framebuffers using format modifiers in nouveau,
     nor importing dma-buf/PRIME GEM objects into
     nouveau userspace drivers with modifiers in Mesa.
    
    Hence it is assumed the prior modifiers were not
    intended for use on desktop GPUs, and as a
    corollary, were not intended to support sharing
    block linear buffers across two different NVIDIA
    GPUs.
    
    v2:
      - Added canonicalize helper function
    
    v3:
      - Added additional bit to compression field to
        support Tesla (NV5x,G8x,G9x,GT1xx,GT2xx) class
        chips.
    Signed-off-by: default avatarJames Jones <jajones@nvidia.com>
    Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
    82c8c4dd
drm_fourcc.h 39.1 KB