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Commit 05462310 authored by Michael Holzheu's avatar Michael Holzheu Committed by Martin Schwidefsky
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s390/bpf: Add s390x eBPF JIT compiler backend 

Replace 32 bit BPF JIT backend with new 64 bit eBPF backend.
Signed-off-by: default avatarMichael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
parent 1c6e4b18
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Showing with 1234 additions and 803 deletions
arch/s390/Kconfig
View file @ 05462310
...@@ -115,7 +115,7 @@ config S390 ...@@ -115,7 +115,7 @@ config S390
select HAVE_ARCH_SECCOMP_FILTER select HAVE_ARCH_SECCOMP_FILTER
select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_TRANSPARENT_HUGEPAGE select HAVE_ARCH_TRANSPARENT_HUGEPAGE
select HAVE_BPF_JIT if PACK_STACK select HAVE_BPF_JIT if PACK_STACK && HAVE_MARCH_Z9_109_FEATURES
select HAVE_CMPXCHG_DOUBLE select HAVE_CMPXCHG_DOUBLE
select HAVE_CMPXCHG_LOCAL select HAVE_CMPXCHG_LOCAL
select HAVE_DEBUG_KMEMLEAK select HAVE_DEBUG_KMEMLEAK
......
arch/s390/net/bpf_jit.S
View file @ 05462310
/* /*
* BPF Jit compiler for s390, help functions. * BPF Jit compiler for s390, help functions.
* *
* Copyright IBM Corp. 2012 * Copyright IBM Corp. 2012,2015
* *
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
* Michael Holzheu <holzheu@linux.vnet.ibm.com>
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include "bpf_jit.h"
/* /*
* Calling convention: * Calling convention:
* registers %r2, %r6-%r8, %r10-%r11, %r13, %r15 are call saved * registers %r7-%r10, %r11,%r13, and %r15 are call saved
* %r2: skb pointer *
* %r3: offset parameter * Input (64 bit):
* %r5: BPF A accumulator * %r3 (%b2) = offset into skb data
* %r8: return address * %r6 (%b5) = return address
* %r9: save register for skb pointer * %r7 (%b6) = skb pointer
* %r10: skb->data * %r12 = skb data pointer
* %r11: skb->len - skb->data_len (headlen) *
* %r12: BPF X accumulator * Output:
* %r14= %b0 = return value (read skb value)
*
* Work registers: %r2,%r4,%r5,%r14
* *
* skb_copy_bits takes 4 parameters: * skb_copy_bits takes 4 parameters:
* %r2 = skb pointer * %r2 = skb pointer
* %r3 = offset into skb data * %r3 = offset into skb data
* %r4 = pointer to temp buffer * %r4 = pointer to temp buffer
* %r5 = length to copy * %r5 = length to copy
* Return value in %r2: 0 = ok
*
* bpf_internal_load_pointer_neg_helper takes 3 parameters:
* %r2 = skb pointer
* %r3 = offset into data
* %r4 = length to copy
* Return value in %r2: Pointer to data
*/ */
#define SKBDATA %r8
/* A = *(u32 *) (skb->data+K+X) */
ENTRY(sk_load_word_ind)
ar %r3,%r12 # offset += X
bmr %r8 # < 0 -> return with cc
/* A = *(u32 *) (skb->data+K) */
ENTRY(sk_load_word)
llgfr %r1,%r3 # extend offset
ahi %r3,4 # offset + 4
clr %r11,%r3 # hlen <= offset + 4 ?
jl sk_load_word_slow
l %r5,0(%r1,%r10) # get word from skb
xr %r1,%r1 # set cc to zero
br %r8
sk_load_word_slow: #define SKF_MAX_NEG_OFF -0x200000 /* SKF_LL_OFF from filter.h */
lgr %r9,%r2 # save %r2
lgr %r3,%r1 # offset
la %r4,160(%r15) # pointer to temp buffer
lghi %r5,4 # 4 bytes
brasl %r14,skb_copy_bits # get data from skb
l %r5,160(%r15) # load result from temp buffer
ltgr %r2,%r2 # set cc to (%r2 != 0)
lgr %r2,%r9 # restore %r2
br %r8
/* A = *(u16 *) (skb->data+K+X) */ /*
ENTRY(sk_load_half_ind) * Load SIZE bytes from SKB
ar %r3,%r12 # offset += X */
bmr %r8 # < 0 -> return with cc #define sk_load_common(NAME, SIZE, LOAD) \
ENTRY(sk_load_##NAME); \
/* A = *(u16 *) (skb->data+K) */ ltgr %r3,%r3; /* Is offset negative? */ \
ENTRY(sk_load_half) jl sk_load_##NAME##_slow_neg; \
llgfr %r1,%r3 # extend offset ENTRY(sk_load_##NAME##_pos); \
ahi %r3,2 # offset + 2 aghi %r3,SIZE; /* Offset + SIZE */ \
clr %r11,%r3 # hlen <= offset + 2 ? clg %r3,STK_OFF_HLEN(%r15); /* Offset + SIZE > hlen? */ \
jl sk_load_half_slow jh sk_load_##NAME##_slow; \
llgh %r5,0(%r1,%r10) # get half from skb LOAD %r14,-SIZE(%r3,%r12); /* Get data from skb */ \
xr %r1,%r1 # set cc to zero b OFF_OK(%r6); /* Return */ \
br %r8 \
sk_load_##NAME##_slow:; \
sk_load_half_slow: lgr %r2,%r7; /* Arg1 = skb pointer */ \
lgr %r9,%r2 # save %r2 aghi %r3,-SIZE; /* Arg2 = offset */ \
lgr %r3,%r1 # offset la %r4,STK_OFF_TMP(%r15); /* Arg3 = temp bufffer */ \
la %r4,162(%r15) # pointer to temp buffer lghi %r5,SIZE; /* Arg4 = size */ \
lghi %r5,2 # 2 bytes brasl %r14,skb_copy_bits; /* Get data from skb */ \
brasl %r14,skb_copy_bits # get data from skb LOAD %r14,STK_OFF_TMP(%r15); /* Load from temp bufffer */ \
xc 160(2,%r15),160(%r15) ltgr %r2,%r2; /* Set cc to (%r2 != 0) */ \
l %r5,160(%r15) # load result from temp buffer br %r6; /* Return */
ltgr %r2,%r2 # set cc to (%r2 != 0)
lgr %r2,%r9 # restore %r2
br %r8
/* A = *(u8 *) (skb->data+K+X) */ sk_load_common(word, 4, llgf) /* r14 = *(u32 *) (skb->data+offset) */
ENTRY(sk_load_byte_ind) sk_load_common(half, 2, llgh) /* r14 = *(u16 *) (skb->data+offset) */
ar %r3,%r12 # offset += X
bmr %r8 # < 0 -> return with cc
/* A = *(u8 *) (skb->data+K) */ /*
* Load 1 byte from SKB (optimized version)
*/
/* r14 = *(u8 *) (skb->data+offset) */
ENTRY(sk_load_byte) ENTRY(sk_load_byte)
llgfr %r1,%r3 # extend offset ltgr %r3,%r3 # Is offset negative?
clr %r11,%r3 # hlen < offset ? jl sk_load_byte_slow_neg
jle sk_load_byte_slow ENTRY(sk_load_byte_pos)
lhi %r5,0 clg %r3,STK_OFF_HLEN(%r15) # Offset >= hlen?
ic %r5,0(%r1,%r10) # get byte from skb jnl sk_load_byte_slow
xr %r1,%r1 # set cc to zero llgc %r14,0(%r3,%r12) # Get byte from skb
br %r8 b OFF_OK(%r6) # Return OK
sk_load_byte_slow: sk_load_byte_slow:
lgr %r9,%r2 # save %r2 lgr %r2,%r7 # Arg1 = skb pointer
lgr %r3,%r1 # offset # Arg2 = offset
la %r4,163(%r15) # pointer to temp buffer la %r4,STK_OFF_TMP(%r15) # Arg3 = pointer to temp buffer
lghi %r5,1 # 1 byte lghi %r5,1 # Arg4 = size (1 byte)
brasl %r14,skb_copy_bits # get data from skb brasl %r14,skb_copy_bits # Get data from skb
xc 160(3,%r15),160(%r15) llgc %r14,STK_OFF_TMP(%r15) # Load result from temp buffer
l %r5,160(%r15) # load result from temp buffer ltgr %r2,%r2 # Set cc to (%r2 != 0)
ltgr %r2,%r2 # set cc to (%r2 != 0) br %r6 # Return cc
lgr %r2,%r9 # restore %r2
br %r8 #define sk_negative_common(NAME, SIZE, LOAD) \
sk_load_##NAME##_slow_neg:; \
cgfi %r3,SKF_MAX_NEG_OFF; \
jl bpf_error; \
lgr %r2,%r7; /* Arg1 = skb pointer */ \
/* Arg2 = offset */ \
lghi %r4,SIZE; /* Arg3 = size */ \
brasl %r14,bpf_internal_load_pointer_neg_helper; \
ltgr %r2,%r2; \
jz bpf_error; \
LOAD %r14,0(%r2); /* Get data from pointer */ \
xr %r3,%r3; /* Set cc to zero */ \
br %r6; /* Return cc */
/* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */ sk_negative_common(word, 4, llgf)
ENTRY(sk_load_byte_msh) sk_negative_common(half, 2, llgh)
llgfr %r1,%r3 # extend offset sk_negative_common(byte, 1, llgc)
clr %r11,%r3 # hlen < offset ?
jle sk_load_byte_msh_slow
lhi %r12,0
ic %r12,0(%r1,%r10) # get byte from skb
nill %r12,0x0f
sll %r12,2
xr %r1,%r1 # set cc to zero
br %r8
sk_load_byte_msh_slow: bpf_error:
lgr %r9,%r2 # save %r2 # force a return 0 from jit handler
lgr %r3,%r1 # offset ltgr %r15,%r15 # Set condition code
la %r4,163(%r15) # pointer to temp buffer br %r6
lghi %r5,1 # 1 byte
brasl %r14,skb_copy_bits # get data from skb
xc 160(3,%r15),160(%r15)
l %r12,160(%r15) # load result from temp buffer
nill %r12,0x0f
sll %r12,2
ltgr %r2,%r2 # set cc to (%r2 != 0)
lgr %r2,%r9 # restore %r2
br %r8
arch/s390/net/bpf_jit.h 0 → 100644
View file @ 05462310
/*
* BPF Jit compiler defines
*
* Copyright IBM Corp. 2012,2015
*
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
* Michael Holzheu <holzheu@linux.vnet.ibm.com>
*/
#ifndef __ARCH_S390_NET_BPF_JIT_H
#define __ARCH_S390_NET_BPF_JIT_H
#ifndef __ASSEMBLY__
#include <linux/filter.h>
#include <linux/types.h>
extern u8 sk_load_word_pos[], sk_load_half_pos[], sk_load_byte_pos[];
extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
#endif /* __ASSEMBLY__ */
/*
* Stackframe layout (packed stack):
*
* ^ high
* +---------------+ |
* | old backchain | |
* +---------------+ |
* | r15 - r6 | |
* BFP -> +===============+ |
* | | |
* | BPF stack | |
* | | |
* +---------------+ |
* | 8 byte hlen | |
* R15+168 -> +---------------+ |
* | 4 byte align | |
* +---------------+ |
* | 4 byte temp | |
* | for bpf_jit.S | |
* R15+160 -> +---------------+ |
* | new backchain | |
* R15+152 -> +---------------+ |
* | + 152 byte SA | |
* R15 -> +---------------+ + low
*
* We get 160 bytes stack space from calling function, but only use
* 11 * 8 byte (old backchain + r15 - r6) for storing registers.
*/
#define STK_OFF (MAX_BPF_STACK + 8 + 4 + 4 + (160 - 11 * 8))
#define STK_OFF_TMP 160 /* Offset of tmp buffer on stack */
#define STK_OFF_HLEN 168 /* Offset of SKB header length on stack */
/* Offset to skip condition code check */
#define OFF_OK 4
#endif /* __ARCH_S390_NET_BPF_JIT_H */
arch/s390/net/bpf_jit_comp.c
View file @ 05462310
/* /*
* BPF Jit compiler for s390. * BPF Jit compiler for s390.
* *
* Copyright IBM Corp. 2012 * Minimum build requirements:
*
* - HAVE_MARCH_Z196_FEATURES: laal, laalg
* - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
* - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
* - PACK_STACK
* - 64BIT
*
* Copyright IBM Corp. 2012,2015
* *
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
* Michael Holzheu <holzheu@linux.vnet.ibm.com>
*/ */
#define KMSG_COMPONENT "bpf_jit"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/if_vlan.h>
#include <linux/filter.h> #include <linux/filter.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/facility.h>
#include <asm/dis.h> #include <asm/dis.h>
#include "bpf_jit.h"
/*
* Conventions:
* %r2 = skb pointer
* %r3 = offset parameter
* %r4 = scratch register / length parameter
* %r5 = BPF A accumulator
* %r8 = return address
* %r9 = save register for skb pointer
* %r10 = skb->data
* %r11 = skb->len - skb->data_len (headlen)
* %r12 = BPF X accumulator
* %r13 = literal pool pointer
* 0(%r15) - 63(%r15) scratch memory array with BPF_MEMWORDS
*/
int bpf_jit_enable __read_mostly; int bpf_jit_enable __read_mostly;
struct bpf_jit {
u32 seen; /* Flags to remember seen eBPF instructions */
u32 seen_reg[16]; /* Array to remember which registers are used */
u32 *addrs; /* Array with relative instruction addresses */
u8 *prg_buf; /* Start of program */
int size; /* Size of program and literal pool */
int size_prg; /* Size of program */
int prg; /* Current position in program */
int lit_start; /* Start of literal pool */
int lit; /* Current position in literal pool */
int base_ip; /* Base address for literal pool */
int ret0_ip; /* Address of return 0 */
int exit_ip; /* Address of exit */
};
#define BPF_SIZE_MAX 4096 /* Max size for program */
#define SEEN_SKB 1 /* skb access */
#define SEEN_MEM 2 /* use mem[] for temporary storage */
#define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
#define SEEN_LITERAL 8 /* code uses literals */
#define SEEN_FUNC 16 /* calls C functions */
#define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
/* /*
* assembly code in arch/x86/net/bpf_jit.S * s390 registers
*/ */
extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; #define REG_W0 (__MAX_BPF_REG+0) /* Work register 1 (even) */
extern u8 sk_load_word_ind[], sk_load_half_ind[], sk_load_byte_ind[]; #define REG_W1 (__MAX_BPF_REG+1) /* Work register 2 (odd) */
#define REG_SKB_DATA (__MAX_BPF_REG+2) /* SKB data register */
#define REG_L (__MAX_BPF_REG+3) /* Literal pool register */
#define REG_15 (__MAX_BPF_REG+4) /* Register 15 */
#define REG_0 REG_W0 /* Register 0 */
#define REG_2 BPF_REG_1 /* Register 2 */
#define REG_14 BPF_REG_0 /* Register 14 */
struct bpf_jit { /*
unsigned int seen; * Mapping of BPF registers to s390 registers
u8 *start; */
u8 *prg; static const int reg2hex[] = {
u8 *mid; /* Return code */
u8 *lit; [BPF_REG_0] = 14,
u8 *end; /* Function parameters */
u8 *base_ip; [BPF_REG_1] = 2,
u8 *ret0_ip; [BPF_REG_2] = 3,
u8 *exit_ip; [BPF_REG_3] = 4,
unsigned int off_load_word; [BPF_REG_4] = 5,
unsigned int off_load_half; [BPF_REG_5] = 6,
unsigned int off_load_byte; /* Call saved registers */
unsigned int off_load_bmsh; [BPF_REG_6] = 7,
unsigned int off_load_iword; [BPF_REG_7] = 8,
unsigned int off_load_ihalf; [BPF_REG_8] = 9,
unsigned int off_load_ibyte; [BPF_REG_9] = 10,
/* BPF stack pointer */
[BPF_REG_FP] = 13,
/* SKB data pointer */
[REG_SKB_DATA] = 12,
/* Work registers for s390x backend */
[REG_W0] = 0,
[REG_W1] = 1,
[REG_L] = 11,
[REG_15] = 15,
}; };
#define BPF_SIZE_MAX 4096 /* Max size for program */ static inline u32 reg(u32 dst_reg, u32 src_reg)
{
return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
}
static inline u32 reg_high(u32 reg)
{
return reg2hex[reg] << 4;
}
static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
{
u32 r1 = reg2hex[b1];
if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)
jit->seen_reg[r1] = 1;
}
#define REG_SET_SEEN(b1) \
({ \
reg_set_seen(jit, b1); \
})
#define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
/*
* EMIT macros for code generation
*/
#define SEEN_DATAREF 1 /* might call external helpers */ #define _EMIT2(op) \
#define SEEN_XREG 2 /* ebx is used */
#define SEEN_MEM 4 /* use mem[] for temporary storage */
#define SEEN_RET0 8 /* pc_ret0 points to a valid return 0 */
#define SEEN_LITERAL 16 /* code uses literals */
#define SEEN_LOAD_WORD 32 /* code uses sk_load_word */
#define SEEN_LOAD_HALF 64 /* code uses sk_load_half */
#define SEEN_LOAD_BYTE 128 /* code uses sk_load_byte */
#define SEEN_LOAD_BMSH 256 /* code uses sk_load_byte_msh */
#define SEEN_LOAD_IWORD 512 /* code uses sk_load_word_ind */
#define SEEN_LOAD_IHALF 1024 /* code uses sk_load_half_ind */
#define SEEN_LOAD_IBYTE 2048 /* code uses sk_load_byte_ind */
#define EMIT2(op) \
({ \ ({ \
if (jit->prg + 2 <= jit->mid) \ if (jit->prg_buf) \
*(u16 *) jit->prg = op; \ *(u16 *) (jit->prg_buf + jit->prg) = op; \
jit->prg += 2; \ jit->prg += 2; \
}) })
#define EMIT4(op) \ #define EMIT2(op, b1, b2) \
({ \
_EMIT2(op | reg(b1, b2)); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
})
#define _EMIT4(op) \
({ \ ({ \
if (jit->prg + 4 <= jit->mid) \ if (jit->prg_buf) \
*(u32 *) jit->prg = op; \ *(u32 *) (jit->prg_buf + jit->prg) = op; \
jit->prg += 4; \ jit->prg += 4; \
}) })
#define EMIT4_DISP(op, disp) \ #define EMIT4(op, b1, b2) \
({ \
_EMIT4(op | reg(b1, b2)); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
})
#define EMIT4_RRF(op, b1, b2, b3) \
({ \
_EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
REG_SET_SEEN(b3); \
})
#define _EMIT4_DISP(op, disp) \
({ \ ({ \
unsigned int __disp = (disp) & 0xfff; \ unsigned int __disp = (disp) & 0xfff; \
EMIT4(op | __disp); \ _EMIT4(op | __disp); \
}) })
#define EMIT4_IMM(op, imm) \ #define EMIT4_DISP(op, b1, b2, disp) \
({ \
_EMIT4_DISP(op | reg_high(b1) << 16 | \
reg_high(b2) << 8, disp); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
})
#define EMIT4_IMM(op, b1, imm) \
({ \ ({ \
unsigned int __imm = (imm) & 0xffff; \ unsigned int __imm = (imm) & 0xffff; \
EMIT4(op | __imm); \ _EMIT4(op | reg_high(b1) << 16 | __imm); \
REG_SET_SEEN(b1); \
}) })
#define EMIT4_PCREL(op, pcrel) \ #define EMIT4_PCREL(op, pcrel) \
({ \ ({ \
long __pcrel = ((pcrel) >> 1) & 0xffff; \ long __pcrel = ((pcrel) >> 1) & 0xffff; \
EMIT4(op | __pcrel); \ _EMIT4(op | __pcrel); \
}) })
#define EMIT6(op1, op2) \ #define _EMIT6(op1, op2) \
({ \ ({ \
if (jit->prg + 6 <= jit->mid) { \ if (jit->prg_buf) { \
*(u32 *) jit->prg = op1; \ *(u32 *) (jit->prg_buf + jit->prg) = op1; \
*(u16 *) (jit->prg + 4) = op2; \ *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
} \ } \
jit->prg += 6; \ jit->prg += 6; \
}) })
#define EMIT6_DISP(op1, op2, disp) \ #define _EMIT6_DISP(op1, op2, disp) \
({ \ ({ \
unsigned int __disp = (disp) & 0xfff; \ unsigned int __disp = (disp) & 0xfff; \
EMIT6(op1 | __disp, op2); \ _EMIT6(op1 | __disp, op2); \
})
#define EMIT6_DISP(op1, op2, b1, b2, b3, disp) \
({ \
_EMIT6_DISP(op1 | reg(b1, b2) << 16 | \
reg_high(b3) << 8, op2, disp); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
REG_SET_SEEN(b3); \
})
#define _EMIT6_DISP_LH(op1, op2, disp) \
({ \
unsigned int __disp_h = ((u32)disp) & 0xff000; \
unsigned int __disp_l = ((u32)disp) & 0x00fff; \
_EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
}) })
#define EMIT6_IMM(op, imm) \ #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
({ \
_EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
reg_high(b3) << 8, op2, disp); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
REG_SET_SEEN(b3); \
})
#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
({ \
/* Branch instruction needs 6 bytes */ \
int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
_EMIT6(op1 | reg(b1, b2) << 16 | rel, op2 | mask); \
REG_SET_SEEN(b1); \
REG_SET_SEEN(b2); \
})
#define _EMIT6_IMM(op, imm) \
({ \ ({ \
unsigned int __imm = (imm); \ unsigned int __imm = (imm); \
EMIT6(op | (__imm >> 16), __imm & 0xffff); \ _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
}) })
#define EMIT_CONST(val) \ #define EMIT6_IMM(op, b1, imm) \
({ \
_EMIT6_IMM(op | reg_high(b1) << 16, imm); \
REG_SET_SEEN(b1); \
})
#define EMIT_CONST_U32(val) \
({ \ ({ \
unsigned int ret; \ unsigned int ret; \
ret = (unsigned int) (jit->lit - jit->base_ip); \ ret = jit->lit - jit->base_ip; \
jit->seen |= SEEN_LITERAL; \ jit->seen |= SEEN_LITERAL; \
if (jit->lit + 4 <= jit->end) \ if (jit->prg_buf) \
*(u32 *) jit->lit = val; \ *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
jit->lit += 4; \ jit->lit += 4; \
ret; \ ret; \
}) })
#define EMIT_FN_CONST(bit, fn) \ #define EMIT_CONST_U64(val) \
({ \ ({ \
unsigned int ret; \ unsigned int ret; \
ret = (unsigned int) (jit->lit - jit->base_ip); \ ret = jit->lit - jit->base_ip; \
if (jit->seen & bit) { \
jit->seen |= SEEN_LITERAL; \ jit->seen |= SEEN_LITERAL; \
if (jit->lit + 8 <= jit->end) \ if (jit->prg_buf) \
*(void **) jit->lit = fn; \ *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
jit->lit += 8; \ jit->lit += 8; \
} \
ret; \ ret; \
}) })
static void bpf_jit_fill_hole(void *area, unsigned int size) #define EMIT_ZERO(b1) \
({ \
/* llgfr %dst,%dst (zero extend to 64 bit) */ \
EMIT4(0xb9160000, b1, b1); \
REG_SET_SEEN(b1); \
})
/*
* Fill whole space with illegal instructions
*/
static void jit_fill_hole(void *area, unsigned int size)
{ {
/* Fill whole space with illegal instructions */
memset(area, 0, size); memset(area, 0, size);
} }
static void bpf_jit_prologue(struct bpf_jit *jit) /*
* Save registers from "rs" (register start) to "re" (register end) on stack
*/
static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
{
u32 off = 72 + (rs - 6) * 8;
if (rs == re)
/* stg %rs,off(%r15) */
_EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
else
/* stmg %rs,%re,off(%r15) */
_EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
}
/*
* Restore registers from "rs" (register start) to "re" (register end) on stack
*/
static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
{ {
/* Save registers and create stack frame if necessary */ u32 off = 72 + (rs - 6) * 8;
if (jit->seen & SEEN_DATAREF) {
/* stmg %r8,%r15,88(%r15) */
EMIT6(0xeb8ff058, 0x0024);
/* lgr %r14,%r15 */
EMIT4(0xb90400ef);
/* aghi %r15,<offset> */
EMIT4_IMM(0xa7fb0000, (jit->seen & SEEN_MEM) ? -112 : -80);
/* stg %r14,152(%r15) */
EMIT6(0xe3e0f098, 0x0024);
} else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL))
/* stmg %r12,%r13,120(%r15) */
EMIT6(0xebcdf078, 0x0024);
else if (jit->seen & SEEN_XREG)
/* stg %r12,120(%r15) */
EMIT6(0xe3c0f078, 0x0024);
else if (jit->seen & SEEN_LITERAL)
/* stg %r13,128(%r15) */
EMIT6(0xe3d0f080, 0x0024);
if (jit->seen & SEEN_STACK)
off += STK_OFF;
if (rs == re)
/* lg %rs,off(%r15) */
_EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
else
/* lmg %rs,%re,off(%r15) */
_EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
}
/*
* Return first seen register (from start)
*/
static int get_start(struct bpf_jit *jit, int start)
{
int i;
for (i = start; i <= 15; i++) {
if (jit->seen_reg[i])
return i;
}
return 0;
}
/*
* Return last seen register (from start) (gap >= 2)
*/
static int get_end(struct bpf_jit *jit, int start)
{
int i;
for (i = start; i < 15; i++) {
if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
return i - 1;
}
return jit->seen_reg[15] ? 15 : 14;
}
#define REGS_SAVE 1
#define REGS_RESTORE 0
/*
* Save and restore clobbered registers (6-15) on stack.
* We save/restore registers in chunks with gap >= 2 registers.
*/
static void save_restore_regs(struct bpf_jit *jit, int op)
{
int re = 6, rs;
do {
rs = get_start(jit, re);
if (!rs)
break;
re = get_end(jit, rs + 1);
if (op == REGS_SAVE)
save_regs(jit, rs, re);
else
restore_regs(jit, rs, re);
re++;
} while (re <= 15);
}
/*
* Emit function prologue
*
* Save registers and create stack frame if necessary.
* See stack frame layout desription in "bpf_jit.h"!
*/
static void bpf_jit_prologue(struct bpf_jit *jit)
{
/* Save registers */
save_restore_regs(jit, REGS_SAVE);
/* Setup literal pool */ /* Setup literal pool */
if (jit->seen & SEEN_LITERAL) { if (jit->seen & SEEN_LITERAL) {
/* basr %r13,0 */ /* basr %r13,0 */
EMIT2(0x0dd0); EMIT2(0x0d00, REG_L, REG_0);
jit->base_ip = jit->prg; jit->base_ip = jit->prg;
} }
jit->off_load_word = EMIT_FN_CONST(SEEN_LOAD_WORD, sk_load_word); /* Setup stack and backchain */
jit->off_load_half = EMIT_FN_CONST(SEEN_LOAD_HALF, sk_load_half); if (jit->seen & SEEN_STACK) {
jit->off_load_byte = EMIT_FN_CONST(SEEN_LOAD_BYTE, sk_load_byte); /* lgr %bfp,%r15 (BPF frame pointer) */
jit->off_load_bmsh = EMIT_FN_CONST(SEEN_LOAD_BMSH, sk_load_byte_msh); EMIT4(0xb9040000, BPF_REG_FP, REG_15);
jit->off_load_iword = EMIT_FN_CONST(SEEN_LOAD_IWORD, sk_load_word_ind); /* aghi %r15,-STK_OFF */
jit->off_load_ihalf = EMIT_FN_CONST(SEEN_LOAD_IHALF, sk_load_half_ind); EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
jit->off_load_ibyte = EMIT_FN_CONST(SEEN_LOAD_IBYTE, sk_load_byte_ind); if (jit->seen & SEEN_FUNC)
/* stg %bfp,152(%r15) (backchain) */
/* Filter needs to access skb data */ EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_FP, REG_0,
if (jit->seen & SEEN_DATAREF) { REG_15, 152);
/* l %r11,<len>(%r2) */ }
EMIT4_DISP(0x58b02000, offsetof(struct sk_buff, len)); /*
/* s %r11,<data_len>(%r2) */ * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
EMIT4_DISP(0x5bb02000, offsetof(struct sk_buff, data_len)); * we store the SKB header length on the stack and the SKB data
/* lg %r10,<data>(%r2) */ * pointer in REG_SKB_DATA.
EMIT6_DISP(0xe3a02000, 0x0004, */
offsetof(struct sk_buff, data)); if (jit->seen & SEEN_SKB) {
/* Header length: llgf %w1,<len>(%b1) */
EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
offsetof(struct sk_buff, len));
/* s %w1,<data_len>(%b1) */
EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
offsetof(struct sk_buff, data_len));
/* stg %w1,ST_OFF_HLEN(%r0,%r15) */
EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15,
STK_OFF_HLEN);
/* lg %skb_data,data_off(%b1) */
EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
BPF_REG_1, offsetof(struct sk_buff, data));
} }
/* BPF compatibility: clear A (%b7) and X (%b8) registers */
if (REG_SEEN(BPF_REG_7))
/* lghi %b7,0 */
EMIT4_IMM(0xa7090000, BPF_REG_7, 0);
if (REG_SEEN(BPF_REG_8))
/* lghi %b8,0 */
EMIT4_IMM(0xa7090000, BPF_REG_8, 0);
} }
/*
* Function epilogue
*/
static void bpf_jit_epilogue(struct bpf_jit *jit) static void bpf_jit_epilogue(struct bpf_jit *jit)
{ {
/* Return 0 */ /* Return 0 */
if (jit->seen & SEEN_RET0) { if (jit->seen & SEEN_RET0) {
jit->ret0_ip = jit->prg; jit->ret0_ip = jit->prg;
/* lghi %r2,0 */ /* lghi %b0,0 */
EMIT4(0xa7290000); EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
} }
jit->exit_ip = jit->prg; jit->exit_ip = jit->prg;
/* Load exit code: lgr %r2,%b0 */
EMIT4(0xb9040000, REG_2, BPF_REG_0);
/* Restore registers */ /* Restore registers */
if (jit->seen & SEEN_DATAREF) save_restore_regs(jit, REGS_RESTORE);
/* lmg %r8,%r15,<offset>(%r15) */
EMIT6_DISP(0xeb8ff000, 0x0004,
(jit->seen & SEEN_MEM) ? 200 : 168);
else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL))
/* lmg %r12,%r13,120(%r15) */
EMIT6(0xebcdf078, 0x0004);
else if (jit->seen & SEEN_XREG)
/* lg %r12,120(%r15) */
EMIT6(0xe3c0f078, 0x0004);
else if (jit->seen & SEEN_LITERAL)
/* lg %r13,128(%r15) */
EMIT6(0xe3d0f080, 0x0004);
/* br %r14 */ /* br %r14 */
EMIT2(0x07fe); _EMIT2(0x07fe);
} }
/* /*
* make sure we dont leak kernel information to user * Compile one eBPF instruction into s390x code
*/ */
static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter) static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
{ {
/* Clear temporary memory if (seen & SEEN_MEM) */ struct bpf_insn *insn = &fp->insnsi[i];
if (jit->seen & SEEN_MEM) int jmp_off, last, insn_count = 1;
/* xc 0(64,%r15),0(%r15) */ unsigned int func_addr, mask;
EMIT6(0xd73ff000, 0xf000); u32 dst_reg = insn->dst_reg;
/* Clear X if (seen & SEEN_XREG) */ u32 src_reg = insn->src_reg;
if (jit->seen & SEEN_XREG) u32 *addrs = jit->addrs;
/* lhi %r12,0 */ s32 imm = insn->imm;
EMIT4(0xa7c80000); s16 off = insn->off;
/* Clear A if the first register does not set it. */
switch (filter[0].code) {
case BPF_LD | BPF_W | BPF_ABS:
case BPF_LD | BPF_H | BPF_ABS:
case BPF_LD | BPF_B | BPF_ABS:
case BPF_LD | BPF_W | BPF_LEN:
case BPF_LD | BPF_W | BPF_IND:
case BPF_LD | BPF_H | BPF_IND:
case BPF_LD | BPF_B | BPF_IND:
case BPF_LD | BPF_IMM:
case BPF_LD | BPF_MEM:
case BPF_MISC | BPF_TXA:
case BPF_RET | BPF_K:
/* first instruction sets A register */
break;
default: /* A = 0 */
/* lhi %r5,0 */
EMIT4(0xa7580000);
}
}
static int bpf_jit_insn(struct bpf_jit *jit, struct sock_filter *filter, switch (insn->code) {
unsigned int *addrs, int i, int last) /*
{ * BPF_MOV
unsigned int K; */
int offset; case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
unsigned int mask; /* llgfr %dst,%src */
u16 code; EMIT4(0xb9160000, dst_reg, src_reg);
K = filter->k;
code = bpf_anc_helper(filter);
switch (code) {
case BPF_ALU | BPF_ADD | BPF_X: /* A += X */
jit->seen |= SEEN_XREG;
/* ar %r5,%r12 */
EMIT2(0x1a5c);
break;
case BPF_ALU | BPF_ADD | BPF_K: /* A += K */
if (!K)
break;
if (K <= 16383)
/* ahi %r5,<K> */
EMIT4_IMM(0xa75a0000, K);
else if (test_facility(21))
/* alfi %r5,<K> */
EMIT6_IMM(0xc25b0000, K);
else
/* a %r5,<d(K)>(%r13) */
EMIT4_DISP(0x5a50d000, EMIT_CONST(K));
break;
case BPF_ALU | BPF_SUB | BPF_X: /* A -= X */
jit->seen |= SEEN_XREG;
/* sr %r5,%r12 */
EMIT2(0x1b5c);
break;
case BPF_ALU | BPF_SUB | BPF_K: /* A -= K */
if (!K)
break;
if (K <= 16384)
/* ahi %r5,-K */
EMIT4_IMM(0xa75a0000, -K);
else if (test_facility(21))
/* alfi %r5,-K */
EMIT6_IMM(0xc25b0000, -K);
else
/* s %r5,<d(K)>(%r13) */
EMIT4_DISP(0x5b50d000, EMIT_CONST(K));
break;
case BPF_ALU | BPF_MUL | BPF_X: /* A *= X */
jit->seen |= SEEN_XREG;
/* msr %r5,%r12 */
EMIT4(0xb252005c);
break;
case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */
if (K <= 16383)
/* mhi %r5,K */
EMIT4_IMM(0xa75c0000, K);
else if (test_facility(34))
/* msfi %r5,<K> */
EMIT6_IMM(0xc2510000, K);
else
/* ms %r5,<d(K)>(%r13) */
EMIT4_DISP(0x7150d000, EMIT_CONST(K));
break; break;
case BPF_ALU | BPF_DIV | BPF_X: /* A /= X */ case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
jit->seen |= SEEN_XREG | SEEN_RET0; /* lgr %dst,%src */
/* ltr %r12,%r12 */ EMIT4(0xb9040000, dst_reg, src_reg);
EMIT2(0x12cc); break;
/* jz <ret0> */ case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); /* llilf %dst,imm */
/* lhi %r4,0 */ EMIT6_IMM(0xc00f0000, dst_reg, imm);
EMIT4(0xa7480000); break;
/* dlr %r4,%r12 */ case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
EMIT4(0xb997004c); /* lgfi %dst,imm */
break; EMIT6_IMM(0xc0010000, dst_reg, imm);
case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */ break;
if (K == 1) /*
break; * BPF_LD 64
/* lhi %r4,0 */ */
EMIT4(0xa7480000); case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
/* dl %r4,<d(K)>(%r13) */ {
EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); /* 16 byte instruction that uses two 'struct bpf_insn' */
break; u64 imm64;
case BPF_ALU | BPF_MOD | BPF_X: /* A %= X */
jit->seen |= SEEN_XREG | SEEN_RET0; imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
/* ltr %r12,%r12 */ /* lg %dst,<d(imm)>(%l) */
EMIT2(0x12cc); EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
/* jz <ret0> */ EMIT_CONST_U64(imm64));
EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); insn_count = 2;
/* lhi %r4,0 */
EMIT4(0xa7480000);
/* dlr %r4,%r12 */
EMIT4(0xb997004c);
/* lr %r5,%r4 */
EMIT2(0x1854);
break;
case BPF_ALU | BPF_MOD | BPF_K: /* A %= K */
if (K == 1) {
/* lhi %r5,0 */
EMIT4(0xa7580000);
break; break;
} }
/* lhi %r4,0 */ /*
EMIT4(0xa7480000); * BPF_ADD
/* dl %r4,<d(K)>(%r13) */ */
EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
/* lr %r5,%r4 */ /* ar %dst,%src */
EMIT2(0x1854); EMIT2(0x1a00, dst_reg, src_reg);
break; EMIT_ZERO(dst_reg);
case BPF_ALU | BPF_AND | BPF_X: /* A &= X */ break;
jit->seen |= SEEN_XREG; case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
/* nr %r5,%r12 */ /* agr %dst,%src */
EMIT2(0x145c); EMIT4(0xb9080000, dst_reg, src_reg);
break; break;
case BPF_ALU | BPF_AND | BPF_K: /* A &= K */ case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
if (test_facility(21)) if (!imm)
/* nilf %r5,<K> */ break;
EMIT6_IMM(0xc05b0000, K); /* alfi %dst,imm */
else EMIT6_IMM(0xc20b0000, dst_reg, imm);
/* n %r5,<d(K)>(%r13) */ EMIT_ZERO(dst_reg);
EMIT4_DISP(0x5450d000, EMIT_CONST(K)); break;
break; case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
case BPF_ALU | BPF_OR | BPF_X: /* A |= X */ if (!imm)
jit->seen |= SEEN_XREG; break;
/* or %r5,%r12 */ /* agfi %dst,imm */
EMIT2(0x165c); EMIT6_IMM(0xc2080000, dst_reg, imm);
break; break;
case BPF_ALU | BPF_OR | BPF_K: /* A |= K */ /*
if (test_facility(21)) * BPF_SUB
/* oilf %r5,<K> */ */
EMIT6_IMM(0xc05d0000, K); case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
else /* sr %dst,%src */
/* o %r5,<d(K)>(%r13) */ EMIT2(0x1b00, dst_reg, src_reg);
EMIT4_DISP(0x5650d000, EMIT_CONST(K)); EMIT_ZERO(dst_reg);
break; break;
case BPF_ANC | SKF_AD_ALU_XOR_X: /* A ^= X; */ case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
case BPF_ALU | BPF_XOR | BPF_X: /* sgr %dst,%src */
jit->seen |= SEEN_XREG; EMIT4(0xb9090000, dst_reg, src_reg);
/* xr %r5,%r12 */ break;
EMIT2(0x175c); case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
break; if (!imm)
case BPF_ALU | BPF_XOR | BPF_K: /* A ^= K */
if (!K)
break;
/* x %r5,<d(K)>(%r13) */
EMIT4_DISP(0x5750d000, EMIT_CONST(K));
break;
case BPF_ALU | BPF_LSH | BPF_X: /* A <<= X; */
jit->seen |= SEEN_XREG;
/* sll %r5,0(%r12) */
EMIT4(0x8950c000);
break;
case BPF_ALU | BPF_LSH | BPF_K: /* A <<= K */
if (K == 0)
break;
/* sll %r5,K */
EMIT4_DISP(0x89500000, K);
break;
case BPF_ALU | BPF_RSH | BPF_X: /* A >>= X; */
jit->seen |= SEEN_XREG;
/* srl %r5,0(%r12) */
EMIT4(0x8850c000);
break;
case BPF_ALU | BPF_RSH | BPF_K: /* A >>= K; */
if (K == 0)
break;
/* srl %r5,K */
EMIT4_DISP(0x88500000, K);
break;
case BPF_ALU | BPF_NEG: /* A = -A */
/* lcr %r5,%r5 */
EMIT2(0x1355);
break;
case BPF_JMP | BPF_JA: /* ip += K */
offset = addrs[i + K] + jit->start - jit->prg;
EMIT4_PCREL(0xa7f40000, offset);
break;
case BPF_JMP | BPF_JGT | BPF_K: /* ip += (A > K) ? jt : jf */
mask = 0x200000; /* jh */
goto kbranch;
case BPF_JMP | BPF_JGE | BPF_K: /* ip += (A >= K) ? jt : jf */
mask = 0xa00000; /* jhe */
goto kbranch;
case BPF_JMP | BPF_JEQ | BPF_K: /* ip += (A == K) ? jt : jf */
mask = 0x800000; /* je */
kbranch: /* Emit compare if the branch targets are different */
if (filter->jt != filter->jf) {
if (test_facility(21))
/* clfi %r5,<K> */
EMIT6_IMM(0xc25f0000, K);
else
/* cl %r5,<d(K)>(%r13) */
EMIT4_DISP(0x5550d000, EMIT_CONST(K));
}
branch: if (filter->jt == filter->jf) {
if (filter->jt == 0)
break; break;
/* j <jt> */ /* alfi %dst,-imm */
offset = addrs[i + filter->jt] + jit->start - jit->prg; EMIT6_IMM(0xc20b0000, dst_reg, -imm);
EMIT4_PCREL(0xa7f40000, offset); EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
if (!imm)
break;
/* agfi %dst,-imm */
EMIT6_IMM(0xc2080000, dst_reg, -imm);
break;
/*
* BPF_MUL
*/
case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
/* msr %dst,%src */
EMIT4(0xb2520000, dst_reg, src_reg);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
/* msgr %dst,%src */
EMIT4(0xb90c0000, dst_reg, src_reg);
break;
case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
if (imm == 1)
break;
/* msfi %r5,imm */
EMIT6_IMM(0xc2010000, dst_reg, imm);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
if (imm == 1)
break;
/* msgfi %dst,imm */
EMIT6_IMM(0xc2000000, dst_reg, imm);
break;
/*
* BPF_DIV / BPF_MOD
*/
case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
{
int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
jit->seen |= SEEN_RET0;
/* ltr %src,%src (if src == 0 goto fail) */
EMIT2(0x1200, src_reg, src_reg);
/* jz <ret0> */
EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
/* lhi %w0,0 */
EMIT4_IMM(0xa7080000, REG_W0, 0);
/* lr %w1,%dst */
EMIT2(0x1800, REG_W1, dst_reg);
/* dlr %w0,%src */
EMIT4(0xb9970000, REG_W0, src_reg);
/* llgfr %dst,%rc */
EMIT4(0xb9160000, dst_reg, rc_reg);
break; break;
} }
if (filter->jt != 0) { case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / (u32) src */
/* brc <mask>,<jt> */ case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % (u32) src */
offset = addrs[i + filter->jt] + jit->start - jit->prg; {
EMIT4_PCREL(0xa7040000 | mask, offset); int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
jit->seen |= SEEN_RET0;
/* ltgr %src,%src (if src == 0 goto fail) */
EMIT4(0xb9020000, src_reg, src_reg);
/* jz <ret0> */
EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
/* lghi %w0,0 */
EMIT4_IMM(0xa7090000, REG_W0, 0);
/* lgr %w1,%dst */
EMIT4(0xb9040000, REG_W1, dst_reg);
/* llgfr %dst,%src (u32 cast) */
EMIT4(0xb9160000, dst_reg, src_reg);
/* dlgr %w0,%dst */
EMIT4(0xb9870000, REG_W0, dst_reg);
/* lgr %dst,%rc */
EMIT4(0xb9040000, dst_reg, rc_reg);
break;
} }
if (filter->jf != 0) { case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
/* brc <mask^15>,<jf> */ case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
offset = addrs[i + filter->jf] + jit->start - jit->prg; {
EMIT4_PCREL(0xa7040000 | (mask ^ 0xf00000), offset); int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
if (imm == 1) {
if (BPF_OP(insn->code) == BPF_MOD)
/* lhgi %dst,0 */
EMIT4_IMM(0xa7090000, dst_reg, 0);
break;
} }
/* lhi %w0,0 */
EMIT4_IMM(0xa7080000, REG_W0, 0);
/* lr %w1,%dst */
EMIT2(0x1800, REG_W1, dst_reg);
/* dl %w0,<d(imm)>(%l) */
EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
EMIT_CONST_U32(imm));
/* llgfr %dst,%rc */
EMIT4(0xb9160000, dst_reg, rc_reg);
break; break;
case BPF_JMP | BPF_JSET | BPF_K: /* ip += (A & K) ? jt : jf */
mask = 0x700000; /* jnz */
/* Emit test if the branch targets are different */
if (filter->jt != filter->jf) {
if (K > 65535) {
/* lr %r4,%r5 */
EMIT2(0x1845);
/* n %r4,<d(K)>(%r13) */
EMIT4_DISP(0x5440d000, EMIT_CONST(K));
} else
/* tmll %r5,K */
EMIT4_IMM(0xa7510000, K);
} }
goto branch; case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / (u32) imm */
case BPF_JMP | BPF_JGT | BPF_X: /* ip += (A > X) ? jt : jf */ case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % (u32) imm */
mask = 0x200000; /* jh */ {
goto xbranch; int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
case BPF_JMP | BPF_JGE | BPF_X: /* ip += (A >= X) ? jt : jf */
mask = 0xa00000; /* jhe */ if (imm == 1) {
goto xbranch; if (BPF_OP(insn->code) == BPF_MOD)
case BPF_JMP | BPF_JEQ | BPF_X: /* ip += (A == X) ? jt : jf */ /* lhgi %dst,0 */
mask = 0x800000; /* je */ EMIT4_IMM(0xa7090000, dst_reg, 0);
xbranch: /* Emit compare if the branch targets are different */ break;
if (filter->jt != filter->jf) {
jit->seen |= SEEN_XREG;
/* clr %r5,%r12 */
EMIT2(0x155c);
} }
goto branch; /* lghi %w0,0 */
case BPF_JMP | BPF_JSET | BPF_X: /* ip += (A & X) ? jt : jf */ EMIT4_IMM(0xa7090000, REG_W0, 0);
mask = 0x700000; /* jnz */ /* lgr %w1,%dst */
/* Emit test if the branch targets are different */ EMIT4(0xb9040000, REG_W1, dst_reg);
if (filter->jt != filter->jf) { /* dlg %w0,<d(imm)>(%l) */
jit->seen |= SEEN_XREG; EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
/* lr %r4,%r5 */ EMIT_CONST_U64((u32) imm));
EMIT2(0x1845); /* lgr %dst,%rc */
/* nr %r4,%r12 */ EMIT4(0xb9040000, dst_reg, rc_reg);
EMIT2(0x144c); break;
} }
goto branch; /*
case BPF_LD | BPF_W | BPF_ABS: /* A = *(u32 *) (skb->data+K) */ * BPF_AND
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_WORD; */
offset = jit->off_load_word; case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
goto load_abs; /* nr %dst,%src */
case BPF_LD | BPF_H | BPF_ABS: /* A = *(u16 *) (skb->data+K) */ EMIT2(0x1400, dst_reg, src_reg);
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_HALF; EMIT_ZERO(dst_reg);
offset = jit->off_load_half;
goto load_abs;
case BPF_LD | BPF_B | BPF_ABS: /* A = *(u8 *) (skb->data+K) */
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_BYTE;
offset = jit->off_load_byte;
load_abs: if ((int) K < 0)
goto out;
call_fn: /* lg %r1,<d(function)>(%r13) */
EMIT6_DISP(0xe310d000, 0x0004, offset);
/* l %r3,<d(K)>(%r13) */
EMIT4_DISP(0x5830d000, EMIT_CONST(K));
/* basr %r8,%r1 */
EMIT2(0x0d81);
/* jnz <ret0> */
EMIT4_PCREL(0xa7740000, (jit->ret0_ip - jit->prg));
break; break;
case BPF_LD | BPF_W | BPF_IND: /* A = *(u32 *) (skb->data+K+X) */ case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IWORD; /* ngr %dst,%src */
offset = jit->off_load_iword; EMIT4(0xb9800000, dst_reg, src_reg);
goto call_fn; break;
case BPF_LD | BPF_H | BPF_IND: /* A = *(u16 *) (skb->data+K+X) */ case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IHALF; /* nilf %dst,imm */
offset = jit->off_load_ihalf; EMIT6_IMM(0xc00b0000, dst_reg, imm);
goto call_fn; EMIT_ZERO(dst_reg);
case BPF_LD | BPF_B | BPF_IND: /* A = *(u8 *) (skb->data+K+X) */ break;
jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IBYTE; case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
offset = jit->off_load_ibyte; /* ng %dst,<d(imm)>(%l) */
goto call_fn; EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
case BPF_LDX | BPF_B | BPF_MSH: EMIT_CONST_U64(imm));
/* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */ break;
jit->seen |= SEEN_RET0; /*
if ((int) K < 0) { * BPF_OR
/* j <ret0> */ */
EMIT4_PCREL(0xa7f40000, (jit->ret0_ip - jit->prg)); case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
/* or %dst,%src */
EMIT2(0x1600, dst_reg, src_reg);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
/* ogr %dst,%src */
EMIT4(0xb9810000, dst_reg, src_reg);
break;
case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
/* oilf %dst,imm */
EMIT6_IMM(0xc00d0000, dst_reg, imm);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
/* og %dst,<d(imm)>(%l) */
EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
EMIT_CONST_U64(imm));
break;
/*
* BPF_XOR
*/
case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
/* xr %dst,%src */
EMIT2(0x1700, dst_reg, src_reg);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
/* xgr %dst,%src */
EMIT4(0xb9820000, dst_reg, src_reg);
break;
case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
if (!imm)
break;
/* xilf %dst,imm */
EMIT6_IMM(0xc0070000, dst_reg, imm);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
/* xg %dst,<d(imm)>(%l) */
EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
EMIT_CONST_U64(imm));
break;
/*
* BPF_LSH
*/
case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
/* sll %dst,0(%src) */
EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
/* sllg %dst,%dst,0(%src) */
EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
break;
case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
if (imm == 0)
break;
/* sll %dst,imm(%r0) */
EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
if (imm == 0)
break;
/* sllg %dst,%dst,imm(%r0) */
EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
break;
/*
* BPF_RSH
*/
case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
/* srl %dst,0(%src) */
EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
/* srlg %dst,%dst,0(%src) */
EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
break;
case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
if (imm == 0)
break;
/* srl %dst,imm(%r0) */
EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
if (imm == 0)
break;
/* srlg %dst,%dst,imm(%r0) */
EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
break;
/*
* BPF_ARSH
*/
case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
/* srag %dst,%dst,0(%src) */
EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
break;
case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
if (imm == 0)
break;
/* srag %dst,%dst,imm(%r0) */
EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
break;
/*
* BPF_NEG
*/
case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
/* lcr %dst,%dst */
EMIT2(0x1300, dst_reg, dst_reg);
EMIT_ZERO(dst_reg);
break;
case BPF_ALU64 | BPF_NEG: /* dst = -dst */
/* lcgr %dst,%dst */
EMIT4(0xb9130000, dst_reg, dst_reg);
break;
/*
* BPF_FROM_BE/LE
*/
case BPF_ALU | BPF_END | BPF_FROM_BE:
/* s390 is big endian, therefore only clear high order bytes */
switch (imm) {
case 16: /* dst = (u16) cpu_to_be16(dst) */
/* llghr %dst,%dst */
EMIT4(0xb9850000, dst_reg, dst_reg);
break;
case 32: /* dst = (u32) cpu_to_be32(dst) */
/* llgfr %dst,%dst */
EMIT4(0xb9160000, dst_reg, dst_reg);
break;
case 64: /* dst = (u64) cpu_to_be64(dst) */
break; break;
} }
jit->seen |= SEEN_DATAREF | SEEN_LOAD_BMSH;
offset = jit->off_load_bmsh;
goto call_fn;
case BPF_LD | BPF_W | BPF_LEN: /* A = skb->len; */
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
/* l %r5,<d(len)>(%r2) */
EMIT4_DISP(0x58502000, offsetof(struct sk_buff, len));
break;
case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
jit->seen |= SEEN_XREG;
/* l %r12,<d(len)>(%r2) */
EMIT4_DISP(0x58c02000, offsetof(struct sk_buff, len));
break;
case BPF_LD | BPF_IMM: /* A = K */
if (K <= 16383)
/* lhi %r5,K */
EMIT4_IMM(0xa7580000, K);
else if (test_facility(21))
/* llilf %r5,<K> */
EMIT6_IMM(0xc05f0000, K);
else
/* l %r5,<d(K)>(%r13) */
EMIT4_DISP(0x5850d000, EMIT_CONST(K));
break;
case BPF_LDX | BPF_IMM: /* X = K */
jit->seen |= SEEN_XREG;
if (K <= 16383)
/* lhi %r12,<K> */
EMIT4_IMM(0xa7c80000, K);
else if (test_facility(21))
/* llilf %r12,<K> */
EMIT6_IMM(0xc0cf0000, K);
else
/* l %r12,<d(K)>(%r13) */
EMIT4_DISP(0x58c0d000, EMIT_CONST(K));
break; break;
case BPF_LD | BPF_MEM: /* A = mem[K] */ case BPF_ALU | BPF_END | BPF_FROM_LE:
switch (imm) {
case 16: /* dst = (u16) cpu_to_le16(dst) */
/* lrvr %dst,%dst */
EMIT4(0xb91f0000, dst_reg, dst_reg);
/* srl %dst,16(%r0) */
EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
/* llghr %dst,%dst */
EMIT4(0xb9850000, dst_reg, dst_reg);
break;
case 32: /* dst = (u32) cpu_to_le32(dst) */
/* lrvr %dst,%dst */
EMIT4(0xb91f0000, dst_reg, dst_reg);
/* llgfr %dst,%dst */
EMIT4(0xb9160000, dst_reg, dst_reg);
break;
case 64: /* dst = (u64) cpu_to_le64(dst) */
/* lrvgr %dst,%dst */
EMIT4(0xb90f0000, dst_reg, dst_reg);
break;
}
break;
/*
* BPF_ST(X)
*/
case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
/* stcy %src,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM; jit->seen |= SEEN_MEM;
/* l %r5,<K>(%r15) */
EMIT4_DISP(0x5850f000,
(jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
break;
case BPF_LDX | BPF_MEM: /* X = mem[K] */
jit->seen |= SEEN_XREG | SEEN_MEM;
/* l %r12,<K>(%r15) */
EMIT4_DISP(0x58c0f000,
(jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
break;
case BPF_MISC | BPF_TAX: /* X = A */
jit->seen |= SEEN_XREG;
/* lr %r12,%r5 */
EMIT2(0x18c5);
break;
case BPF_MISC | BPF_TXA: /* A = X */
jit->seen |= SEEN_XREG;
/* lr %r5,%r12 */
EMIT2(0x185c);
break;
case BPF_RET | BPF_K:
if (K == 0) {
jit->seen |= SEEN_RET0;
if (last)
break;
/* j <ret0> */
EMIT4_PCREL(0xa7f40000, jit->ret0_ip - jit->prg);
} else {
if (K <= 16383)
/* lghi %r2,K */
EMIT4_IMM(0xa7290000, K);
else
/* llgf %r2,<K>(%r13) */
EMIT6_DISP(0xe320d000, 0x0016, EMIT_CONST(K));
/* j <exit> */
if (last && !(jit->seen & SEEN_RET0))
break; break;
EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
/* sthy %src,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
/* sty %src,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
/* stg %src,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
/* lhi %w0,imm */
EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
/* stcy %w0,off(dst) */
EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
/* lhi %w0,imm */
EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
/* sthy %w0,off(dst) */
EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
/* llilf %w0,imm */
EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
/* sty %w0,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
/* lgfi %w0,imm */
EMIT6_IMM(0xc0010000, REG_W0, imm);
/* stg %w0,off(%dst) */
EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
/*
* BPF_STX XADD (atomic_add)
*/
case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
/* laal %w0,%src,off(%dst) */
EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
dst_reg, off);
jit->seen |= SEEN_MEM;
break;
case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
/* laalg %w0,%src,off(%dst) */
EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
dst_reg, off);
jit->seen |= SEEN_MEM;
break;
/*
* BPF_LDX
*/
case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
/* llgc %dst,0(off,%src) */
EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
/* llgh %dst,0(off,%src) */
EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
jit->seen |= SEEN_MEM;
break;
case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
/* llgf %dst,off(%src) */
jit->seen |= SEEN_MEM;
EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
break;
case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
/* lg %dst,0(off,%src) */
jit->seen |= SEEN_MEM;
EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
break;
/*
* BPF_JMP / CALL
*/
case BPF_JMP | BPF_CALL:
{
/*
* b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
*/
const u64 func = (u64)__bpf_call_base + imm;
REG_SET_SEEN(BPF_REG_5);
jit->seen |= SEEN_FUNC;
/* lg %w1,<d(imm)>(%l) */
EMIT6_DISP(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
EMIT_CONST_U64(func));
/* basr %r14,%w1 */
EMIT2(0x0d00, REG_14, REG_W1);
/* lgr %b0,%r2: load return value into %b0 */
EMIT4(0xb9040000, BPF_REG_0, REG_2);
break;
} }
case BPF_JMP | BPF_EXIT: /* return b0 */
last = (i == fp->len - 1) ? 1 : 0;
if (last && !(jit->seen & SEEN_RET0))
break; break;
case BPF_RET | BPF_A:
/* llgfr %r2,%r5 */
EMIT4(0xb9160025);
/* j <exit> */ /* j <exit> */
EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
break; break;
case BPF_ST: /* mem[K] = A */ /*
jit->seen |= SEEN_MEM; * Branch relative (number of skipped instructions) to offset on
/* st %r5,<K>(%r15) */ * condition.
EMIT4_DISP(0x5050f000, *
(jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); * Condition code to mask mapping:
break; *
case BPF_STX: /* mem[K] = X : mov %ebx,off8(%rbp) */ * CC | Description | Mask
jit->seen |= SEEN_XREG | SEEN_MEM; * ------------------------------
/* st %r12,<K>(%r15) */ * 0 | Operands equal | 8
EMIT4_DISP(0x50c0f000, * 1 | First operand low | 4
(jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); * 2 | First operand high | 2
break; * 3 | Unused | 1
case BPF_ANC | SKF_AD_PROTOCOL: /* A = ntohs(skb->protocol); */ *
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, protocol) != 2); * For s390x relative branches: ip = ip + off_bytes
/* lhi %r5,0 */ * For BPF relative branches: insn = insn + off_insns + 1
EMIT4(0xa7580000); *
/* icm %r5,3,<d(protocol)>(%r2) */ * For example for s390x with offset 0 we jump to the branch
EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, protocol)); * instruction itself (loop) and for BPF with offset 0 we
break; * branch to the instruction behind the branch.
case BPF_ANC | SKF_AD_IFINDEX: /* if (!skb->dev) return 0; */
* A = skb->dev->ifindex */ case BPF_JMP | BPF_JA: /* if (true) */
BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, ifindex) != 4); mask = 0xf000; /* j */
jit->seen |= SEEN_RET0; goto branch_oc;
/* lg %r1,<d(dev)>(%r2) */ case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); mask = 0x2000; /* jh */
/* ltgr %r1,%r1 */ goto branch_ks;
EMIT4(0xb9020011); case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
/* jz <ret0> */ mask = 0xa000; /* jhe */
EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); goto branch_ks;
/* l %r5,<d(ifindex)>(%r1) */ case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
EMIT4_DISP(0x58501000, offsetof(struct net_device, ifindex)); mask = 0x2000; /* jh */
break; goto branch_ku;
case BPF_ANC | SKF_AD_MARK: /* A = skb->mark */ case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4); mask = 0xa000; /* jhe */
/* l %r5,<d(mark)>(%r2) */ goto branch_ku;
EMIT4_DISP(0x58502000, offsetof(struct sk_buff, mark)); case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
break; mask = 0x7000; /* jne */
case BPF_ANC | SKF_AD_QUEUE: /* A = skb->queue_mapping */ goto branch_ku;
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, queue_mapping) != 2); case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
/* lhi %r5,0 */ mask = 0x8000; /* je */
EMIT4(0xa7580000); goto branch_ku;
/* icm %r5,3,<d(queue_mapping)>(%r2) */ case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, queue_mapping)); mask = 0x7000; /* jnz */
break; /* lgfi %w1,imm (load sign extend imm) */
case BPF_ANC | SKF_AD_HATYPE: /* if (!skb->dev) return 0; EMIT6_IMM(0xc0010000, REG_W1, imm);
* A = skb->dev->type */ /* ngr %w1,%dst */
BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, type) != 2); EMIT4(0xb9800000, REG_W1, dst_reg);
jit->seen |= SEEN_RET0; goto branch_oc;
/* lg %r1,<d(dev)>(%r2) */
EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
/* ltgr %r1,%r1 */ mask = 0x2000; /* jh */
EMIT4(0xb9020011); goto branch_xs;
/* jz <ret0> */ case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); mask = 0xa000; /* jhe */
/* lhi %r5,0 */ goto branch_xs;
EMIT4(0xa7580000); case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
/* icm %r5,3,<d(type)>(%r1) */ mask = 0x2000; /* jh */
EMIT4_DISP(0xbf531000, offsetof(struct net_device, type)); goto branch_xu;
break; case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
case BPF_ANC | SKF_AD_RXHASH: /* A = skb->hash */ mask = 0xa000; /* jhe */
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4); goto branch_xu;
/* l %r5,<d(hash)>(%r2) */ case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
EMIT4_DISP(0x58502000, offsetof(struct sk_buff, hash)); mask = 0x7000; /* jne */
break; goto branch_xu;
case BPF_ANC | SKF_AD_VLAN_TAG: case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT: mask = 0x8000; /* je */
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2); goto branch_xu;
BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000); case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
/* lhi %r5,0 */ mask = 0x7000; /* jnz */
EMIT4(0xa7580000); /* ngrk %w1,%dst,%src */
/* icm %r5,3,<d(vlan_tci)>(%r2) */ EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, vlan_tci)); goto branch_oc;
if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) { branch_ks:
/* nill %r5,0xefff */ /* lgfi %w1,imm (load sign extend imm) */
EMIT4_IMM(0xa5570000, ~VLAN_TAG_PRESENT); EMIT6_IMM(0xc0010000, REG_W1, imm);
} else { /* cgrj %dst,%w1,mask,off */
/* nill %r5,0x1000 */ EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
EMIT4_IMM(0xa5570000, VLAN_TAG_PRESENT); break;
/* srl %r5,12 */ branch_ku:
EMIT4_DISP(0x88500000, 12); /* lgfi %w1,imm (load sign extend imm) */
} EMIT6_IMM(0xc0010000, REG_W1, imm);
/* clgrj %dst,%w1,mask,off */
EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
break;
branch_xs:
/* cgrj %dst,%src,mask,off */
EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
break;
branch_xu:
/* clgrj %dst,%src,mask,off */
EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
break; break;
case BPF_ANC | SKF_AD_PKTTYPE: branch_oc:
/* lhi %r5,0 */ /* brc mask,jmp_off (branch instruction needs 4 bytes) */
EMIT4(0xa7580000); jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
/* ic %r5,<d(pkt_type_offset)>(%r2) */ EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
EMIT4_DISP(0x43502000, PKT_TYPE_OFFSET()); break;
/* srl %r5,5 */ /*
EMIT4_DISP(0x88500000, 5); * BPF_LD
break; */
case BPF_ANC | SKF_AD_CPU: /* A = smp_processor_id() */ case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
#ifdef CONFIG_SMP case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
/* l %r5,<d(cpu_nr)> */ if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
EMIT4_DISP(0x58500000, offsetof(struct _lowcore, cpu_nr)); func_addr = __pa(sk_load_byte_pos);
#else else
/* lhi %r5,0 */ func_addr = __pa(sk_load_byte);
EMIT4(0xa7580000); goto call_fn;
#endif case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
func_addr = __pa(sk_load_half_pos);
else
func_addr = __pa(sk_load_half);
goto call_fn;
case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
func_addr = __pa(sk_load_word_pos);
else
func_addr = __pa(sk_load_word);
goto call_fn;
call_fn:
jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
REG_SET_SEEN(REG_14); /* Return address of possible func call */
/*
* Implicit input:
* BPF_REG_6 (R7) : skb pointer
* REG_SKB_DATA (R12): skb data pointer
*
* Calculated input:
* BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
* BPF_REG_5 (R6) : return address
*
* Output:
* BPF_REG_0 (R14): data read from skb
*
* Scratch registers (BPF_REG_1-5)
*/
/* Call function: llilf %w1,func_addr */
EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
/* Offset: lgfi %b2,imm */
EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
if (BPF_MODE(insn->code) == BPF_IND)
/* agfr %b2,%src (%src is s32 here) */
EMIT4(0xb9180000, BPF_REG_2, src_reg);
/* basr %b5,%w1 (%b5 is call saved) */
EMIT2(0x0d00, BPF_REG_5, REG_W1);
/*
* Note: For fast access we jump directly after the
* jnz instruction from bpf_jit.S
*/
/* jnz <ret0> */
EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
break; break;
default: /* too complex, give up */ default: /* too complex, give up */
goto out; pr_err("Unknown opcode %02x\n", insn->code);
return -1;
} }
addrs[i] = jit->prg - jit->start; return insn_count;
return 0; }
out:
/*
* Compile eBPF program into s390x code
*/
static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
{
int i, insn_count;
jit->lit = jit->lit_start;
jit->prg = 0;
bpf_jit_prologue(jit);
for (i = 0; i < fp->len; i += insn_count) {
insn_count = bpf_jit_insn(jit, fp, i);
if (insn_count < 0)
return -1; return -1;
jit->addrs[i + 1] = jit->prg; /* Next instruction address */
}
bpf_jit_epilogue(jit);
jit->lit_start = jit->prg;
jit->size = jit->lit;
jit->size_prg = jit->prg;
return 0;
} }
/*
* Classic BPF function stub. BPF programs will be converted into
* eBPF and then bpf_int_jit_compile() will be called.
*/
void bpf_jit_compile(struct bpf_prog *fp) void bpf_jit_compile(struct bpf_prog *fp)
{ {
struct bpf_binary_header *header = NULL; }
unsigned long size, prg_len, lit_len;
struct bpf_jit jit, cjit; /*
unsigned int *addrs; * Compile eBPF program "fp"
int pass, i; */
void bpf_int_jit_compile(struct bpf_prog *fp)
{
struct bpf_binary_header *header;
struct bpf_jit jit;
int pass;
if (!bpf_jit_enable) if (!bpf_jit_enable)
return; return;
addrs = kcalloc(fp->len, sizeof(*addrs), GFP_KERNEL); memset(&jit, 0, sizeof(jit));
if (addrs == NULL) jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
if (jit.addrs == NULL)
return; return;
memset(&jit, 0, sizeof(cjit)); /*
memset(&cjit, 0, sizeof(cjit)); * Three initial passes:
* - 1/2: Determine clobbered registers
for (pass = 0; pass < 10; pass++) { * - 3: Calculate program size and addrs arrray
jit.prg = jit.start; */
jit.lit = jit.mid; for (pass = 1; pass <= 3; pass++) {
if (bpf_jit_prog(&jit, fp))
bpf_jit_prologue(&jit); goto free_addrs;
bpf_jit_noleaks(&jit, fp->insns);
for (i = 0; i < fp->len; i++) {
if (bpf_jit_insn(&jit, fp->insns + i, addrs, i,
i == fp->len - 1))
goto out;
} }
bpf_jit_epilogue(&jit); /*
if (jit.start) { * Final pass: Allocate and generate program
WARN_ON(jit.prg > cjit.prg || jit.lit > cjit.lit); */
if (memcmp(&jit, &cjit, sizeof(jit)) == 0) if (jit.size >= BPF_SIZE_MAX)
break; goto free_addrs;
} else if (jit.prg == cjit.prg && jit.lit == cjit.lit) { header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
prg_len = jit.prg - jit.start;
lit_len = jit.lit - jit.mid;
size = prg_len + lit_len;
if (size >= BPF_SIZE_MAX)
goto out;
header = bpf_jit_binary_alloc(size, &jit.start,
2, bpf_jit_fill_hole);
if (!header) if (!header)
goto out; goto free_addrs;
jit.prg = jit.mid = jit.start + prg_len; if (bpf_jit_prog(&jit, fp))
jit.lit = jit.end = jit.start + prg_len + lit_len; goto free_addrs;
jit.base_ip += (unsigned long) jit.start;
jit.exit_ip += (unsigned long) jit.start;
jit.ret0_ip += (unsigned long) jit.start;
}
cjit = jit;
}
if (bpf_jit_enable > 1) { if (bpf_jit_enable > 1) {
bpf_jit_dump(fp->len, jit.end - jit.start, pass, jit.start); bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
if (jit.start) if (jit.prg_buf)
print_fn_code(jit.start, jit.mid - jit.start); print_fn_code(jit.prg_buf, jit.size_prg);
} }
if (jit.start) { if (jit.prg_buf) {
set_memory_ro((unsigned long)header, header->pages); set_memory_ro((unsigned long)header, header->pages);
fp->bpf_func = (void *) jit.start; fp->bpf_func = (void *) jit.prg_buf;
fp->jited = true; fp->jited = true;
} }
out: free_addrs:
kfree(addrs); kfree(jit.addrs);
} }
/*
* Free eBPF program
*/
void bpf_jit_free(struct bpf_prog *fp) void bpf_jit_free(struct bpf_prog *fp)
{ {
unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
......
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