Commit 082ab8ff authored by Laurent Pinchart's avatar Laurent Pinchart

sh-pfc: sh7786: Remove unused input_pu range

The PFC SH7786 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7786 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
parent 2afb9681
...@@ -60,25 +60,6 @@ enum { ...@@ -60,25 +60,6 @@ enum {
PJ3_IN, PJ2_IN, PJ1_IN, PJ3_IN, PJ2_IN, PJ1_IN,
PINMUX_INPUT_END, PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
PE7_IN_PU, PE6_IN_PU,
PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
PINMUX_INPUT_PULLUP_END,
PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_BEGIN,
PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT, PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT, PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
...@@ -194,82 +175,82 @@ enum { ...@@ -194,82 +175,82 @@ enum {
static const pinmux_enum_t pinmux_data[] = { static const pinmux_enum_t pinmux_data[] = {
/* PA GPIO */ /* PA GPIO */
PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU), PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU), PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU), PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU), PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU), PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU), PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU), PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
/* PB GPIO */ /* PB GPIO */
PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU), PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU), PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU), PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU), PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU), PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU), PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU), PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU), PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
/* PC GPIO */ /* PC GPIO */
PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU), PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU), PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU), PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU), PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU), PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU), PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU), PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU), PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
/* PD GPIO */ /* PD GPIO */
PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU), PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU), PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU), PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU), PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU), PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU), PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU), PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU), PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
/* PE GPIO */ /* PE GPIO */
PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU), PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU), PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
/* PF GPIO */ /* PF GPIO */
PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU), PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU), PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU), PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU), PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU), PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU), PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU), PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU), PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
/* PG GPIO */ /* PG GPIO */
PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU), PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU), PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU), PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
/* PH GPIO */ /* PH GPIO */
PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU), PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU), PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU), PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU), PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU), PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU), PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU), PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU), PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
/* PJ GPIO */ /* PJ GPIO */
PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU), PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU), PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU), PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU), PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU), PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU), PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU), PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
/* PA FN */ /* PA FN */
PINMUX_DATA(CDE_MARK, P1MSEL2_0, PA7_FN), PINMUX_DATA(CDE_MARK, P1MSEL2_0, PA7_FN),
...@@ -651,48 +632,48 @@ static const struct pinmux_func pinmux_func_gpios[] = { ...@@ -651,48 +632,48 @@ static const struct pinmux_func pinmux_func_gpios[] = {
static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) { { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA7_FN, PA7_OUT, PA7_IN, 0,
PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, PA6_FN, PA6_OUT, PA6_IN, 0,
PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU, PA5_FN, PA5_OUT, PA5_IN, 0,
PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU, PA4_FN, PA4_OUT, PA4_IN, 0,
PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU, PA3_FN, PA3_OUT, PA3_IN, 0,
PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU, PA2_FN, PA2_OUT, PA2_IN, 0,
PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU, PA1_FN, PA1_OUT, PA1_IN, 0,
PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU } PA0_FN, PA0_OUT, PA0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) { { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU, PB7_FN, PB7_OUT, PB7_IN, 0,
PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU, PB6_FN, PB6_OUT, PB6_IN, 0,
PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU, PB5_FN, PB5_OUT, PB5_IN, 0,
PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU, PB4_FN, PB4_OUT, PB4_IN, 0,
PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU, PB3_FN, PB3_OUT, PB3_IN, 0,
PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU, PB2_FN, PB2_OUT, PB2_IN, 0,
PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU, PB1_FN, PB1_OUT, PB1_IN, 0,
PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU } PB0_FN, PB0_OUT, PB0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) { { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU, PC7_FN, PC7_OUT, PC7_IN, 0,
PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU, PC6_FN, PC6_OUT, PC6_IN, 0,
PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU, PC5_FN, PC5_OUT, PC5_IN, 0,
PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU, PC4_FN, PC4_OUT, PC4_IN, 0,
PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU, PC3_FN, PC3_OUT, PC3_IN, 0,
PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU, PC2_FN, PC2_OUT, PC2_IN, 0,
PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU, PC1_FN, PC1_OUT, PC1_IN, 0,
PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU } PC0_FN, PC0_OUT, PC0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) { { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU, PD7_FN, PD7_OUT, PD7_IN, 0,
PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU, PD6_FN, PD6_OUT, PD6_IN, 0,
PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU, PD5_FN, PD5_OUT, PD5_IN, 0,
PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU, PD4_FN, PD4_OUT, PD4_IN, 0,
PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU, PD3_FN, PD3_OUT, PD3_IN, 0,
PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU, PD2_FN, PD2_OUT, PD2_IN, 0,
PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU, PD1_FN, PD1_OUT, PD1_IN, 0,
PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU } PD0_FN, PD0_OUT, PD0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) { { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU, PE7_FN, PE7_OUT, PE7_IN, 0,
PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU, PE6_FN, PE6_OUT, PE6_IN, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
...@@ -701,19 +682,19 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -701,19 +682,19 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0, 0, 0, 0, } 0, 0, 0, 0, }
}, },
{ PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) { { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU, PF7_FN, PF7_OUT, PF7_IN, 0,
PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU, PF6_FN, PF6_OUT, PF6_IN, 0,
PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU, PF5_FN, PF5_OUT, PF5_IN, 0,
PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU, PF4_FN, PF4_OUT, PF4_IN, 0,
PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU, PF3_FN, PF3_OUT, PF3_IN, 0,
PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU, PF2_FN, PF2_OUT, PF2_IN, 0,
PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU, PF1_FN, PF1_OUT, PF1_IN, 0,
PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU } PF0_FN, PF0_OUT, PF0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) { { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU, PG7_FN, PG7_OUT, PG7_IN, 0,
PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU, PG6_FN, PG6_OUT, PG6_IN, 0,
PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU, PG5_FN, PG5_OUT, PG5_IN, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
...@@ -721,23 +702,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { ...@@ -721,23 +702,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0, 0, 0, 0, } 0, 0, 0, 0, }
}, },
{ PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) { { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU, PH7_FN, PH7_OUT, PH7_IN, 0,
PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU, PH6_FN, PH6_OUT, PH6_IN, 0,
PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU, PH5_FN, PH5_OUT, PH5_IN, 0,
PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU, PH4_FN, PH4_OUT, PH4_IN, 0,
PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU, PH3_FN, PH3_OUT, PH3_IN, 0,
PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU, PH2_FN, PH2_OUT, PH2_IN, 0,
PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU, PH1_FN, PH1_OUT, PH1_IN, 0,
PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU } PH0_FN, PH0_OUT, PH0_IN, 0 }
}, },
{ PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) { { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU, PJ7_FN, PJ7_OUT, PJ7_IN, 0,
PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU, PJ6_FN, PJ6_OUT, PJ6_IN, 0,
PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU, PJ5_FN, PJ5_OUT, PJ5_IN, 0,
PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU, PJ4_FN, PJ4_OUT, PJ4_IN, 0,
PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU, PJ3_FN, PJ3_OUT, PJ3_IN, 0,
PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU, PJ2_FN, PJ2_OUT, PJ2_IN, 0,
PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU, PJ1_FN, PJ1_OUT, PJ1_IN, 0,
0, 0, 0, 0, } 0, 0, 0, 0, }
}, },
{ PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) { { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
...@@ -822,7 +803,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = { ...@@ -822,7 +803,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
const struct sh_pfc_soc_info sh7786_pinmux_info = { const struct sh_pfc_soc_info sh7786_pinmux_info = {
.name = "sh7786_pfc", .name = "sh7786_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
......
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