Commit 098fde11 authored by chas williams - CONTRACTOR's avatar chas williams - CONTRACTOR Committed by David S. Miller

atm: [nicstar] reformatted with Lindent

Signed-off-by: default avatarChas Williams - CONTRACTOR <chas@cmf.nrl.navy.mil>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 741a00be
/******************************************************************************
*
/*
* nicstar.c
*
* Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
......@@ -16,12 +15,10 @@
*
*
* (C) INESC 1999
*
*
******************************************************************************/
*/
/**** IMPORTANT INFORMATION ***************************************************
/*
* IMPORTANT INFORMATION
*
* There are currently three types of spinlocks:
*
......@@ -31,9 +28,9 @@
*
* These must NEVER be grabbed in reverse order.
*
******************************************************************************/
*/
/* Header files ***************************************************************/
/* Header files */
#include <linux/module.h>
#include <linux/kernel.h>
......@@ -65,12 +62,11 @@
# error FIXME: this driver requires a 32-bit platform
#endif
/* Additional code ************************************************************/
/* Additional code */
#include "nicstarmac.c"
/* Configurable parameters ****************************************************/
/* Configurable parameters */
#undef PHY_LOOPBACK
#undef TX_DEBUG
......@@ -81,8 +77,7 @@
#undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
you're going to use only raw ATM */
/* Do not touch these *********************************************************/
/* Do not touch these */
#ifdef TX_DEBUG
#define TXPRINTK(args...) printk(args)
......@@ -108,8 +103,7 @@
#define XPRINTK(args...)
#endif /* EXTRA_DEBUG */
/* Macros *********************************************************************/
/* Macros */
#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
......@@ -126,40 +120,40 @@
#define ATM_SKB(s) (&(s)->atm)
#endif
/* Function declarations */
/* Function declarations ******************************************************/
static u32 ns_read_sram(ns_dev *card, u32 sram_address);
static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
static u32 ns_read_sram(ns_dev * card, u32 sram_address);
static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
int count);
static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
static void __devinit ns_init_card_error(ns_dev *card, int error);
static void __devinit ns_init_card_error(ns_dev * card, int error);
static scq_info *get_scq(int size, u32 scd);
static void free_scq(scq_info *scq, struct atm_vcc *vcc);
static void free_scq(scq_info * scq, struct atm_vcc *vcc);
static void push_rxbufs(ns_dev *, struct sk_buff *);
static irqreturn_t ns_irq_handler(int irq, void *dev_id);
static int ns_open(struct atm_vcc *vcc);
static void ns_close(struct atm_vcc *vcc);
static void fill_tst(ns_dev *card, int n, vc_map *vc);
static void fill_tst(ns_dev * card, int n, vc_map * vc);
static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
struct sk_buff *skb);
static void process_tsq(ns_dev *card);
static void drain_scq(ns_dev *card, scq_info *scq, int pos);
static void process_rsq(ns_dev *card);
static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
static void process_tsq(ns_dev * card);
static void drain_scq(ns_dev * card, scq_info * scq, int pos);
static void process_rsq(ns_dev * card);
static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
#ifdef NS_USE_DESTRUCTORS
static void ns_sb_destructor(struct sk_buff *sb);
static void ns_lb_destructor(struct sk_buff *lb);
static void ns_hb_destructor(struct sk_buff *hb);
#endif /* NS_USE_DESTRUCTORS */
static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
static void which_list(ns_dev *card, struct sk_buff *skb);
static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
static void which_list(ns_dev * card, struct sk_buff *skb);
static void ns_poll(unsigned long arg);
static int ns_parse_mac(char *mac, unsigned char *esi);
static short ns_h2i(char c);
......@@ -167,14 +161,11 @@ static void ns_phy_put(struct atm_dev *dev, unsigned char value,
unsigned long addr);
static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
/* Global variables ***********************************************************/
/* Global variables */
static struct ns_dev *cards[NS_MAX_CARDS];
static unsigned num_cards;
static struct atmdev_ops atm_ops =
{
static struct atmdev_ops atm_ops = {
.open = ns_open,
.close = ns_close,
.ioctl = ns_ioctl,
......@@ -184,13 +175,13 @@ static struct atmdev_ops atm_ops =
.proc_read = ns_proc_read,
.owner = THIS_MODULE,
};
static struct timer_list ns_timer;
static char *mac[NS_MAX_CARDS];
module_param_array(mac, charp, NULL, 0);
MODULE_LICENSE("GPL");
/* Functions*******************************************************************/
/* Functions */
static int __devinit nicstar_init_one(struct pci_dev *pcidev,
const struct pci_device_id *ent)
......@@ -212,8 +203,6 @@ static int __devinit nicstar_init_one(struct pci_dev *pcidev,
return -ENODEV;
}
static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
{
int i, j;
......@@ -243,16 +232,15 @@ static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
/* Free up resources */
j = 0;
PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
{
while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
dev_kfree_skb_any(hb);
j++;
}
PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
j = 0;
PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
{
PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
card->iovpool.count);
while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
dev_kfree_skb_any(iovb);
j++;
}
......@@ -262,8 +250,7 @@ static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
dev_kfree_skb_any(sb);
free_scq(card->scq0, NULL);
for (j = 0; j < NS_FRSCD_NUM; j++)
{
for (j = 0; j < NS_FRSCD_NUM; j++) {
if (card->scd2vc[j] != NULL)
free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
}
......@@ -274,17 +261,13 @@ static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
kfree(card);
}
static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
{
static struct pci_device_id nicstar_pci_tbl[] __devinitdata = {
{PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0,} /* terminate list */
};
MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
static struct pci_driver nicstar_driver = {
.name = "nicstar",
......@@ -293,8 +276,6 @@ static struct pci_driver nicstar_driver = {
.remove = __devexit_p(nicstar_remove_one),
};
static int __init nicstar_init(void)
{
unsigned error = 0; /* Initialized to remove compile warning */
......@@ -322,8 +303,6 @@ static int __init nicstar_init(void)
return error;
}
static void __exit nicstar_cleanup(void)
{
XPRINTK("nicstar: nicstar_cleanup() called.\n");
......@@ -335,9 +314,7 @@ static void __exit nicstar_cleanup(void)
XPRINTK("nicstar: nicstar_cleanup() returned.\n");
}
static u32 ns_read_sram(ns_dev *card, u32 sram_address)
static u32 ns_read_sram(ns_dev * card, u32 sram_address)
{
unsigned long flags;
u32 data;
......@@ -345,17 +322,16 @@ static u32 ns_read_sram(ns_dev *card, u32 sram_address)
sram_address &= 0x0007FFFC; /* address must be dword aligned */
sram_address |= 0x50000000; /* SRAM read command */
spin_lock_irqsave(&card->res_lock, flags);
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(sram_address, card->membase + CMD);
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
data = readl(card->membase + DR0);
spin_unlock_irqrestore(&card->res_lock, flags);
return data;
}
static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
int count)
{
unsigned long flags;
int i, c;
......@@ -363,7 +339,7 @@ static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
c = count;
c <<= 2; /* to use increments of 4 */
spin_lock_irqsave(&card->res_lock, flags);
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
for (i = 0; i <= c; i += 4)
writel(*(value++), card->membase + i);
/* Note: DR# registers are the first 4 dwords in nicstar's memspace,
......@@ -375,7 +351,6 @@ static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
spin_unlock_irqrestore(&card->res_lock, flags);
}
static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
{
int j;
......@@ -390,17 +365,17 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
error = 0;
if (pci_enable_device(pcidev))
{
if (pci_enable_device(pcidev)) {
printk("nicstar%d: can't enable PCI device\n", i);
error = 2;
ns_init_card_error(card, error);
return error;
}
if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
{
printk("nicstar%d: can't allocate memory for device structure.\n", i);
if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
printk
("nicstar%d: can't allocate memory for device structure.\n",
i);
error = 2;
ns_init_card_error(card, error);
return error;
......@@ -416,9 +391,8 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
card->pcidev = pcidev;
membase = pci_resource_start(pcidev, 1);
card->membase = ioremap(membase, NS_IOREMAP_SIZE);
if (!card->membase)
{
printk("nicstar%d: can't ioremap() membase.\n",i);
if (!card->membase) {
printk("nicstar%d: can't ioremap() membase.\n", i);
error = 3;
ns_init_card_error(card, error);
return error;
......@@ -427,25 +401,25 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
pci_set_master(pcidev);
if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
{
if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
printk("nicstar%d: can't read PCI latency timer.\n", i);
error = 6;
ns_init_card_error(card, error);
return error;
}
#ifdef NS_PCI_LATENCY
if (pci_latency < NS_PCI_LATENCY)
{
PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
for (j = 1; j < 4; j++)
{
if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
if (pci_latency < NS_PCI_LATENCY) {
PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
NS_PCI_LATENCY);
for (j = 1; j < 4; j++) {
if (pci_write_config_byte
(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
break;
}
if (j == 4)
{
printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
if (j == 4) {
printk
("nicstar%d: can't set PCI latency timer to %d.\n",
i, NS_PCI_LATENCY);
error = 7;
ns_init_card_error(card, error);
return error;
......@@ -468,26 +442,26 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
NS_DELAY;
writel(0x00000001, card->membase + GP);
NS_DELAY;
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
NS_DELAY;
/* Detect PHY type */
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
data = readl(card->membase + DR0);
switch(data) {
switch (data) {
case 0x00000009:
printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
card->max_pcr = ATM_25_PCR;
while(CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(0x00000008, card->membase + DR0);
writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
/* Clear an eventual pending interrupt */
writel(NS_STAT_SFBQF, card->membase + STAT);
#ifdef PHY_LOOPBACK
while(CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(0x00000022, card->membase + DR0);
writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
#endif /* PHY_LOOPBACK */
......@@ -497,7 +471,7 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
card->max_pcr = ATM_OC3_PCR;
#ifdef PHY_LOOPBACK
while(CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(0x00000002, card->membase + DR0);
writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
#endif /* PHY_LOOPBACK */
......@@ -526,11 +500,14 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
#if (NS_MAX_RCTSIZE == 4096)
if (card->sram_size == 128)
printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
printk
("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
i);
#elif (NS_MAX_RCTSIZE == 16384)
if (card->sram_size == 32)
{
printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
if (card->sram_size == 32) {
printk
("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
i);
card->rct_size = 4096;
}
#else
......@@ -552,33 +529,34 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
/* Initialize TSQ */
card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
if (card->tsq.org == NULL)
{
if (card->tsq.org == NULL) {
printk("nicstar%d: can't allocate TSQ.\n", i);
error = 10;
ns_init_card_error(card, error);
return error;
}
card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
card->tsq.base =
(ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
card->tsq.next = card->tsq.base;
card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
ns_tsi_init(card->tsq.base + j);
writel(0x00000000, card->membase + TSQH);
writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
(u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i,
(u32) card->tsq.base, (u32) virt_to_bus(card->tsq.base),
readl(card->membase + TSQB));
/* Initialize RSQ */
card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
if (card->rsq.org == NULL)
{
if (card->rsq.org == NULL) {
printk("nicstar%d: can't allocate RSQ.\n", i);
error = 11;
ns_init_card_error(card, error);
return error;
}
card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
card->rsq.base =
(ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
card->rsq.next = card->rsq.base;
card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
......@@ -591,8 +569,7 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
card->scq1 = NULL;
card->scq2 = NULL;
card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
if (card->scq0 == NULL)
{
if (card->scq0 == NULL) {
printk("nicstar%d: can't get SCQ0.\n", i);
error = 12;
ns_init_card_error(card, error);
......@@ -606,7 +583,8 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
card->scq0->scd = NS_VRSCD0;
PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i,
(u32) card->scq0->base);
/* Initialize TSTs */
card->tst_addr = NS_TST0;
......@@ -624,7 +602,6 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
card->tste2vc[j] = NULL;
writel(NS_TST0 << 2, card->membase + TSTB);
/* Initialize RCT. AAL type is set on opening the VC. */
#ifdef RCQ_SUPPORT
u32d[0] = NS_RCTE_RAWCELLINTEN;
......@@ -666,13 +643,12 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
/* Pre-allocate some huge buffers */
skb_queue_head_init(&card->hbpool.queue);
card->hbpool.count = 0;
for (j = 0; j < NUM_HB; j++)
{
for (j = 0; j < NUM_HB; j++) {
struct sk_buff *hb;
hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
if (hb == NULL)
{
printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
if (hb == NULL) {
printk
("nicstar%d: can't allocate %dth of %d huge buffers.\n",
i, j, NUM_HB);
error = 13;
ns_init_card_error(card, error);
......@@ -683,17 +659,15 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
card->hbpool.count++;
}
/* Allocate large buffers */
skb_queue_head_init(&card->lbpool.queue);
card->lbpool.count = 0; /* Not used */
for (j = 0; j < NUM_LB; j++)
{
for (j = 0; j < NUM_LB; j++) {
struct sk_buff *lb;
lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
if (lb == NULL)
{
printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
if (lb == NULL) {
printk
("nicstar%d: can't allocate %dth of %d large buffers.\n",
i, j, NUM_LB);
error = 14;
ns_init_card_error(card, error);
......@@ -704,33 +678,31 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
skb_reserve(lb, NS_SMBUFSIZE);
push_rxbufs(card, lb);
/* Due to the implementation of push_rxbufs() this is 1, not 0 */
if (j == 1)
{
if (j == 1) {
card->rcbuf = lb;
card->rawch = (u32) virt_to_bus(lb->data);
}
}
/* Test for strange behaviour which leads to crashes */
if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
{
printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
if ((bcount =
ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
printk
("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
i, j, bcount);
error = 14;
ns_init_card_error(card, error);
return error;
}
/* Allocate small buffers */
skb_queue_head_init(&card->sbpool.queue);
card->sbpool.count = 0; /* Not used */
for (j = 0; j < NUM_SB; j++)
{
for (j = 0; j < NUM_SB; j++) {
struct sk_buff *sb;
sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
if (sb == NULL)
{
printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
if (sb == NULL) {
printk
("nicstar%d: can't allocate %dth of %d small buffers.\n",
i, j, NUM_SB);
error = 15;
ns_init_card_error(card, error);
......@@ -742,26 +714,25 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
push_rxbufs(card, sb);
}
/* Test for strange behaviour which leads to crashes */
if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
{
printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
if ((bcount =
ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
printk
("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
i, j, bcount);
error = 15;
ns_init_card_error(card, error);
return error;
}
/* Allocate iovec buffers */
skb_queue_head_init(&card->iovpool.queue);
card->iovpool.count = 0;
for (j = 0; j < NUM_IOVB; j++)
{
for (j = 0; j < NUM_IOVB; j++) {
struct sk_buff *iovb;
iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
if (iovb == NULL)
{
printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
if (iovb == NULL) {
printk
("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
i, j, NUM_IOVB);
error = 16;
ns_init_card_error(card, error);
......@@ -781,8 +752,9 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
card->efbie = 1;
card->intcnt = 0;
if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
{
if (request_irq
(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED,
"nicstar", card) != 0) {
printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
error = 9;
ns_init_card_error(card, error);
......@@ -791,8 +763,7 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
/* Register device */
card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
if (card->atmdev == NULL)
{
if (card->atmdev == NULL) {
printk("nicstar%d: can't register device.\n", i);
error = 17;
ns_init_card_error(card, error);
......@@ -802,8 +773,10 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
if (ns_parse_mac(mac[i], card->atmdev->esi)) {
nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
card->atmdev->esi, 6);
if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) ==
0) {
nicstar_read_eprom(card->membase,
NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
card->atmdev->esi, 6);
}
}
......@@ -829,85 +802,59 @@ static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
if (card->atmdev->phy && card->atmdev->phy->start)
card->atmdev->phy->start(card->atmdev);
writel(NS_CFG_RXPATH |
NS_CFG_SMBUFSIZE |
NS_CFG_LGBUFSIZE |
NS_CFG_EFBIE |
NS_CFG_RSQSIZE |
NS_CFG_VPIBITS |
ns_cfg_rctsize |
NS_CFG_RXINT_NODELAY |
NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
NS_CFG_RSQAFIE |
NS_CFG_TXEN |
NS_CFG_TXIE |
NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
NS_CFG_PHYIE,
card->membase + CFG);
writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
NS_CFG_PHYIE, card->membase + CFG);
num_cards++;
return error;
}
static void __devinit ns_init_card_error(ns_dev *card, int error)
static void __devinit ns_init_card_error(ns_dev * card, int error)
{
if (error >= 17)
{
if (error >= 17) {
writel(0x00000000, card->membase + CFG);
}
if (error >= 16)
{
if (error >= 16) {
struct sk_buff *iovb;
while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
dev_kfree_skb_any(iovb);
}
if (error >= 15)
{
if (error >= 15) {
struct sk_buff *sb;
while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
dev_kfree_skb_any(sb);
free_scq(card->scq0, NULL);
}
if (error >= 14)
{
if (error >= 14) {
struct sk_buff *lb;
while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
dev_kfree_skb_any(lb);
}
if (error >= 13)
{
if (error >= 13) {
struct sk_buff *hb;
while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
dev_kfree_skb_any(hb);
}
if (error >= 12)
{
if (error >= 12) {
kfree(card->rsq.org);
}
if (error >= 11)
{
if (error >= 11) {
kfree(card->tsq.org);
}
if (error >= 10)
{
if (error >= 10) {
free_irq(card->pcidev->irq, card);
}
if (error >= 4)
{
if (error >= 4) {
iounmap(card->membase);
}
if (error >= 3)
{
if (error >= 3) {
pci_disable_device(card->pcidev);
kfree(card);
}
}
static scq_info *get_scq(int size, u32 scd)
{
scq_info *scq;
......@@ -920,15 +867,13 @@ static scq_info *get_scq(int size, u32 scd)
if (scq == NULL)
return NULL;
scq->org = kmalloc(2 * size, GFP_KERNEL);
if (scq->org == NULL)
{
if (scq->org == NULL) {
kfree(scq);
return NULL;
}
scq->skb = kmalloc(sizeof(struct sk_buff *) *
(size / NS_SCQE_SIZE), GFP_KERNEL);
if (scq->skb == NULL)
{
if (scq->skb == NULL) {
kfree(scq->org);
kfree(scq);
return NULL;
......@@ -951,38 +896,30 @@ static scq_info *get_scq(int size, u32 scd)
return scq;
}
/* For variable rate SCQ vcc must be NULL */
static void free_scq(scq_info *scq, struct atm_vcc *vcc)
static void free_scq(scq_info * scq, struct atm_vcc *vcc)
{
int i;
if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
for (i = 0; i < scq->num_entries; i++)
{
if (scq->skb[i] != NULL)
{
for (i = 0; i < scq->num_entries; i++) {
if (scq->skb[i] != NULL) {
vcc = ATM_SKB(scq->skb[i])->vcc;
if (vcc->pop != NULL)
vcc->pop(vcc, scq->skb[i]);
else
dev_kfree_skb_any(scq->skb[i]);
}
}
else /* vcc must be != NULL */
{
if (vcc == NULL)
{
printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
} else { /* vcc must be != NULL */
if (vcc == NULL) {
printk
("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
for (i = 0; i < scq->num_entries; i++)
dev_kfree_skb_any(scq->skb[i]);
}
else
for (i = 0; i < scq->num_entries; i++)
{
if (scq->skb[i] != NULL)
{
} else
for (i = 0; i < scq->num_entries; i++) {
if (scq->skb[i] != NULL) {
if (vcc->pop != NULL)
vcc->pop(vcc, scq->skb[i]);
else
......@@ -995,11 +932,9 @@ static void free_scq(scq_info *scq, struct atm_vcc *vcc)
kfree(scq);
}
/* The handles passed must be pointers to the sk_buff containing the small
or large buffer(s) cast to u32. */
static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
{
struct ns_skb_cb *cb = NS_SKB_CB(skb);
u32 handle1, addr1;
......@@ -1009,110 +944,101 @@ static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
/* *BARF* */
handle2 = addr2 = 0;
handle1 = (u32)skb;
addr1 = (u32)virt_to_bus(skb->data);
handle1 = (u32) skb;
addr1 = (u32) virt_to_bus(skb->data);
#ifdef GENERAL_DEBUG
if (!addr1)
printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
card->index);
#endif /* GENERAL_DEBUG */
stat = readl(card->membase + STAT);
card->sbfqc = ns_stat_sfbqc_get(stat);
card->lbfqc = ns_stat_lfbqc_get(stat);
if (cb->buf_type == BUF_SM)
{
if (!addr2)
{
if (card->sm_addr)
{
if (cb->buf_type == BUF_SM) {
if (!addr2) {
if (card->sm_addr) {
addr2 = card->sm_addr;
handle2 = card->sm_handle;
card->sm_addr = 0x00000000;
card->sm_handle = 0x00000000;
}
else /* (!sm_addr) */
{
} else { /* (!sm_addr) */
card->sm_addr = addr1;
card->sm_handle = handle1;
}
}
}
else /* buf_type == BUF_LG */
{
if (!addr2)
{
if (card->lg_addr)
{
} else { /* buf_type == BUF_LG */
if (!addr2) {
if (card->lg_addr) {
addr2 = card->lg_addr;
handle2 = card->lg_handle;
card->lg_addr = 0x00000000;
card->lg_handle = 0x00000000;
}
else /* (!lg_addr) */
{
} else { /* (!lg_addr) */
card->lg_addr = addr1;
card->lg_handle = handle1;
}
}
}
if (addr2)
{
if (cb->buf_type == BUF_SM)
{
if (card->sbfqc >= card->sbnr.max)
{
skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
dev_kfree_skb_any((struct sk_buff *) handle1);
skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
dev_kfree_skb_any((struct sk_buff *) handle2);
if (addr2) {
if (cb->buf_type == BUF_SM) {
if (card->sbfqc >= card->sbnr.max) {
skb_unlink((struct sk_buff *)handle1,
&card->sbpool.queue);
dev_kfree_skb_any((struct sk_buff *)handle1);
skb_unlink((struct sk_buff *)handle2,
&card->sbpool.queue);
dev_kfree_skb_any((struct sk_buff *)handle2);
return;
}
else
} else
card->sbfqc += 2;
}
else /* (buf_type == BUF_LG) */
{
if (card->lbfqc >= card->lbnr.max)
{
skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
dev_kfree_skb_any((struct sk_buff *) handle1);
skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
dev_kfree_skb_any((struct sk_buff *) handle2);
} else { /* (buf_type == BUF_LG) */
if (card->lbfqc >= card->lbnr.max) {
skb_unlink((struct sk_buff *)handle1,
&card->lbpool.queue);
dev_kfree_skb_any((struct sk_buff *)handle1);
skb_unlink((struct sk_buff *)handle2,
&card->lbpool.queue);
dev_kfree_skb_any((struct sk_buff *)handle2);
return;
}
else
} else
card->lbfqc += 2;
}
spin_lock_irqsave(&card->res_lock, flags);
while (CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(addr2, card->membase + DR3);
writel(handle2, card->membase + DR2);
writel(addr1, card->membase + DR1);
writel(handle1, card->membase + DR0);
writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type,
card->membase + CMD);
spin_unlock_irqrestore(&card->res_lock, flags);
XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
(cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
card->index,
(cb->buf_type == BUF_SM ? "small" : "large"), addr1,
addr2);
}
if (!card->efbie && card->sbfqc >= card->sbnr.min &&
card->lbfqc >= card->lbnr.min)
{
card->lbfqc >= card->lbnr.min) {
card->efbie = 1;
writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
card->membase + CFG);
}
return;
}
static irqreturn_t ns_irq_handler(int irq, void *dev_id)
{
u32 stat_r;
......@@ -1131,39 +1057,34 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
stat_r = readl(card->membase + STAT);
/* Transmit Status Indicator has been written to T. S. Queue */
if (stat_r & NS_STAT_TSIF)
{
if (stat_r & NS_STAT_TSIF) {
TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
process_tsq(card);
writel(NS_STAT_TSIF, card->membase + STAT);
}
/* Incomplete CS-PDU has been transmitted */
if (stat_r & NS_STAT_TXICP)
{
if (stat_r & NS_STAT_TXICP) {
writel(NS_STAT_TXICP, card->membase + STAT);
TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
card->index);
}
/* Transmit Status Queue 7/8 full */
if (stat_r & NS_STAT_TSQF)
{
if (stat_r & NS_STAT_TSQF) {
writel(NS_STAT_TSQF, card->membase + STAT);
PRINTK("nicstar%d: TSQ full.\n", card->index);
process_tsq(card);
}
/* Timer overflow */
if (stat_r & NS_STAT_TMROF)
{
if (stat_r & NS_STAT_TMROF) {
writel(NS_STAT_TMROF, card->membase + STAT);
PRINTK("nicstar%d: Timer overflow.\n", card->index);
}
/* PHY device interrupt signal active */
if (stat_r & NS_STAT_PHYI)
{
if (stat_r & NS_STAT_PHYI) {
writel(NS_STAT_PHYI, card->membase + STAT);
PRINTK("nicstar%d: PHY interrupt.\n", card->index);
if (dev->phy && dev->phy->interrupt) {
......@@ -1172,38 +1093,35 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
}
/* Small Buffer Queue is full */
if (stat_r & NS_STAT_SFBQF)
{
if (stat_r & NS_STAT_SFBQF) {
writel(NS_STAT_SFBQF, card->membase + STAT);
printk("nicstar%d: Small free buffer queue is full.\n", card->index);
printk("nicstar%d: Small free buffer queue is full.\n",
card->index);
}
/* Large Buffer Queue is full */
if (stat_r & NS_STAT_LFBQF)
{
if (stat_r & NS_STAT_LFBQF) {
writel(NS_STAT_LFBQF, card->membase + STAT);
printk("nicstar%d: Large free buffer queue is full.\n", card->index);
printk("nicstar%d: Large free buffer queue is full.\n",
card->index);
}
/* Receive Status Queue is full */
if (stat_r & NS_STAT_RSQF)
{
if (stat_r & NS_STAT_RSQF) {
writel(NS_STAT_RSQF, card->membase + STAT);
printk("nicstar%d: RSQ full.\n", card->index);
process_rsq(card);
}
/* Complete CS-PDU received */
if (stat_r & NS_STAT_EOPDU)
{
if (stat_r & NS_STAT_EOPDU) {
RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
process_rsq(card);
writel(NS_STAT_EOPDU, card->membase + STAT);
}
/* Raw cell received */
if (stat_r & NS_STAT_RAWCF)
{
if (stat_r & NS_STAT_RAWCF) {
writel(NS_STAT_RAWCF, card->membase + STAT);
#ifndef RCQ_SUPPORT
printk("nicstar%d: Raw cell received and no support yet...\n",
......@@ -1212,40 +1130,38 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
/* NOTE: the following procedure may keep a raw cell pending until the
next interrupt. As this preliminary support is only meant to
avoid buffer leakage, this is not an issue. */
while (readl(card->membase + RAWCT) != card->rawch)
{
while (readl(card->membase + RAWCT) != card->rawch) {
ns_rcqe *rawcell;
rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
if (ns_rcqe_islast(rawcell))
{
if (ns_rcqe_islast(rawcell)) {
struct sk_buff *oldbuf;
oldbuf = card->rcbuf;
card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
card->rawch = (u32) virt_to_bus(card->rcbuf->data);
card->rcbuf =
(struct sk_buff *)
ns_rcqe_nextbufhandle(rawcell);
card->rawch =
(u32) virt_to_bus(card->rcbuf->data);
recycle_rx_buf(card, oldbuf);
}
else
} else
card->rawch += NS_RCQE_SIZE;
}
}
/* Small buffer queue is empty */
if (stat_r & NS_STAT_SFBQE)
{
if (stat_r & NS_STAT_SFBQE) {
int i;
struct sk_buff *sb;
writel(NS_STAT_SFBQE, card->membase + STAT);
printk("nicstar%d: Small free buffer queue empty.\n",
card->index);
for (i = 0; i < card->sbnr.min; i++)
{
for (i = 0; i < card->sbnr.min; i++) {
sb = dev_alloc_skb(NS_SMSKBSIZE);
if (sb == NULL)
{
writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
if (sb == NULL) {
writel(readl(card->membase + CFG) &
~NS_CFG_EFBIE, card->membase + CFG);
card->efbie = 0;
break;
}
......@@ -1259,20 +1175,18 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
}
/* Large buffer queue empty */
if (stat_r & NS_STAT_LFBQE)
{
if (stat_r & NS_STAT_LFBQE) {
int i;
struct sk_buff *lb;
writel(NS_STAT_LFBQE, card->membase + STAT);
printk("nicstar%d: Large free buffer queue empty.\n",
card->index);
for (i = 0; i < card->lbnr.min; i++)
{
for (i = 0; i < card->lbnr.min; i++) {
lb = dev_alloc_skb(NS_LGSKBSIZE);
if (lb == NULL)
{
writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
if (lb == NULL) {
writel(readl(card->membase + CFG) &
~NS_CFG_EFBIE, card->membase + CFG);
card->efbie = 0;
break;
}
......@@ -1286,8 +1200,7 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
}
/* Receive Status Queue is 7/8 full */
if (stat_r & NS_STAT_RSQAF)
{
if (stat_r & NS_STAT_RSQAF) {
writel(NS_STAT_RSQAF, card->membase + STAT);
RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
process_rsq(card);
......@@ -1298,8 +1211,6 @@ static irqreturn_t ns_irq_handler(int irq, void *dev_id)
return IRQ_HANDLED;
}
static int ns_open(struct atm_vcc *vcc)
{
ns_dev *card;
......@@ -1318,9 +1229,9 @@ static int ns_open(struct atm_vcc *vcc)
int vci = vcc->vci;
card = (ns_dev *) vcc->dev->dev_data;
PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
{
PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
vci);
if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
PRINTK("nicstar%d: unsupported AAL.\n", card->index);
return -EINVAL;
}
......@@ -1333,107 +1244,108 @@ static int ns_open(struct atm_vcc *vcc)
inuse = 1;
if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
inuse += 2;
if (inuse)
{
if (inuse) {
printk("nicstar%d: %s vci already in use.\n", card->index,
inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
return -EINVAL;
}
set_bit(ATM_VF_ADDR,&vcc->flags);
set_bit(ATM_VF_ADDR, &vcc->flags);
/* NOTE: You are not allowed to modify an open connection's QOS. To change
that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
needed to do that. */
if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
{
if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
scq_info *scq;
set_bit(ATM_VF_PARTIAL,&vcc->flags);
if (vcc->qos.txtp.traffic_class == ATM_CBR)
{
set_bit(ATM_VF_PARTIAL, &vcc->flags);
if (vcc->qos.txtp.traffic_class == ATM_CBR) {
/* Check requested cell rate and availability of SCD */
if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
vcc->qos.txtp.min_pcr == 0)
{
PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
&& vcc->qos.txtp.min_pcr == 0) {
PRINTK
("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
card->index);
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -EINVAL;
}
tcr = atm_pcr_goal(&(vcc->qos.txtp));
tcra = tcr >= 0 ? tcr : -tcr;
PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
vcc->qos.txtp.max_pcr);
PRINTK("nicstar%d: target cell rate = %d.\n",
card->index, vcc->qos.txtp.max_pcr);
tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
tmpl =
(unsigned long)tcra *(unsigned long)
NS_TST_NUM_ENTRIES;
modl = tmpl % card->max_pcr;
n = (int)(tmpl / card->max_pcr);
if (tcr > 0)
{
if (modl > 0) n++;
}
else if (tcr == 0)
{
if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
{
PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
if (tcr > 0) {
if (modl > 0)
n++;
} else if (tcr == 0) {
if ((n =
(card->tst_free_entries -
NS_TST_RESERVED)) <= 0) {
PRINTK
("nicstar%d: no CBR bandwidth free.\n",
card->index);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -EINVAL;
}
}
if (n == 0)
{
printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
if (n == 0) {
printk
("nicstar%d: selected bandwidth < granularity.\n",
card->index);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -EINVAL;
}
if (n > (card->tst_free_entries - NS_TST_RESERVED))
{
PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
PRINTK
("nicstar%d: not enough free CBR bandwidth.\n",
card->index);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -EINVAL;
}
else
} else
card->tst_free_entries -= n;
XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
{
if (card->scd2vc[frscdi] == NULL)
{
XPRINTK("nicstar%d: writing %d tst entries.\n",
card->index, n);
for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
if (card->scd2vc[frscdi] == NULL) {
card->scd2vc[frscdi] = vc;
break;
}
}
if (frscdi == NS_FRSCD_NUM)
{
PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
if (frscdi == NS_FRSCD_NUM) {
PRINTK
("nicstar%d: no SCD available for CBR channel.\n",
card->index);
card->tst_free_entries += n;
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -EBUSY;
}
vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
if (scq == NULL)
{
PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
if (scq == NULL) {
PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
card->index);
card->scd2vc[frscdi] = NULL;
card->tst_free_entries += n;
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return -ENOMEM;
}
vc->scq = scq;
......@@ -1444,21 +1356,17 @@ static int ns_open(struct atm_vcc *vcc)
ns_write_sram(card, vc->cbr_scd, u32d, 4);
fill_tst(card, n, vc);
}
else if (vcc->qos.txtp.traffic_class == ATM_UBR)
{
} else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
vc->cbr_scd = 0x00000000;
vc->scq = card->scq0;
}
if (vcc->qos.txtp.traffic_class != ATM_NONE)
{
if (vcc->qos.txtp.traffic_class != ATM_NONE) {
vc->tx = 1;
vc->tx_vcc = vcc;
vc->tbd_count = 0;
}
if (vcc->qos.rxtp.traffic_class != ATM_NONE)
{
if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
u32 status;
vc->rx = 1;
......@@ -1473,18 +1381,18 @@ static int ns_open(struct atm_vcc *vcc)
#ifdef RCQ_SUPPORT
status |= NS_RCTE_RAWCELLINTEN;
#endif /* RCQ_SUPPORT */
ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
ns_write_sram(card,
NS_RCT +
(vpi << card->vcibits | vci) *
NS_RCT_ENTRY_SIZE, &status, 1);
}
}
set_bit(ATM_VF_READY,&vcc->flags);
set_bit(ATM_VF_READY, &vcc->flags);
return 0;
}
static void ns_close(struct atm_vcc *vcc)
{
vc_map *vc;
......@@ -1495,24 +1403,25 @@ static void ns_close(struct atm_vcc *vcc)
vc = vcc->dev_data;
card = vcc->dev->dev_data;
PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
(int) vcc->vpi, vcc->vci);
(int)vcc->vpi, vcc->vci);
clear_bit(ATM_VF_READY,&vcc->flags);
clear_bit(ATM_VF_READY, &vcc->flags);
if (vcc->qos.rxtp.traffic_class != ATM_NONE)
{
if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
u32 addr;
unsigned long flags;
addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
addr =
NS_RCT +
(vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
spin_lock_irqsave(&card->res_lock, flags);
while(CMD_BUSY(card));
writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
while (CMD_BUSY(card)) ;
writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
card->membase + CMD);
spin_unlock_irqrestore(&card->res_lock, flags);
vc->rx = 0;
if (vc->rx_iov != NULL)
{
if (vc->rx_iov != NULL) {
struct sk_buff *iovb;
u32 stat;
......@@ -1520,10 +1429,11 @@ static void ns_close(struct atm_vcc *vcc)
card->sbfqc = ns_stat_sfbqc_get(stat);
card->lbfqc = ns_stat_lfbqc_get(stat);
PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
PRINTK
("nicstar%d: closing a VC with pending rx buffers.\n",
card->index);
iovb = vc->rx_iov;
recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
NS_SKB(iovb)->iovcnt);
NS_SKB(iovb)->iovcnt = 0;
NS_SKB(iovb)->vcc = NULL;
......@@ -1534,36 +1444,31 @@ static void ns_close(struct atm_vcc *vcc)
}
}
if (vcc->qos.txtp.traffic_class != ATM_NONE)
{
if (vcc->qos.txtp.traffic_class != ATM_NONE) {
vc->tx = 0;
}
if (vcc->qos.txtp.traffic_class == ATM_CBR)
{
if (vcc->qos.txtp.traffic_class == ATM_CBR) {
unsigned long flags;
ns_scqe *scqep;
scq_info *scq;
scq = vc->scq;
for (;;)
{
for (;;) {
spin_lock_irqsave(&scq->lock, flags);
scqep = scq->next;
if (scqep == scq->base)
scqep = scq->last;
else
scqep--;
if (scqep == scq->tail)
{
if (scqep == scq->tail) {
spin_unlock_irqrestore(&scq->lock, flags);
break;
}
/* If the last entry is not a TSR, place one in the SCQ in order to
be able to completely drain it and then close. */
if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
{
if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
ns_scqe tsr;
u32 scdi, scqi;
u32 data;
......@@ -1576,7 +1481,7 @@ static void ns_close(struct atm_vcc *vcc)
tsr.word_3 = 0x00000000;
tsr.word_4 = 0x00000000;
*scq->next = tsr;
index = (int) scqi;
index = (int)scqi;
scq->skb[index] = NULL;
if (scq->next == scq->last)
scq->next = scq->base;
......@@ -1591,11 +1496,10 @@ static void ns_close(struct atm_vcc *vcc)
/* Free all TST entries */
data = NS_TST_OPCODE_VARIABLE;
for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
{
if (card->tste2vc[i] == vc)
{
ns_write_sram(card, card->tst_addr + i, &data, 1);
for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
if (card->tste2vc[i] == vc) {
ns_write_sram(card, card->tst_addr + i, &data,
1);
card->tste2vc[i] = NULL;
card->tst_free_entries++;
}
......@@ -1606,18 +1510,18 @@ static void ns_close(struct atm_vcc *vcc)
}
/* remove all references to vcc before deleting it */
if (vcc->qos.txtp.traffic_class != ATM_NONE)
{
if (vcc->qos.txtp.traffic_class != ATM_NONE) {
unsigned long flags;
scq_info *scq = card->scq0;
spin_lock_irqsave(&scq->lock, flags);
for(i = 0; i < scq->num_entries; i++) {
if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
for (i = 0; i < scq->num_entries; i++) {
if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
ATM_SKB(scq->skb[i])->vcc = NULL;
atm_return(vcc, scq->skb[i]->truesize);
PRINTK("nicstar: deleted pending vcc mapping\n");
PRINTK
("nicstar: deleted pending vcc mapping\n");
}
}
......@@ -1625,8 +1529,8 @@ static void ns_close(struct atm_vcc *vcc)
}
vcc->dev_data = NULL;
clear_bit(ATM_VF_PARTIAL,&vcc->flags);
clear_bit(ATM_VF_ADDR,&vcc->flags);
clear_bit(ATM_VF_PARTIAL, &vcc->flags);
clear_bit(ATM_VF_ADDR, &vcc->flags);
#ifdef RX_DEBUG
{
......@@ -1634,12 +1538,14 @@ static void ns_close(struct atm_vcc *vcc)
stat = readl(card->membase + STAT);
cfg = readl(card->membase + CFG);
printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
(u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
readl(card->membase + TSQT));
printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
(u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
readl(card->membase + RSQT));
printk
("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
(u32) card->tsq.base, (u32) card->tsq.next,
(u32) card->tsq.last, readl(card->membase + TSQT));
printk
("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
(u32) card->rsq.base, (u32) card->rsq.next,
(u32) card->rsq.last, readl(card->membase + RSQT));
printk("Empty free buffer queue interrupt %s \n",
card->efbie ? "enabled" : "disabled");
printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
......@@ -1651,9 +1557,7 @@ static void ns_close(struct atm_vcc *vcc)
#endif /* RX_DEBUG */
}
static void fill_tst(ns_dev *card, int n, vc_map *vc)
static void fill_tst(ns_dev * card, int n, vc_map * vc)
{
u32 new_tst;
unsigned long cl;
......@@ -1668,8 +1572,7 @@ static void fill_tst(ns_dev *card, int n, vc_map *vc)
/* Fill procedure */
for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
{
for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
if (card->tste2vc[e] == NULL)
break;
}
......@@ -1682,10 +1585,8 @@ static void fill_tst(ns_dev *card, int n, vc_map *vc)
cl = NS_TST_NUM_ENTRIES;
data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
while (r > 0)
{
if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
{
while (r > 0) {
if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
card->tste2vc[e] = vc;
ns_write_sram(card, new_tst + e, &data, 1);
cl -= NS_TST_NUM_ENTRIES;
......@@ -1706,8 +1607,6 @@ static void fill_tst(ns_dev *card, int n, vc_map *vc)
card->tst_addr = new_tst;
}
static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
{
ns_dev *card;
......@@ -1719,32 +1618,31 @@ static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
card = vcc->dev->dev_data;
TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
if ((vc = (vc_map *) vcc->dev_data) == NULL)
{
printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
if ((vc = (vc_map *) vcc->dev_data) == NULL) {
printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
card->index);
atomic_inc(&vcc->stats->tx_err);
dev_kfree_skb_any(skb);
return -EINVAL;
}
if (!vc->tx)
{
printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
if (!vc->tx) {
printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
card->index);
atomic_inc(&vcc->stats->tx_err);
dev_kfree_skb_any(skb);
return -EINVAL;
}
if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
{
printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
card->index);
atomic_inc(&vcc->stats->tx_err);
dev_kfree_skb_any(skb);
return -EINVAL;
}
if (skb_shinfo(skb)->nr_frags != 0)
{
if (skb_shinfo(skb)->nr_frags != 0) {
printk("nicstar%d: No scatter-gather yet.\n", card->index);
atomic_inc(&vcc->stats->tx_err);
dev_kfree_skb_any(skb);
......@@ -1753,44 +1651,45 @@ static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
ATM_SKB(skb)->vcc = vcc;
if (vcc->qos.aal == ATM_AAL5)
{
if (vcc->qos.aal == ATM_AAL5) {
buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
flags = NS_TBD_AAL5;
scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
scqe.word_3 = cpu_to_le32((u32) skb->len);
scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
scqe.word_4 =
ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
ATM_SKB(skb)->
atm_options & ATM_ATMOPT_CLP ? 1 : 0);
flags |= NS_TBD_EOPDU;
}
else /* (vcc->qos.aal == ATM_AAL0) */
{
} else { /* (vcc->qos.aal == ATM_AAL0) */
buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
flags = NS_TBD_AAL0;
scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
scqe.word_2 =
cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
scqe.word_3 = cpu_to_le32(0x00000000);
if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
flags |= NS_TBD_EOPDU;
scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
scqe.word_4 =
cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
/* Force the VPI/VCI to be the same as in VCC struct */
scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
NS_TBD_VC_MASK);
scqe.word_4 |=
cpu_to_le32((((u32) vcc->
vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
vci) <<
NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
}
if (vcc->qos.txtp.traffic_class == ATM_CBR)
{
if (vcc->qos.txtp.traffic_class == ATM_CBR) {
scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
scq = ((vc_map *) vcc->dev_data)->scq;
}
else
{
scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
} else {
scqe.word_1 =
ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
scq = card->scq0;
}
if (push_scqe(card, vc, scq, &scqe, skb) != 0)
{
if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
atomic_inc(&vcc->stats->tx_err);
dev_kfree_skb_any(skb);
return -EIO;
......@@ -1800,9 +1699,7 @@ static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
return 0;
}
static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
struct sk_buff *skb)
{
unsigned long flags;
......@@ -1813,8 +1710,7 @@ static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
int index;
spin_lock_irqsave(&scq->lock, flags);
while (scq->tail == scq->next)
{
while (scq->tail == scq->next) {
if (in_interrupt()) {
spin_unlock_irqrestore(&scq->lock, flags);
printk("nicstar%d: Error pushing TBD.\n", card->index);
......@@ -1823,17 +1719,19 @@ static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
scq->full = 1;
spin_unlock_irqrestore(&scq->lock, flags);
interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
interruptible_sleep_on_timeout(&scq->scqfull_waitq,
SCQFULL_TIMEOUT);
spin_lock_irqsave(&scq->lock, flags);
if (scq->full) {
spin_unlock_irqrestore(&scq->lock, flags);
printk("nicstar%d: Timeout pushing TBD.\n", card->index);
printk("nicstar%d: Timeout pushing TBD.\n",
card->index);
return 1;
}
}
*scq->next = *tbd;
index = (int) (scq->next - scq->base);
index = (int)(scq->next - scq->base);
scq->skb[index] = skb;
XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
card->index, (u32) skb, index);
......@@ -1847,37 +1745,36 @@ static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
scq->next++;
vc->tbd_count++;
if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
{
if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
scq->tbd_count++;
scq_is_vbr = 1;
}
else
} else
scq_is_vbr = 0;
if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
{
if (vc->tbd_count >= MAX_TBD_PER_VC
|| scq->tbd_count >= MAX_TBD_PER_SCQ) {
int has_run = 0;
while (scq->tail == scq->next)
{
while (scq->tail == scq->next) {
if (in_interrupt()) {
data = (u32) virt_to_bus(scq->next);
ns_write_sram(card, scq->scd, &data, 1);
spin_unlock_irqrestore(&scq->lock, flags);
printk("nicstar%d: Error pushing TSR.\n", card->index);
printk("nicstar%d: Error pushing TSR.\n",
card->index);
return 0;
}
scq->full = 1;
if (has_run++) break;
if (has_run++)
break;
spin_unlock_irqrestore(&scq->lock, flags);
interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
interruptible_sleep_on_timeout(&scq->scqfull_waitq,
SCQFULL_TIMEOUT);
spin_lock_irqsave(&scq->lock, flags);
}
if (!scq->full)
{
if (!scq->full) {
tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
if (scq_is_vbr)
scdi = NS_TSR_SCDISVBR;
......@@ -1889,21 +1786,22 @@ static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
tsr.word_4 = 0x00000000;
*scq->next = tsr;
index = (int) scqi;
index = (int)scqi;
scq->skb[index] = NULL;
XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
(u32) scq->next);
XPRINTK
("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
card->index, le32_to_cpu(tsr.word_1),
le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
le32_to_cpu(tsr.word_4), (u32) scq->next);
if (scq->next == scq->last)
scq->next = scq->base;
else
scq->next++;
vc->tbd_count = 0;
scq->tbd_count = 0;
}
else
PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
} else
PRINTK("nicstar%d: Timeout pushing TSR.\n",
card->index);
}
data = (u32) virt_to_bus(scq->next);
ns_write_sram(card, scq->scd, &data, 1);
......@@ -1913,9 +1811,7 @@ static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
return 0;
}
static void process_tsq(ns_dev *card)
static void process_tsq(ns_dev * card)
{
u32 scdi;
scq_info *scq;
......@@ -1948,16 +1844,14 @@ static void process_tsq(ns_dev *card)
card->tsq.next++;
}
if (!ns_tsi_tmrof(card->tsq.next))
{
if (!ns_tsi_tmrof(card->tsq.next)) {
scdi = ns_tsi_getscdindex(card->tsq.next);
if (scdi == NS_TSI_SCDISVBR)
scq = card->scq0;
else
{
if (card->scd2vc[scdi] == NULL)
{
printk("nicstar%d: could not find VC from SCD index.\n",
else {
if (card->scd2vc[scdi] == NULL) {
printk
("nicstar%d: could not find VC from SCD index.\n",
card->index);
ns_tsi_init(card->tsq.next);
return;
......@@ -1993,9 +1887,7 @@ static void process_tsq(ns_dev *card)
}
}
static void drain_scq(ns_dev *card, scq_info *scq, int pos)
static void drain_scq(ns_dev * card, scq_info * scq, int pos)
{
struct atm_vcc *vcc;
struct sk_buff *skb;
......@@ -2004,23 +1896,20 @@ static void drain_scq(ns_dev *card, scq_info *scq, int pos)
XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
card->index, (u32) scq, pos);
if (pos >= scq->num_entries)
{
if (pos >= scq->num_entries) {
printk("nicstar%d: Bad index on drain_scq().\n", card->index);
return;
}
spin_lock_irqsave(&scq->lock, flags);
i = (int) (scq->tail - scq->base);
i = (int)(scq->tail - scq->base);
if (++i == scq->num_entries)
i = 0;
while (i != pos)
{
while (i != pos) {
skb = scq->skb[i];
XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
card->index, (u32) skb, i);
if (skb != NULL)
{
if (skb != NULL) {
vcc = ATM_SKB(skb)->vcc;
if (vcc && vcc->pop != NULL) {
vcc->pop(vcc, skb);
......@@ -2036,9 +1925,7 @@ static void drain_scq(ns_dev *card, scq_info *scq, int pos)
spin_unlock_irqrestore(&scq->lock, flags);
}
static void process_rsq(ns_dev *card)
static void process_rsq(ns_dev * card)
{
ns_rsqe *previous;
......@@ -2057,9 +1944,7 @@ static void process_rsq(ns_dev *card)
card->membase + RSQH);
}
static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
{
u32 vpi, vci;
vc_map *vc;
......@@ -2075,11 +1960,10 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
card->sbfqc = ns_stat_sfbqc_get(stat);
card->lbfqc = ns_stat_lfbqc_get(stat);
skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
skb = (struct sk_buff *)le32_to_cpu(rsqe->buffer_handle);
vpi = ns_rsqe_vpi(rsqe);
vci = ns_rsqe_vci(rsqe);
if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
{
if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
card->index, vpi, vci);
recycle_rx_buf(card, skb);
......@@ -2087,8 +1971,7 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
}
vc = &(card->vcmap[vpi << card->vcibits | vci]);
if (!vc->rx)
{
if (!vc->rx) {
RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
card->index, vpi, vci);
recycle_rx_buf(card, skb);
......@@ -2097,27 +1980,25 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
vcc = vc->rx_vcc;
if (vcc->qos.aal == ATM_AAL0)
{
if (vcc->qos.aal == ATM_AAL0) {
struct sk_buff *sb;
unsigned char *cell;
int i;
cell = skb->data;
for (i = ns_rsqe_cellcount(rsqe); i; i--)
{
if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
{
printk("nicstar%d: Can't allocate buffers for aal0.\n",
for (i = ns_rsqe_cellcount(rsqe); i; i--) {
if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
printk
("nicstar%d: Can't allocate buffers for aal0.\n",
card->index);
atomic_add(i,&vcc->stats->rx_drop);
atomic_add(i, &vcc->stats->rx_drop);
break;
}
if (!atm_charge(vcc, sb->truesize))
{
RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
if (!atm_charge(vcc, sb->truesize)) {
RXPRINTK
("nicstar%d: atm_charge() dropped aal0 packets.\n",
card->index);
atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
dev_kfree_skb_any(sb);
break;
}
......@@ -2142,27 +2023,22 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
/* To reach this point, the AAL layer can only be AAL5 */
if ((iovb = vc->rx_iov) == NULL)
{
if ((iovb = vc->rx_iov) == NULL) {
iovb = skb_dequeue(&(card->iovpool.queue));
if (iovb == NULL) /* No buffers in the queue */
{
if (iovb == NULL) { /* No buffers in the queue */
iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
if (iovb == NULL)
{
printk("nicstar%d: Out of iovec buffers.\n", card->index);
if (iovb == NULL) {
printk("nicstar%d: Out of iovec buffers.\n",
card->index);
atomic_inc(&vcc->stats->rx_drop);
recycle_rx_buf(card, skb);
return;
}
NS_SKB_CB(iovb)->buf_type = BUF_NONE;
}
else
if (--card->iovpool.count < card->iovnr.min)
{
} else if (--card->iovpool.count < card->iovnr.min) {
struct sk_buff *new_iovb;
if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
{
if ((new_iovb =
alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
NS_SKB_CB(iovb)->buf_type = BUF_NONE;
skb_queue_tail(&card->iovpool.queue, new_iovb);
card->iovpool.count++;
......@@ -2177,28 +2053,26 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
/* IMPORTANT: a pointer to the sk_buff containing the small or large
buffer is stored as iovec base, NOT a pointer to the
small or large buffer itself. */
}
else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
{
} else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS) {
printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
atomic_inc(&vcc->stats->rx_err);
recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
NS_MAX_IOVECS);
NS_SKB(iovb)->iovcnt = 0;
iovb->len = 0;
iovb->data = iovb->head;
skb_reset_tail_pointer(iovb);
NS_SKB(iovb)->vcc = vcc;
}
iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
iov->iov_base = (void *) skb;
iov = &((struct iovec *)iovb->data)[NS_SKB(iovb)->iovcnt++];
iov->iov_base = (void *)skb;
iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
iovb->len += iov->iov_len;
if (NS_SKB(iovb)->iovcnt == 1)
{
if (NS_SKB_CB(skb)->buf_type != BUF_SM)
{
printk("nicstar%d: Expected a small buffer, and this is not one.\n",
if (NS_SKB(iovb)->iovcnt == 1) {
if (NS_SKB_CB(skb)->buf_type != BUF_SM) {
printk
("nicstar%d: Expected a small buffer, and this is not one.\n",
card->index);
which_list(card, skb);
atomic_inc(&vcc->stats->rx_err);
......@@ -2207,16 +2081,15 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
recycle_iov_buf(card, iovb);
return;
}
}
else /* NS_SKB(iovb)->iovcnt >= 2 */
{
if (NS_SKB_CB(skb)->buf_type != BUF_LG)
{
printk("nicstar%d: Expected a large buffer, and this is not one.\n",
} else { /* NS_SKB(iovb)->iovcnt >= 2 */
if (NS_SKB_CB(skb)->buf_type != BUF_LG) {
printk
("nicstar%d: Expected a large buffer, and this is not one.\n",
card->index);
which_list(card, skb);
atomic_inc(&vcc->stats->rx_err);
recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
NS_SKB(iovb)->iovcnt);
vc->rx_iov = NULL;
recycle_iov_buf(card, iovb);
......@@ -2224,23 +2097,21 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
}
}
if (ns_rsqe_eopdu(rsqe))
{
if (ns_rsqe_eopdu(rsqe)) {
/* This works correctly regardless of the endianness of the host */
unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
unsigned char *L1L2 = (unsigned char *)((u32) skb->data +
iov->iov_len - 6);
aal5_len = L1L2[0] << 8 | L1L2[1];
len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
if (ns_rsqe_crcerr(rsqe) ||
len + 8 > iovb->len || len + (47 + 8) < iovb->len)
{
len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
printk("nicstar%d: AAL5 CRC error", card->index);
if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
printk(" - PDU size mismatch.\n");
else
printk(".\n");
atomic_inc(&vcc->stats->rx_err);
recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
NS_SKB(iovb)->iovcnt);
vc->rx_iov = NULL;
recycle_iov_buf(card, iovb);
......@@ -2249,16 +2120,12 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
/* By this point we (hopefully) have a complete SDU without errors. */
if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
{
if (NS_SKB(iovb)->iovcnt == 1) { /* Just a small buffer */
/* skb points to a small buffer */
if (!atm_charge(vcc, skb->truesize))
{
if (!atm_charge(vcc, skb->truesize)) {
push_rxbufs(card, skb);
atomic_inc(&vcc->stats->rx_drop);
}
else
{
} else {
skb_put(skb, len);
dequeue_sm_buf(card, skb);
#ifdef NS_USE_DESTRUCTORS
......@@ -2269,23 +2136,17 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
vcc->push(vcc, skb);
atomic_inc(&vcc->stats->rx);
}
}
else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
{
} else if (NS_SKB(iovb)->iovcnt == 2) { /* One small plus one large buffer */
struct sk_buff *sb;
sb = (struct sk_buff *) (iov - 1)->iov_base;
sb = (struct sk_buff *)(iov - 1)->iov_base;
/* skb points to a large buffer */
if (len <= NS_SMBUFSIZE)
{
if (!atm_charge(vcc, sb->truesize))
{
if (len <= NS_SMBUFSIZE) {
if (!atm_charge(vcc, sb->truesize)) {
push_rxbufs(card, sb);
atomic_inc(&vcc->stats->rx_drop);
}
else
{
} else {
skb_put(sb, len);
dequeue_sm_buf(card, sb);
#ifdef NS_USE_DESTRUCTORS
......@@ -2299,22 +2160,19 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
push_rxbufs(card, skb);
}
else /* len > NS_SMBUFSIZE, the usual case */
{
if (!atm_charge(vcc, skb->truesize))
{
} else { /* len > NS_SMBUFSIZE, the usual case */
if (!atm_charge(vcc, skb->truesize)) {
push_rxbufs(card, skb);
atomic_inc(&vcc->stats->rx_drop);
}
else
{
} else {
dequeue_lg_buf(card, skb);
#ifdef NS_USE_DESTRUCTORS
skb->destructor = ns_lb_destructor;
#endif /* NS_USE_DESTRUCTORS */
skb_push(skb, NS_SMBUFSIZE);
skb_copy_from_linear_data(sb, skb->data, NS_SMBUFSIZE);
skb_copy_from_linear_data(sb, skb->data,
NS_SMBUFSIZE);
skb_put(skb, len - NS_SMBUFSIZE);
ATM_SKB(skb)->vcc = vcc;
__net_timestamp(skb);
......@@ -2326,79 +2184,78 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
}
}
else /* Must push a huge buffer */
{
} else { /* Must push a huge buffer */
struct sk_buff *hb, *sb, *lb;
int remaining, tocopy;
int j;
hb = skb_dequeue(&(card->hbpool.queue));
if (hb == NULL) /* No buffers in the queue */
{
if (hb == NULL) { /* No buffers in the queue */
hb = dev_alloc_skb(NS_HBUFSIZE);
if (hb == NULL)
{
printk("nicstar%d: Out of huge buffers.\n", card->index);
if (hb == NULL) {
printk
("nicstar%d: Out of huge buffers.\n",
card->index);
atomic_inc(&vcc->stats->rx_drop);
recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
NS_SKB(iovb)->iovcnt);
recycle_iovec_rx_bufs(card,
(struct iovec *)
iovb->data,
NS_SKB(iovb)->
iovcnt);
vc->rx_iov = NULL;
recycle_iov_buf(card, iovb);
return;
}
else if (card->hbpool.count < card->hbnr.min)
{
} else if (card->hbpool.count < card->hbnr.min) {
struct sk_buff *new_hb;
if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
{
skb_queue_tail(&card->hbpool.queue, new_hb);
if ((new_hb =
dev_alloc_skb(NS_HBUFSIZE)) !=
NULL) {
skb_queue_tail(&card->hbpool.
queue, new_hb);
card->hbpool.count++;
}
}
NS_SKB_CB(hb)->buf_type = BUF_NONE;
}
else
if (--card->hbpool.count < card->hbnr.min)
{
} else if (--card->hbpool.count < card->hbnr.min) {
struct sk_buff *new_hb;
if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
{
if ((new_hb =
dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
skb_queue_tail(&card->hbpool.queue, new_hb);
skb_queue_tail(&card->hbpool.queue,
new_hb);
card->hbpool.count++;
}
if (card->hbpool.count < card->hbnr.min)
{
if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
{
NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
skb_queue_tail(&card->hbpool.queue, new_hb);
if (card->hbpool.count < card->hbnr.min) {
if ((new_hb =
dev_alloc_skb(NS_HBUFSIZE)) !=
NULL) {
NS_SKB_CB(new_hb)->buf_type =
BUF_NONE;
skb_queue_tail(&card->hbpool.
queue, new_hb);
card->hbpool.count++;
}
}
}
iov = (struct iovec *) iovb->data;
iov = (struct iovec *)iovb->data;
if (!atm_charge(vcc, hb->truesize))
{
recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
if (card->hbpool.count < card->hbnr.max)
{
if (!atm_charge(vcc, hb->truesize)) {
recycle_iovec_rx_bufs(card, iov,
NS_SKB(iovb)->iovcnt);
if (card->hbpool.count < card->hbnr.max) {
skb_queue_tail(&card->hbpool.queue, hb);
card->hbpool.count++;
}
else
} else
dev_kfree_skb_any(hb);
atomic_inc(&vcc->stats->rx_drop);
}
else
{
} else {
/* Copy the small buffer to the huge buffer */
sb = (struct sk_buff *) iov->iov_base;
skb_copy_from_linear_data(sb, hb->data, iov->iov_len);
sb = (struct sk_buff *)iov->iov_base;
skb_copy_from_linear_data(sb, hb->data,
iov->iov_len);
skb_put(hb, iov->iov_len);
remaining = len - iov->iov_len;
iov++;
......@@ -2406,11 +2263,13 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
push_rxbufs(card, sb);
/* Copy all large buffers to the huge buffer and free them */
for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
{
lb = (struct sk_buff *) iov->iov_base;
tocopy = min_t(int, remaining, iov->iov_len);
skb_copy_from_linear_data(lb, skb_tail_pointer(hb), tocopy);
for (j = 1; j < NS_SKB(iovb)->iovcnt; j++) {
lb = (struct sk_buff *)iov->iov_base;
tocopy =
min_t(int, remaining, iov->iov_len);
skb_copy_from_linear_data(lb,
skb_tail_pointer
(hb), tocopy);
skb_put(hb, tocopy);
iov++;
remaining -= tocopy;
......@@ -2418,7 +2277,9 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
}
#ifdef EXTRA_DEBUG
if (remaining != 0 || hb->len != len)
printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
printk
("nicstar%d: Huge buffer len mismatch.\n",
card->index);
#endif /* EXTRA_DEBUG */
ATM_SKB(hb)->vcc = vcc;
#ifdef NS_USE_DESTRUCTORS
......@@ -2436,8 +2297,6 @@ static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
}
#ifdef NS_USE_DESTRUCTORS
static void ns_sb_destructor(struct sk_buff *sb)
......@@ -2450,8 +2309,7 @@ static void ns_sb_destructor(struct sk_buff *sb)
card->sbfqc = ns_stat_sfbqc_get(stat);
card->lbfqc = ns_stat_lfbqc_get(stat);
do
{
do {
sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
if (sb == NULL)
break;
......@@ -2462,8 +2320,6 @@ static void ns_sb_destructor(struct sk_buff *sb)
} while (card->sbfqc < card->sbnr.min);
}
static void ns_lb_destructor(struct sk_buff *lb)
{
ns_dev *card;
......@@ -2474,8 +2330,7 @@ static void ns_lb_destructor(struct sk_buff *lb)
card->sbfqc = ns_stat_sfbqc_get(stat);
card->lbfqc = ns_stat_lfbqc_get(stat);
do
{
do {
lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
if (lb == NULL)
break;
......@@ -2486,16 +2341,13 @@ static void ns_lb_destructor(struct sk_buff *lb)
} while (card->lbfqc < card->lbnr.min);
}
static void ns_hb_destructor(struct sk_buff *hb)
{
ns_dev *card;
card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
while (card->hbpool.count < card->hbnr.init)
{
while (card->hbpool.count < card->hbnr.init) {
hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
if (hb == NULL)
break;
......@@ -2507,50 +2359,42 @@ static void ns_hb_destructor(struct sk_buff *hb)
#endif /* NS_USE_DESTRUCTORS */
static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
{
struct ns_skb_cb *cb = NS_SKB_CB(skb);
if (unlikely(cb->buf_type == BUF_NONE)) {
printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
printk("nicstar%d: What kind of rx buffer is this?\n",
card->index);
dev_kfree_skb_any(skb);
} else
push_rxbufs(card, skb);
}
static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
{
while (count-- > 0)
recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
}
static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
{
if (card->iovpool.count < card->iovnr.max)
{
if (card->iovpool.count < card->iovnr.max) {
skb_queue_tail(&card->iovpool.queue, iovb);
card->iovpool.count++;
}
else
} else
dev_kfree_skb_any(iovb);
}
static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
{
skb_unlink(sb, &card->sbpool.queue);
#ifdef NS_USE_DESTRUCTORS
if (card->sbfqc < card->sbnr.min)
#else
if (card->sbfqc < card->sbnr.init)
{
if (card->sbfqc < card->sbnr.init) {
struct sk_buff *new_sb;
if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
{
if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
NS_SKB_CB(new_sb)->buf_type = BUF_SM;
skb_queue_tail(&card->sbpool.queue, new_sb);
skb_reserve(new_sb, NS_AAL0_HEADER);
......@@ -2561,8 +2405,7 @@ static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
#endif /* NS_USE_DESTRUCTORS */
{
struct sk_buff *new_sb;
if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
{
if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
NS_SKB_CB(new_sb)->buf_type = BUF_SM;
skb_queue_tail(&card->sbpool.queue, new_sb);
skb_reserve(new_sb, NS_AAL0_HEADER);
......@@ -2571,19 +2414,15 @@ static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
}
}
static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
{
skb_unlink(lb, &card->lbpool.queue);
#ifdef NS_USE_DESTRUCTORS
if (card->lbfqc < card->lbnr.min)
#else
if (card->lbfqc < card->lbnr.init)
{
if (card->lbfqc < card->lbnr.init) {
struct sk_buff *new_lb;
if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
{
if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
NS_SKB_CB(new_lb)->buf_type = BUF_LG;
skb_queue_tail(&card->lbpool.queue, new_lb);
skb_reserve(new_lb, NS_SMBUFSIZE);
......@@ -2594,8 +2433,7 @@ static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
#endif /* NS_USE_DESTRUCTORS */
{
struct sk_buff *new_lb;
if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
{
if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
NS_SKB_CB(new_lb)->buf_type = BUF_LG;
skb_queue_tail(&card->lbpool.queue, new_lb);
skb_reserve(new_lb, NS_SMBUFSIZE);
......@@ -2604,37 +2442,37 @@ static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
}
}
static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
{
u32 stat;
ns_dev *card;
int left;
left = (int) *pos;
left = (int)*pos;
card = (ns_dev *) dev->dev_data;
stat = readl(card->membase + STAT);
if (!left--)
return sprintf(page, "Pool count min init max \n");
if (!left--)
return sprintf(page, "Small %5d %5d %5d %5d \n",
ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
card->sbnr.max);
ns_stat_sfbqc_get(stat), card->sbnr.min,
card->sbnr.init, card->sbnr.max);
if (!left--)
return sprintf(page, "Large %5d %5d %5d %5d \n",
ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
card->lbnr.max);
ns_stat_lfbqc_get(stat), card->lbnr.min,
card->lbnr.init, card->lbnr.max);
if (!left--)
return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
card->hbnr.min, card->hbnr.init, card->hbnr.max);
return sprintf(page, "Huge %5d %5d %5d %5d \n",
card->hbpool.count, card->hbnr.min,
card->hbnr.init, card->hbnr.max);
if (!left--)
return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
card->iovnr.min, card->iovnr.init, card->iovnr.max);
if (!left--)
{
return sprintf(page, "Iovec %5d %5d %5d %5d \n",
card->iovpool.count, card->iovnr.min,
card->iovnr.init, card->iovnr.max);
if (!left--) {
int retval;
retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
retval =
sprintf(page, "Interrupt counter: %u \n", card->intcnt);
card->intcnt = 0;
return retval;
}
......@@ -2642,27 +2480,26 @@ static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
/* Dump 25.6 Mbps PHY registers */
/* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
here just in case it's needed for debugging. */
if (card->max_pcr == ATM_25_PCR && !left--)
{
if (card->max_pcr == ATM_25_PCR && !left--) {
u32 phy_regs[4];
u32 i;
for (i = 0; i < 4; i++)
{
while (CMD_BUSY(card));
writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
while (CMD_BUSY(card));
for (i = 0; i < 4; i++) {
while (CMD_BUSY(card)) ;
writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
card->membase + CMD);
while (CMD_BUSY(card)) ;
phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
}
return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
phy_regs[0], phy_regs[1], phy_regs[2],
phy_regs[3]);
}
#endif /* 0 - Dump 25.6 Mbps PHY registers */
#if 0
/* Dump TST */
if (left-- < NS_TST_NUM_ENTRIES)
{
if (left-- < NS_TST_NUM_ENTRIES) {
if (card->tste2vc[left + 1] == NULL)
return sprintf(page, "%5d - VBR/UBR \n", left + 1);
else
......@@ -2674,9 +2511,7 @@ static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
return 0;
}
static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
{
ns_dev *card;
pool_levels pl;
......@@ -2684,22 +2519,23 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
unsigned long flags;
card = dev->dev_data;
switch (cmd)
{
switch (cmd) {
case NS_GETPSTAT:
if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
if (get_user
(pl.buftype, &((pool_levels __user *) arg)->buftype))
return -EFAULT;
switch (pl.buftype)
{
switch (pl.buftype) {
case NS_BUFTYPE_SMALL:
pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
pl.count =
ns_stat_sfbqc_get(readl(card->membase + STAT));
pl.level.min = card->sbnr.min;
pl.level.init = card->sbnr.init;
pl.level.max = card->sbnr.max;
break;
case NS_BUFTYPE_LARGE:
pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
pl.count =
ns_stat_lfbqc_get(readl(card->membase + STAT));
pl.level.min = card->lbnr.min;
pl.level.init = card->lbnr.init;
pl.level.max = card->lbnr.max;
......@@ -2733,12 +2569,12 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
return -EPERM;
if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
return -EFAULT;
if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
if (pl.level.min >= pl.level.init
|| pl.level.init >= pl.level.max)
return -EINVAL;
if (pl.level.min == 0)
return -EINVAL;
switch (pl.buftype)
{
switch (pl.buftype) {
case NS_BUFTYPE_SMALL:
if (pl.level.max > TOP_SB)
return -EINVAL;
......@@ -2780,12 +2616,10 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
case NS_ADJBUFLEV:
if (!capable(CAP_NET_ADMIN))
return -EPERM;
btype = (long) arg; /* a long is the same size as a pointer or bigger */
switch (btype)
{
btype = (long)arg; /* a long is the same size as a pointer or bigger */
switch (btype) {
case NS_BUFTYPE_SMALL:
while (card->sbfqc < card->sbnr.init)
{
while (card->sbfqc < card->sbnr.init) {
struct sk_buff *sb;
sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
......@@ -2799,8 +2633,7 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
break;
case NS_BUFTYPE_LARGE:
while (card->lbfqc < card->lbnr.init)
{
while (card->lbfqc < card->lbnr.init) {
struct sk_buff *lb;
lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
......@@ -2814,8 +2647,7 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
break;
case NS_BUFTYPE_HUGE:
while (card->hbpool.count > card->hbnr.init)
{
while (card->hbpool.count > card->hbnr.init) {
struct sk_buff *hb;
spin_lock_irqsave(&card->int_lock, flags);
......@@ -2823,14 +2655,14 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
card->hbpool.count--;
spin_unlock_irqrestore(&card->int_lock, flags);
if (hb == NULL)
printk("nicstar%d: huge buffer count inconsistent.\n",
printk
("nicstar%d: huge buffer count inconsistent.\n",
card->index);
else
dev_kfree_skb_any(hb);
}
while (card->hbpool.count < card->hbnr.init)
{
while (card->hbpool.count < card->hbnr.init) {
struct sk_buff *hb;
hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
......@@ -2845,8 +2677,7 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
break;
case NS_BUFTYPE_IOVEC:
while (card->iovpool.count > card->iovnr.init)
{
while (card->iovpool.count > card->iovnr.init) {
struct sk_buff *iovb;
spin_lock_irqsave(&card->int_lock, flags);
......@@ -2854,14 +2685,14 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
card->iovpool.count--;
spin_unlock_irqrestore(&card->int_lock, flags);
if (iovb == NULL)
printk("nicstar%d: iovec buffer count inconsistent.\n",
printk
("nicstar%d: iovec buffer count inconsistent.\n",
card->index);
else
dev_kfree_skb_any(iovb);
}
while (card->iovpool.count < card->iovnr.init)
{
while (card->iovpool.count < card->iovnr.init) {
struct sk_buff *iovb;
iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
......@@ -2884,8 +2715,7 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
default:
if (dev->phy && dev->phy->ioctl) {
return dev->phy->ioctl(dev, cmd, arg);
}
else {
} else {
printk("nicstar%d: %s == NULL \n", card->index,
dev->phy ? "dev->phy->ioctl" : "dev->phy");
return -ENOIOCTLCMD;
......@@ -2893,13 +2723,11 @@ static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
}
}
static void which_list(ns_dev *card, struct sk_buff *skb)
static void which_list(ns_dev * card, struct sk_buff *skb)
{
printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
}
static void ns_poll(unsigned long arg)
{
int i;
......@@ -2908,8 +2736,7 @@ static void ns_poll(unsigned long arg)
u32 stat_r, stat_w;
PRINTK("nicstar: Entering ns_poll().\n");
for (i = 0; i < num_cards; i++)
{
for (i = 0; i < num_cards; i++) {
card = cards[i];
if (spin_is_locked(&card->int_lock)) {
/* Probably it isn't worth spinning */
......@@ -2934,8 +2761,6 @@ static void ns_poll(unsigned long arg)
PRINTK("nicstar: Leaving ns_poll().\n");
}
static int ns_parse_mac(char *mac, unsigned char *esi)
{
int i, j;
......@@ -2944,15 +2769,13 @@ static int ns_parse_mac(char *mac, unsigned char *esi)
if (mac == NULL || esi == NULL)
return -1;
j = 0;
for (i = 0; i < 6; i++)
{
for (i = 0; i < 6; i++) {
if ((byte1 = ns_h2i(mac[j++])) < 0)
return -1;
if ((byte0 = ns_h2i(mac[j++])) < 0)
return -1;
esi[i] = (unsigned char) (byte1 * 16 + byte0);
if (i < 5)
{
esi[i] = (unsigned char)(byte1 * 16 + byte0);
if (i < 5) {
if (mac[j++] != ':')
return -1;
}
......@@ -2960,21 +2783,17 @@ static int ns_parse_mac(char *mac, unsigned char *esi)
return 0;
}
static short ns_h2i(char c)
{
if (c >= '0' && c <= '9')
return (short) (c - '0');
return (short)(c - '0');
if (c >= 'A' && c <= 'F')
return (short) (c - 'A' + 10);
return (short)(c - 'A' + 10);
if (c >= 'a' && c <= 'f')
return (short) (c - 'a' + 10);
return (short)(c - 'a' + 10);
return -1;
}
static void ns_phy_put(struct atm_dev *dev, unsigned char value,
unsigned long addr)
{
......@@ -2983,15 +2802,13 @@ static void ns_phy_put(struct atm_dev *dev, unsigned char value,
card = dev->dev_data;
spin_lock_irqsave(&card->res_lock, flags);
while(CMD_BUSY(card));
writel((unsigned long) value, card->membase + DR0);
while (CMD_BUSY(card)) ;
writel((unsigned long)value, card->membase + DR0);
writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
card->membase + CMD);
spin_unlock_irqrestore(&card->res_lock, flags);
}
static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
{
ns_dev *card;
......@@ -3000,16 +2817,14 @@ static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
card = dev->dev_data;
spin_lock_irqsave(&card->res_lock, flags);
while(CMD_BUSY(card));
while (CMD_BUSY(card)) ;
writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
card->membase + CMD);
while(CMD_BUSY(card));
while (CMD_BUSY(card)) ;
data = readl(card->membase + DR0) & 0x000000FF;
spin_unlock_irqrestore(&card->res_lock, flags);
return (unsigned char) data;
return (unsigned char)data;
}
module_init(nicstar_init);
module_exit(nicstar_cleanup);
/******************************************************************************
*
/*
* nicstar.h
*
* Header file for the nicstar device driver.
......@@ -8,15 +7,12 @@
* PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
*
* (C) INESC 1998
*
******************************************************************************/
*/
#ifndef _LINUX_NICSTAR_H_
#define _LINUX_NICSTAR_H_
/* Includes *******************************************************************/
/* Includes */
#include <linux/types.h>
#include <linux/pci.h>
......@@ -25,8 +21,7 @@
#include <linux/atmdev.h>
#include <linux/atm_nicstar.h>
/* Options ********************************************************************/
/* Options */
#define NS_MAX_CARDS 4 /* Maximum number of NICStAR based cards
controlled by the device driver. Must
......@@ -51,7 +46,7 @@
128K x 32bit SRAM will limit the maximum
VCI. */
/*#define NS_PCI_LATENCY 64*/ /* Must be a multiple of 32 */
/*#define NS_PCI_LATENCY 64*//* Must be a multiple of 32 */
/* Number of buffers initially allocated */
#define NUM_SB 32 /* Must be even */
......@@ -77,7 +72,6 @@
#define TOP_HB 64
#define TOP_IOVB 256
#define MAX_TBD_PER_VC 1 /* Number of TBDs before a TSR */
#define MAX_TBD_PER_SCQ 10 /* Only meaningful for variable rate SCQs */
......@@ -89,15 +83,12 @@
#define PCR_TOLERANCE (1.0001)
/* ESI stuff ******************************************************************/
/* ESI stuff */
#define NICSTAR_EPROM_MAC_ADDR_OFFSET 0x6C
#define NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT 0xF6
/* #defines *******************************************************************/
/* #defines */
#define NS_IOREMAP_SIZE 4096
......@@ -123,18 +114,15 @@
#define NS_SMSKBSIZE (NS_SMBUFSIZE + NS_AAL0_HEADER)
#define NS_LGSKBSIZE (NS_SMBUFSIZE + NS_LGBUFSIZE)
/* NICStAR structures located in host memory */
/* NICStAR structures located in host memory **********************************/
/* RSQ - Receive Status Queue
/*
* RSQ - Receive Status Queue
*
* Written by the NICStAR, read by the device driver.
*/
typedef struct ns_rsqe
{
typedef struct ns_rsqe {
u32 word_1;
u32 buffer_handle;
u32 final_aal5_crc32;
......@@ -180,20 +168,17 @@ typedef struct ns_rsqe
#define NS_RSQ_NUM_ENTRIES (NS_RSQSIZE / 16)
#define NS_RSQ_ALIGNMENT NS_RSQSIZE
/* RCQ - Raw Cell Queue
/*
* RCQ - Raw Cell Queue
*
* Written by the NICStAR, read by the device driver.
*/
typedef struct cell_payload
{
typedef struct cell_payload {
u32 word[12];
} cell_payload;
typedef struct ns_rcqe
{
typedef struct ns_rcqe {
u32 word_1;
u32 word_2;
u32 word_3;
......@@ -210,15 +195,13 @@ typedef struct ns_rcqe
#define ns_rcqe_nextbufhandle(ns_rcqep) \
(le32_to_cpu((ns_rcqep)->word_2))
/* SCQ - Segmentation Channel Queue
/*
* SCQ - Segmentation Channel Queue
*
* Written by the device driver, read by the NICStAR.
*/
typedef struct ns_scqe
{
typedef struct ns_scqe {
u32 word_1;
u32 word_2;
u32 word_3;
......@@ -231,7 +214,6 @@ typedef struct ns_scqe
#define NS_SCQE_TYPE_TBD 0x00000000
#define NS_SCQE_TYPE_TSR 0x80000000
#define NS_TBD_EOPDU 0x40000000
#define NS_TBD_AAL0 0x00000000
#define NS_TBD_AAL34 0x04000000
......@@ -253,7 +235,6 @@ typedef struct ns_scqe
#define ns_tbd_mkword_4(gfc, vpi, vci, pt, clp) \
(cpu_to_le32((gfc) << 28 | (vpi) << 20 | (vci) << 4 | (pt) << 1 | (clp)))
#define NS_TSR_INTENABLE 0x20000000
#define NS_TSR_SCDISVBR 0xFFFF /* Use as scdi for VBR SCD */
......@@ -273,15 +254,13 @@ typedef struct ns_scqe
#define NS_SCQE_SIZE 16
/* TSQ - Transmit Status Queue
/*
* TSQ - Transmit Status Queue
*
* Written by the NICStAR, read by the device driver.
*/
typedef struct ns_tsi
{
typedef struct ns_tsi {
u32 word_1;
u32 word_2;
} ns_tsi;
......@@ -301,12 +280,10 @@ typedef struct ns_tsi
#define ns_tsi_init(ns_tsip) \
((ns_tsip)->word_2 = cpu_to_le32(NS_TSI_EMPTY))
#define NS_TSQSIZE 8192
#define NS_TSQ_NUM_ENTRIES 1024
#define NS_TSQ_ALIGNMENT 8192
#define NS_TSI_SCDISVBR NS_TSR_SCDISVBR
#define ns_tsi_tmrof(ns_tsip) \
......@@ -316,19 +293,15 @@ typedef struct ns_tsi
#define ns_tsi_getscqpos(ns_tsip) \
(le32_to_cpu((ns_tsip)->word_1) & 0x00007FFF)
/* NICStAR structures located in local SRAM */
/* NICStAR structures located in local SRAM ***********************************/
/* RCT - Receive Connection Table
/*
* RCT - Receive Connection Table
*
* Written by both the NICStAR and the device driver.
*/
typedef struct ns_rcte
{
typedef struct ns_rcte {
u32 word_1;
u32 buffer_handle;
u32 dma_address;
......@@ -360,23 +333,19 @@ typedef struct ns_rcte
/* NOTE: We could make macros to contruct the first word of the RCTE,
but that doesn't seem to make much sense... */
/* FBD - Free Buffer Descriptor
/*
* FBD - Free Buffer Descriptor
*
* Written by the device driver using via the command register.
*/
typedef struct ns_fbd
{
typedef struct ns_fbd {
u32 buffer_handle;
u32 dma_address;
} ns_fbd;
/* TST - Transmit Schedule Table
/*
* TST - Transmit Schedule Table
*
* Written by the device driver.
*/
......@@ -400,15 +369,13 @@ typedef u32 ns_tste;
location of the next TST entry to read.
*/
/* SCD - Segmentation Channel Descriptor
/*
* SCD - Segmentation Channel Descriptor
*
* Written by both the device driver and the NICStAR
*/
typedef struct ns_scd
{
typedef struct ns_scd {
u32 word_1;
u32 word_2;
u32 partial_aal5_crc;
......@@ -428,11 +395,7 @@ typedef struct ns_scd
/* NOTE: There are other fields in word 2 of the SCD, but as they should
not be needed in the device driver they are not defined here. */
/* NICStAR local SRAM memory map **********************************************/
/* NICStAR local SRAM memory map */
#define NS_RCT 0x00000
#define NS_RCT_32_END 0x03FFF
......@@ -455,16 +418,12 @@ typedef struct ns_scd
#define NS_LGFBQ 0x1FC00
#define NS_LGFBQ_END 0x1FFFF
/* NISCtAR operation registers ************************************************/
/* NISCtAR operation registers */
/* See Section 3.4 of `IDT77211 NICStAR User Manual' from www.idt.com */
enum ns_regs
{
DR0 = 0x00, /* Data Register 0 R/W*/
enum ns_regs {
DR0 = 0x00, /* Data Register 0 R/W */
DR1 = 0x04, /* Data Register 1 W */
DR2 = 0x08, /* Data Register 2 W */
DR3 = 0x0C, /* Data Register 3 W */
......@@ -487,9 +446,7 @@ enum ns_regs
VPM = 0x50 /* VPI/VCI Mask W */
};
/* NICStAR commands issued to the CMD register ********************************/
/* NICStAR commands issued to the CMD register */
/* Top 4 bits are command opcode, lower 28 are parameters. */
......@@ -517,8 +474,7 @@ enum ns_regs
#define NS_CMD_OPEN_CONNECTION (NS_CMD_OPENCLOSE_CONNECTION | 0x00080000)
#define NS_CMD_CLOSE_CONNECTION NS_CMD_OPENCLOSE_CONNECTION
/* NICStAR configuration bits *************************************************/
/* NICStAR configuration bits */
#define NS_CFG_SWRST 0x80000000 /* Software Reset */
#define NS_CFG_RXPATH 0x20000000 /* Receive Path Enable */
......@@ -579,8 +535,7 @@ enum ns_regs
#define NS_CFG_RXINT_624US 0x00003000
#define NS_CFG_RXINT_899US 0x00004000
/* NICStAR STATus bits ********************************************************/
/* NICStAR STATus bits */
#define NS_STAT_SFBQC_MASK 0xFF000000 /* hi 8 bits Small Buffer Queue Count */
#define NS_STAT_LFBQC_MASK 0x00FF0000 /* hi 8 bits Large Buffer Queue Count */
......@@ -602,10 +557,7 @@ enum ns_regs
#define ns_stat_sfbqc_get(stat) (((stat) & NS_STAT_SFBQC_MASK) >> 23)
#define ns_stat_lfbqc_get(stat) (((stat) & NS_STAT_LFBQC_MASK) >> 15)
/* #defines which depend on other #defines ************************************/
/* #defines which depend on other #defines */
#define NS_TST0 NS_TST_FRSCD
#define NS_TST1 (NS_TST_FRSCD + NS_TST_NUM_ENTRIES + 1)
......@@ -672,8 +624,7 @@ enum ns_regs
#define NS_CFG_TSQFIE_OPT 0x00000000
#endif /* ENABLE_TSQFIE */
/* PCI stuff ******************************************************************/
/* PCI stuff */
#ifndef PCI_VENDOR_ID_IDT
#define PCI_VENDOR_ID_IDT 0x111D
......@@ -683,10 +634,7 @@ enum ns_regs
#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
#endif /* PCI_DEVICE_ID_IDT_IDT77201 */
/* Device driver structures ***************************************************/
/* Device driver structures */
struct ns_skb_cb {
u32 buf_type; /* BUF_SM/BUF_LG/BUF_NONE */
......@@ -694,17 +642,14 @@ struct ns_skb_cb {
#define NS_SKB_CB(skb) ((struct ns_skb_cb *)((skb)->cb))
typedef struct tsq_info
{
typedef struct tsq_info {
void *org;
ns_tsi *base;
ns_tsi *next;
ns_tsi *last;
} tsq_info;
typedef struct scq_info
{
typedef struct scq_info {
void *org;
ns_scqe *base;
ns_scqe *last;
......@@ -721,19 +666,14 @@ typedef struct scq_info
spinlock_t lock; /* SCQ spinlock */
} scq_info;
typedef struct rsq_info
{
typedef struct rsq_info {
void *org;
ns_rsqe *base;
ns_rsqe *next;
ns_rsqe *last;
} rsq_info;
typedef struct skb_pool
{
typedef struct skb_pool {
volatile int count; /* number of buffers in the queue */
struct sk_buff_head queue;
} skb_pool;
......@@ -742,9 +682,7 @@ typedef struct skb_pool
actual value used for buffer management is the one read from the
card. */
typedef struct vc_map
{
typedef struct vc_map {
volatile unsigned int tx:1; /* TX vc? */
volatile unsigned int rx:1; /* RX vc? */
struct atm_vcc *tx_vcc, *rx_vcc;
......@@ -755,18 +693,14 @@ typedef struct vc_map
int tbd_count;
} vc_map;
struct ns_skb_data
{
struct ns_skb_data {
struct atm_vcc *vcc;
int iovcnt;
};
#define NS_SKB(skb) (((struct ns_skb_data *) (skb)->cb))
typedef struct ns_dev
{
typedef struct ns_dev {
int index; /* Card ID to the device driver */
int sram_size; /* In k x 32bit words. 32 or 128 */
void __iomem *membase; /* Card's memory base address */
......@@ -806,7 +740,6 @@ typedef struct ns_dev
spinlock_t res_lock; /* Card resource lock */
} ns_dev;
/* NOTE: Each tste2vc entry relates a given TST entry to the corresponding
CBR vc. If the entry is not allocated, it must be NULL.
......@@ -816,5 +749,4 @@ typedef struct ns_dev
scd2vc allows us to find out unused fixed rate SCDs, because
they must have a NULL pointer here. */
#endif /* _LINUX_NICSTAR_H_ */
......@@ -13,15 +13,15 @@ typedef void __iomem *virt_addr_t;
#define CYCLE_DELAY 5
/* This was the original definition
/*
This was the original definition
#define osp_MicroDelay(microsec) \
do { int _i = 4*microsec; while (--_i > 0) { __SLOW_DOWN_IO; }} while (0)
*/
#define osp_MicroDelay(microsec) {unsigned long useconds = (microsec); \
udelay((useconds));}
/* The following tables represent the timing diagrams found in
/*
* The following tables represent the timing diagrams found in
* the Data Sheet for the Xicor X25020 EEProm. The #defines below
* represent the bits in the NICStAR's General Purpose register
* that must be toggled for the corresponding actions on the EEProm
......@@ -32,7 +32,7 @@ typedef void __iomem *virt_addr_t;
/* Read Data From EEProm on falling edge of CLK */
#define CS_HIGH 0x0002 /* Chip select high */
#define CS_LOW 0x0000 /* Chip select low (active low)*/
#define CS_LOW 0x0000 /* Chip select low (active low) */
#define CLK_HIGH 0x0004 /* Clock high */
#define CLK_LOW 0x0000 /* Clock low */
#define SI_HIGH 0x0001 /* Serial input data high */
......@@ -40,8 +40,7 @@ typedef void __iomem *virt_addr_t;
/* Read Status Register = 0000 0101b */
#if 0
static u_int32_t rdsrtab[] =
{
static u_int32_t rdsrtab[] = {
CS_HIGH | CLK_HIGH,
CS_LOW | CLK_LOW,
CLK_HIGH, /* 0 */
......@@ -62,10 +61,8 @@ static u_int32_t rdsrtab[] =
};
#endif /* 0 */
/* Read from EEPROM = 0000 0011b */
static u_int32_t readtab[] =
{
static u_int32_t readtab[] = {
/*
CS_HIGH | CLK_HIGH,
*/
......@@ -87,10 +84,8 @@ static u_int32_t readtab[] =
CLK_HIGH | SI_HIGH /* 1 */
};
/* Clock to read from/write to the eeprom */
static u_int32_t clocktab[] =
{
static u_int32_t clocktab[] = {
CLK_LOW,
CLK_HIGH,
CLK_LOW,
......@@ -110,7 +105,6 @@ static u_int32_t clocktab[] =
CLK_LOW
};
#define NICSTAR_REG_WRITE(bs, reg, val) \
while ( readl(bs + STAT) & 0x0200 ) ; \
writel((val),(base)+(reg))
......@@ -124,101 +118,92 @@ static u_int32_t clocktab[] =
* register.
*/
#if 0
u_int32_t
nicstar_read_eprom_status( virt_addr_t base )
u_int32_t nicstar_read_eprom_status(virt_addr_t base)
{
u_int32_t val;
u_int32_t rbyte;
int32_t i, j;
/* Send read instruction */
val = NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) & 0xFFFFFFF0;
val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
for (i=0; i<ARRAY_SIZE(rdsrtab); i++)
{
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | rdsrtab[i]) );
osp_MicroDelay( CYCLE_DELAY );
for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | rdsrtab[i]));
osp_MicroDelay(CYCLE_DELAY);
}
/* Done sending instruction - now pull data off of bit 16, MSB first */
/* Data clocked out of eeprom on falling edge of clock */
rbyte = 0;
for (i=7, j=0; i>=0; i--)
{
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]) );
rbyte |= (((NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE)
for (i = 7, j = 0; i >= 0; i--) {
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]));
rbyte |= (((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
& 0x00010000) >> 16) << i);
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]) );
osp_MicroDelay( CYCLE_DELAY );
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]));
osp_MicroDelay(CYCLE_DELAY);
}
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 2 );
osp_MicroDelay( CYCLE_DELAY );
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
osp_MicroDelay(CYCLE_DELAY);
return rbyte;
}
#endif /* 0 */
/*
* This routine will clock the Read_data function into the X2520
* eeprom, followed by the address to read from, through the NicSTaR's General
* Purpose register.
*/
static u_int8_t
read_eprom_byte(virt_addr_t base, u_int8_t offset)
static u_int8_t read_eprom_byte(virt_addr_t base, u_int8_t offset)
{
u_int32_t val = 0;
int i,j=0;
int i, j = 0;
u_int8_t tempread = 0;
val = NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) & 0xFFFFFFF0;
val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
/* Send READ instruction */
for (i=0; i<ARRAY_SIZE(readtab); i++)
{
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | readtab[i]) );
osp_MicroDelay( CYCLE_DELAY );
for (i = 0; i < ARRAY_SIZE(readtab); i++) {
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | readtab[i]));
osp_MicroDelay(CYCLE_DELAY);
}
/* Next, we need to send the byte address to read from */
for (i=7; i>=0; i--)
{
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++] | ((offset >> i) & 1) ) );
for (i = 7; i >= 0; i--) {
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++] | ((offset >> i) & 1)));
osp_MicroDelay(CYCLE_DELAY);
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++] | ((offset >> i) & 1)));
osp_MicroDelay(CYCLE_DELAY);
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++] | ((offset >> i) & 1) ) );
osp_MicroDelay( CYCLE_DELAY );
}
j = 0;
/* Now, we can read data from the eeprom by clocking it in */
for (i=7; i>=0; i--)
{
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]) );
osp_MicroDelay( CYCLE_DELAY );
tempread |= (((NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE )
for (i = 7; i >= 0; i--) {
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]));
osp_MicroDelay(CYCLE_DELAY);
tempread |=
(((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
& 0x00010000) >> 16) << i);
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]) );
osp_MicroDelay( CYCLE_DELAY );
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | clocktab[j++]));
osp_MicroDelay(CYCLE_DELAY);
}
NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 2 );
osp_MicroDelay( CYCLE_DELAY );
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
osp_MicroDelay(CYCLE_DELAY);
return tempread;
}
static void
nicstar_init_eprom( virt_addr_t base )
static void nicstar_init_eprom(virt_addr_t base)
{
u_int32_t val;
......@@ -229,48 +214,35 @@ nicstar_init_eprom( virt_addr_t base )
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | CS_HIGH | CLK_HIGH));
osp_MicroDelay( CYCLE_DELAY );
osp_MicroDelay(CYCLE_DELAY);
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | CS_HIGH | CLK_LOW));
osp_MicroDelay( CYCLE_DELAY );
osp_MicroDelay(CYCLE_DELAY);
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | CS_HIGH | CLK_HIGH));
osp_MicroDelay( CYCLE_DELAY );
osp_MicroDelay(CYCLE_DELAY);
NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
(val | CS_HIGH | CLK_LOW));
osp_MicroDelay( CYCLE_DELAY );
osp_MicroDelay(CYCLE_DELAY);
}
/*
* This routine will be the interface to the ReadPromByte function
* above.
*/
static void
nicstar_read_eprom(
virt_addr_t base,
u_int8_t prom_offset,
u_int8_t *buffer,
u_int32_t nbytes )
nicstar_read_eprom(virt_addr_t base,
u_int8_t prom_offset, u_int8_t * buffer, u_int32_t nbytes)
{
u_int i;
for (i=0; i<nbytes; i++)
{
buffer[i] = read_eprom_byte( base, prom_offset );
for (i = 0; i < nbytes; i++) {
buffer[i] = read_eprom_byte(base, prom_offset);
++prom_offset;
osp_MicroDelay( CYCLE_DELAY );
osp_MicroDelay(CYCLE_DELAY);
}
}
/*
void osp_MicroDelay(int x) {
}
*/
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