Commit 0a3cec77 authored by Dave Jones's avatar Dave Jones

Merge tetrachloride.(none):/mnt/raid/src/kernel/2.5/bk-linus

into tetrachloride.(none):/mnt/raid/src/kernel/2.5/watchdog
parents d691958b 9cb8e9c3
/* /*
* drivers/char/shwdt.c * drivers/char/shwdt.c
* *
* Watchdog driver for integrated watchdog in the SuperH 3/4 processors. * Watchdog driver for integrated watchdog in the SuperH processors.
* *
* Copyright (C) 2001 Paul Mundt <lethal@chaoticdreams.org> * Copyright (C) 2001, 2002 Paul Mundt <lethal@0xd6.org>
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -26,14 +26,17 @@ ...@@ -26,14 +26,17 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#if defined(CONFIG_CPU_SH4) #if defined(CONFIG_CPU_SH5)
#define WTCNT CPRC_BASE + 0x10
#define WTCSR CPRC_BASE + 0x18
#elif defined(CONFIG_CPU_SH4)
#define WTCNT 0xffc00008 #define WTCNT 0xffc00008
#define WTCSR 0xffc0000c #define WTCSR 0xffc0000c
#elif defined(CONFIG_CPU_SH3) #elif defined(CONFIG_CPU_SH3)
#define WTCNT 0xffffff84 #define WTCNT 0xffffff84
#define WTCSR 0xffffff86 #define WTCSR 0xffffff86
#else #else
#error "Can't use SH 3/4 watchdog on non-SH 3/4 processor." #error "Can't use SuperH watchdog on this platform"
#endif #endif
#define WTCNT_HIGH 0x5a00 #define WTCNT_HIGH 0x5a00
...@@ -405,8 +408,8 @@ static void __exit sh_wdt_exit(void) ...@@ -405,8 +408,8 @@ static void __exit sh_wdt_exit(void)
misc_deregister(&sh_wdt_miscdev); misc_deregister(&sh_wdt_miscdev);
} }
MODULE_AUTHOR("Paul Mundt <lethal@chaoticdreams.org>"); MODULE_AUTHOR("Paul Mundt <lethal@0xd6.org>");
MODULE_DESCRIPTION("SH 3/4 watchdog driver"); MODULE_DESCRIPTION("SuperH watchdog driver");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_PARM(clock_division_ratio, "i"); MODULE_PARM(clock_division_ratio, "i");
MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7."); MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7.");
......
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