Commit 0e2bbf65 authored by Arushi Singhal's avatar Arushi Singhal Committed by Greg Kroah-Hartman

staging: rtl8712: Remove multiple blank line(s)

Remove extra blank line(s) to conform to the Linux
kernel coding style. Issue found using checkpatch.
Signed-off-by: default avatarArushi Singhal <arushisinghal19971997@gmail.com>
Acked-by: default avatarJulia Lawall <julia.lawall@lip6.fr>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3b210964
...@@ -347,7 +347,6 @@ u8 r8712_free_drv_sw(struct _adapter *padapter) ...@@ -347,7 +347,6 @@ u8 r8712_free_drv_sw(struct _adapter *padapter)
return _SUCCESS; return _SUCCESS;
} }
static void enable_video_mode(struct _adapter *padapter, int cbw40_value) static void enable_video_mode(struct _adapter *padapter, int cbw40_value)
{ {
/* bit 8: /* bit 8:
......
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
* *
******************************************************************************/ ******************************************************************************/
#ifndef __RTL8712_BITDEF_H__ #ifndef __RTL8712_BITDEF_H__
#define __RTL8712_BITDEF_H__ #define __RTL8712_BITDEF_H__
......
...@@ -20,7 +20,6 @@ ...@@ -20,7 +20,6 @@
#ifndef __RTL8712_CMDCTRL_REGDEF_H__ #ifndef __RTL8712_CMDCTRL_REGDEF_H__
#define __RTL8712_CMDCTRL_REGDEF_H__ #define __RTL8712_CMDCTRL_REGDEF_H__
#define CR (RTL8712_CMDCTRL_ + 0x0000) #define CR (RTL8712_CMDCTRL_ + 0x0000)
#define TXPAUSE (RTL8712_CMDCTRL_ + 0x0002) #define TXPAUSE (RTL8712_CMDCTRL_ + 0x0002)
#define TCR (RTL8712_CMDCTRL_ + 0x0004) #define TCR (RTL8712_CMDCTRL_ + 0x0004)
...@@ -29,6 +28,5 @@ ...@@ -29,6 +28,5 @@
#define SYSF_CFG (RTL8712_CMDCTRL_ + 0x000D) #define SYSF_CFG (RTL8712_CMDCTRL_ + 0x000D)
#define MBIDCTRL (RTL8712_CMDCTRL_ + 0x000E) #define MBIDCTRL (RTL8712_CMDCTRL_ + 0x000E)
#endif /* __RTL8712_CMDCTRL_REGDEF_H__ */ #endif /* __RTL8712_CMDCTRL_REGDEF_H__ */
...@@ -51,5 +51,4 @@ ...@@ -51,5 +51,4 @@
/*FDLOCKFLAG1*/ /*FDLOCKFLAG1*/
#define _LOCKFLAG1_MSK 0x03 #define _LOCKFLAG1_MSK 0x03
#endif /* __RTL8712_DEBUGCTRL_BITDEF_H__ */ #endif /* __RTL8712_DEBUGCTRL_BITDEF_H__ */
...@@ -41,7 +41,5 @@ ...@@ -41,7 +41,5 @@
#define TRXPKTBUF_DBG_CTRL (RTL8712_DEBUGCTRL_ + 0x38) #define TRXPKTBUF_DBG_CTRL (RTL8712_DEBUGCTRL_ + 0x38)
#define DPLL_MON (RTL8712_DEBUGCTRL_ + 0x3A) #define DPLL_MON (RTL8712_DEBUGCTRL_ + 0x3A)
#endif /* __RTL8712_DEBUGCTRL_REGDEF_H__ */ #endif /* __RTL8712_DEBUGCTRL_REGDEF_H__ */
...@@ -140,6 +140,5 @@ ...@@ -140,6 +140,5 @@
/*TXFF_PG_NUM*/ /*TXFF_PG_NUM*/
#define _TXFF_PG_NUM_MSK 0x0FFF #define _TXFF_PG_NUM_MSK 0x0FFF
#endif /* __RTL8712_FIFOCTRL_BITDEF_H__ */ #endif /* __RTL8712_FIFOCTRL_BITDEF_H__ */
...@@ -71,6 +71,4 @@ ...@@ -71,6 +71,4 @@
#define TXQ_PGADD (RTL8712_FIFOCTRL_ + 0xB3) #define TXQ_PGADD (RTL8712_FIFOCTRL_ + 0xB3)
#define TXFF_PG_NUM (RTL8712_FIFOCTRL_ + 0xB4) #define TXFF_PG_NUM (RTL8712_FIFOCTRL_ + 0xB4)
#endif /* __RTL8712_FIFOCTRL_REGDEF_H__ */ #endif /* __RTL8712_FIFOCTRL_REGDEF_H__ */
...@@ -37,6 +37,5 @@ ...@@ -37,6 +37,5 @@
#define PHY_REG_RPT (RTL8712_GP_ + 0x13) #define PHY_REG_RPT (RTL8712_GP_ + 0x13)
#define PHY_REG_DATA (RTL8712_GP_ + 0x14) #define PHY_REG_DATA (RTL8712_GP_ + 0x14)
#endif /*__RTL8712_GP_REGDEF_H__ */ #endif /*__RTL8712_GP_REGDEF_H__ */
...@@ -53,6 +53,5 @@ ...@@ -53,6 +53,5 @@
#define _VODOK BIT(1) #define _VODOK BIT(1)
#define _RXOK BIT(0) #define _RXOK BIT(0)
#endif /*__RTL8712_INTERRUPT_BITDEF_H__*/ #endif /*__RTL8712_INTERRUPT_BITDEF_H__*/
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