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Commit 115f4504 authored by James Simmons's avatar James Simmons
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Removed currcon and other console related code. Very little is now left.

parent 5916159c
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Showing with 708 additions and 639 deletions
drivers/video/anakinfb.c
View file @ 115f4504
......@@ -75,13 +75,11 @@ anakinfb_init(void)
memset(&fb_info, 0, sizeof(struct fb_info));
fb_info.node = NODEV;
fb_info.currcon = -1;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.fbops = &anakinfb_ops;
fb_info.var = anakinfb_var;
fb_info.fix = anakinfb_fix;
strcpy(fb_info.fontname, "VGA8x16");
fb_info.updatevar = gen_update_var;
if (!(request_mem_region(VGA_START, VGA_SIZE, "vga")))
return -ENOMEM;
if (fb_info.screen_base = ioremap(VGA_START, VGA_SIZE)) {
......
drivers/video/clps711xfb.c
View file @ 115f4504
......@@ -264,13 +264,11 @@ int __init clps711xfb_init(void)
memset(cfb, 0, sizeof(*cfb));
memset((void *)PAGE_OFFSET, 0, 0x14000);
cfb->currcon = -1;
strcpy(cfb->fix.id, "clps7111");
cfb->screen_base = (void *)PAGE_OFFSET;
cfb->fix.smem_start = PAGE_OFFSET;
cfb->fix.smem_len = 0x14000;
cfb->fix.type = FB_TYPE_PACKED_PIXELS;
cfb->fix.type = FB_TYPE_PACKED_PIXELS;
cfb->var.xres = 640;
cfb->var.xres_virtual = 640;
......@@ -283,7 +281,6 @@ int __init clps711xfb_init(void)
cfb->var.width = -1;
cfb->fbops = &clps7111fb_ops;
cfb->updatevar = gen_update_var;
cfb->flags = FBINFO_FLAG_DEFAULT;
fb_alloc_cmap(&cfb->cmap, CMAP_SIZE, 0);
......
drivers/video/dnfb.c
View file @ 115f4504
......@@ -235,10 +235,8 @@ unsigned long __init dnfb_init(unsigned long mem_start)
int err;
fb_info.fontname[0] = 0;
fb_info.updatevar = gen_update_var;
fb_info.node = NODEV;
fb_info.fbops = &dn_fb_ops;
fb_info.currcon = -1;
fb_info.fix = dnfb_fix;
fb_info.var = dnfb_var;
fb_info.screen_base = (u_char *) fb_info.fix.smem_start;
......
drivers/video/fbcon-vga-planes.c
View file @ 115f4504
......@@ -105,10 +105,9 @@ void fbcon_vga_planes_setup(struct display *p)
void fbcon_vga_planes_bmove(struct display *p, int sy, int sx, int dy, int dx,
int height, int width)
{
char *src;
char *dest;
int line_ofs;
int x;
struct fb_info *info = p->fb_info;
char *dest, *src;
int line_ofs, x;
setmode(1);
setop(0);
......@@ -119,9 +118,9 @@ void fbcon_vga_planes_bmove(struct display *p, int sy, int sx, int dy, int dx,
height *= fontheight(p);
if (dy < sy || (dy == sy && dx < sx)) {
line_ofs = p->fb_info->fix.line_length - width;
dest = p->fb_info->screen_base + dx + dy * p->fb_info->fix.line_length;
src = p->fb_info->screen_base + sx + sy * p->fb_info->fix.line_length;
line_ofs = info->fix.line_length - width;
dest = info->screen_base + dx + dy * info->fix.line_length;
src = info->screen_base + sx + sy * info->fix.line_length;
while (height--) {
for (x = 0; x < width; x++) {
readb(src);
......@@ -133,9 +132,9 @@ void fbcon_vga_planes_bmove(struct display *p, int sy, int sx, int dy, int dx,
dest += line_ofs;
}
} else {
line_ofs = p->fb_info->fix.line_length - width;
dest = p->fb_info->screen_base + dx + width + (dy + height - 1) * p->fb_info->fix.line_length;
src = p->fb_info->screen_base + sx + width + (sy + height - 1) * p->fb_info->fix.line_length;
line_ofs = info->fix.line_length - width;
dest = info->screen_base + dx + width + (dy + height - 1) * info->fix.line_length;
src = info->screen_base + sx + width + (sy + height - 1) * info->fix.line_length;
while (height--) {
for (x = 0; x < width; x++) {
dest--;
......@@ -177,137 +176,48 @@ void fbcon_vga_planes_clear(struct vc_data *conp, struct display *p, int sy, int
}
}
void fbcon_ega_planes_putc(struct vc_data *conp, struct display *p, int c, int yy, int xx)
{
int fg = attr_fgcol(p,c);
int bg = attr_bgcol(p,c);
int y;
u8 *cdat = p->fontdata + (c & p->charmask) * fontheight(p);
char *where = p->fb_info->screen_base + xx + yy * p->fb_info->fix.line_length * fontheight(p);
setmode(0);
setop(0);
setsr(0xf);
setcolor(bg);
selectmask();
setmask(0xff);
for (y = 0; y < fontheight(p); y++, where += p->fb_info->fix.line_length)
rmw(where);
where -= p->fb_info->fix.line_length * y;
setcolor(fg);
selectmask();
for (y = 0; y < fontheight(p); y++, where += p->fb_info->fix.line_length)
if (cdat[y]) {
setmask(cdat[y]);
rmw(where);
}
}
void fbcon_vga_planes_putc(struct vc_data *conp, struct display *p, int c, int yy, int xx)
{
int fg = attr_fgcol(p,c);
int bg = attr_bgcol(p,c);
int y;
u8 *cdat = p->fontdata + (c & p->charmask) * fontheight(p);
char *where = p->fb_info->screen_base + xx + yy * p->fb_info->fix.line_length * fontheight(p);
setmode(2);
setop(0);
setsr(0xf);
setcolor(fg);
selectmask();
setmask(0xff);
writeb(bg, where);
rmb();
readb(where); /* fill latches */
setmode(3);
wmb();
for (y = 0; y < fontheight(p); y++, where += p->fb_info->fix.line_length)
writeb(cdat[y], where);
wmb();
}
/* 28.50 in my test */
void fbcon_ega_planes_putcs(struct vc_data *conp, struct display *p, const unsigned short *s,
int count, int yy, int xx)
void fbcon_accel_putc(struct vc_data *vc, struct display *p, int c, int yy,
int xx)
{
u16 c = scr_readw(s);
int fg = attr_fgcol(p, c);
int bg = attr_bgcol(p, c);
char *where;
int n;
setmode(2);
setop(0);
selectmask();
setmask(0xff);
where = p->fb_info->screen_base + xx + yy * p->fb_info->fix.line_length * fontheight(p);
writeb(bg, where);
rmb();
readb(where); /* fill latches */
wmb();
selectmask();
for (n = 0; n < count; n++) {
int c = scr_readw(s++) & p->charmask;
u8 *cdat = p->fontdata + c * fontheight(p);
u8 *end = cdat + fontheight(p);
while (cdat < end) {
outb(*cdat++, GRAPHICS_DATA_REG);
wmb();
writeb(fg, where);
where += p->fb_info->fix.line_length;
}
where += 1 - p->fb_info->fix.line_length * fontheight(p);
}
wmb();
struct fb_info *info = p->fb_info;
unsigned short charmask = p->charmask;
unsigned int width = ((fontwidth(p)+7)>>3);
struct fb_image image;
image.fg_color = attr_fgcol(p, c);
image.bg_color = attr_bgcol(p, c);
image.dx = xx * fontwidth(p);
image.dy = yy * fontheight(p);
image.width = fontwidth(p);
image.height = fontheight(p);
image.depth = 1;
image.data = p->fontdata + (c & charmask)*fontheight(p)*width;
info->fbops->fb_imageblit(info, &image);
}
/* 6.96 in my test */
void fbcon_vga_planes_putcs(struct vc_data *conp, struct display *p, const unsigned short *s,
int count, int yy, int xx)
void fbcon_accel_putcs(struct vc_data *vc, struct display *p,
const unsigned short *s, int count, int yy, int xx)
{
u16 c = scr_readw(s);
int fg = attr_fgcol(p, c);
int bg = attr_bgcol(p, c);
char *where;
int n;
setmode(2);
setop(0);
setsr(0xf);
setcolor(fg);
selectmask();
setmask(0xff);
where = p->fb_info->screen_base + xx + yy * p->fb_info->fix.line_length * fontheight(p);
writeb(bg, where);
rmb();
readb(where); /* fill latches */
setmode(3);
wmb();
for (n = 0; n < count; n++) {
int y;
int c = scr_readw(s++) & p->charmask;
u8 *cdat = p->fontdata + (c & p->charmask) * fontheight(p);
for (y = 0; y < fontheight(p); y++, cdat++) {
writeb (*cdat, where);
where += p->fb_info->fix.line_length;
}
where += 1 - p->fb_info->fix.line_length * fontheight(p);
}
wmb();
struct fb_info *info = p->fb_info;
unsigned short charmask = p->charmask;
unsigned int width = ((fontwidth(p)+7)>>3);
struct fb_image image;
image.fg_color = attr_fgcol(p, *s);
image.bg_color = attr_bgcol(p, *s);
image.dx = xx * fontwidth(p);
image.dy = yy * fontheight(p);
image.width = fontwidth(p);
image.height = fontheight(p);
image.depth = 1;
while (count--) {
image.data = p->fontdata +
(scr_readw(s++) & charmask) * fontheight(p) * width;
info->fbops->fb_imageblit(info, &image);
image.dx += fontwidth(p);
}
}
void fbcon_vga_planes_revc(struct display *p, int xx, int yy)
......@@ -332,18 +242,8 @@ struct display_switch fbcon_vga_planes = {
setup: fbcon_vga_planes_setup,
bmove: fbcon_vga_planes_bmove,
clear: fbcon_vga_planes_clear,
putc: fbcon_vga_planes_putc,
putcs: fbcon_vga_planes_putcs,
revc: fbcon_vga_planes_revc,
fontwidthmask: FONTWIDTH(8)
};
struct display_switch fbcon_ega_planes = {
setup: fbcon_vga_planes_setup,
bmove: fbcon_vga_planes_bmove,
clear: fbcon_vga_planes_clear,
putc: fbcon_ega_planes_putc,
putcs: fbcon_ega_planes_putcs,
putc: fbcon_accel_putc,
putcs: fbcon_accel_putcs,
revc: fbcon_vga_planes_revc,
fontwidthmask: FONTWIDTH(8)
};
......@@ -369,14 +269,8 @@ EXPORT_SYMBOL(fbcon_vga_planes);
EXPORT_SYMBOL(fbcon_vga_planes_setup);
EXPORT_SYMBOL(fbcon_vga_planes_bmove);
EXPORT_SYMBOL(fbcon_vga_planes_clear);
EXPORT_SYMBOL(fbcon_vga_planes_putc);
EXPORT_SYMBOL(fbcon_vga_planes_putcs);
EXPORT_SYMBOL(fbcon_vga_planes_revc);
EXPORT_SYMBOL(fbcon_ega_planes);
EXPORT_SYMBOL(fbcon_ega_planes_putc);
EXPORT_SYMBOL(fbcon_ega_planes_putcs);
/*
* Overrides for Emacs so that we follow Linus's tabbing style.
* ---------------------------------------------------------------------------
......
drivers/video/fbmem.c
View file @ 115f4504
......@@ -749,6 +749,7 @@ register_framebuffer(struct fb_info *fb_info)
if (!registered_fb[i])
break;
fb_info->node = mk_kdev(FB_MAJOR, i);
fb_info->currcon = -1;
registered_fb[i] = fb_info;
if (!fb_ever_opened[i]) {
struct module *owner = fb_info->fbops->owner;
......
drivers/video/fm2fb.c
View file @ 115f4504
......@@ -268,8 +268,6 @@ int __init fm2fb_init(void)
fb_info.flags = FBINFO_FLAG_DEFAULT;
/* The below feilds will go away !!!! */
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_alloc_cmap(&fb_info.cmap, 16, 0);
if (register_framebuffer(&fb_info) < 0)
......
drivers/video/g364fb.c
View file @ 115f4504
......@@ -243,9 +243,7 @@ int __init g364fb_init(void)
fb_info.fix = fb_fix;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.currcon = -1;
fb_info.fontname[0] = '\0';
fb_info.updatevar = gen_update_var;
fb_alloc_cmap(&fb_info.cmap, 255, 0);
if (register_framebuffer(&fb_info) < 0)
......
drivers/video/hitfb.c
View file @ 115f4504
......@@ -162,8 +162,6 @@ int __init hitfb_init(void)
fb_info.pseudo_palette = pseudo_palette;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_info.screen_base = (void *) hitfb_fix.smem_start;
size = (fb_info.var.bits_per_pixel == 8) ? 256 : 16;
......
drivers/video/hpfb.c
View file @ 115f4504
......@@ -158,9 +158,6 @@ int __init hpfb_init_one(unsigned long base)
fb_info.fix = hpfb_fix;
fb_info.screen_base = (char *)hpfb_fix.smem_start; // FIXME
/* The below feilds will go away !!!! */
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_alloc_cmap(&fb_info.cmap, 256, 0);
if (register_framebuffer(&fb_info) < 0)
......
drivers/video/offb.c
View file @ 115f4504
......@@ -530,9 +530,7 @@ static void __init offb_init_fb(const char *name, const char *full_name,
info->screen_base = ioremap(address, fix->smem_len);
info->par = par;
info->pseudo_palette = (void *) (info + 1);
info->currcon = -1;
info->fontname[0] = '\0';
info->updatevar = gen_update_var;
info->flags = FBINFO_FLAG_DEFAULT;
fb_alloc_cmap(&info->cmap, 256, 0);
......
drivers/video/pmag-ba-fb.c
View file @ 115f4504
......@@ -36,8 +36,6 @@
#include <asm/dec/tc.h>
#include "pmag-ba-fb.h"
#include <video/fbcon.h>
struct pmag_ba_ramdac_regs {
unsigned char addr_low;
unsigned char pad0[3];
......
drivers/video/q40fb.c
View file @ 115f4504
......@@ -112,8 +112,6 @@ int q40fb_init(void)
fb_info.screen_base = (char *) q40fb_fix.smem_start;
/* The below feilds will go away !!!! */
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_alloc_cmap(&fb_info.cmap, 16, 0);
master_outb(3, DISPLAY_CONTROL_REG);
......
drivers/video/sgivwfb.c
View file @ 115f4504
......@@ -719,8 +719,6 @@ int __init sgivwfb_init(void)
fb_info.fbops = &sgivwfb_ops;
fb_info.pseudo_palette = pseudo_palette;
fb_info.par = &default_par;
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.screen_base =
......
drivers/video/skeletonfb.c
View file @ 115f4504
......@@ -418,15 +418,6 @@ int __init xxxfb_init(void)
info.flags = FBINFO_FLAG_DEFAULT;
info.par = current_par;
/* The following has to be set but in th efuture will go away */
strcpy(info.modename, xxxfb_fix.id);
info.changevar = NULL;
info.currcon = -1;
info.disp = &disp;
info.switch_con = gen_switch;
info.updatevar = gen_update_var;
/*
* This should give a reasonable default video mode. The following is
* done when we can set a video mode.
......
drivers/video/tdfxfb.c
View file @ 115f4504
......@@ -1074,11 +1074,6 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
info->pseudo_palette = (void *)(info->par + 1);
info->flags = FBINFO_FLAG_DEFAULT;
/* The below fields will go away !!!! */
strcpy(info->modename, info->fix.id);
info->currcon = -1;
info->updatevar = gen_update_var;
if (!mode_option)
mode_option = "640x480@60";
......
drivers/video/tx3912fb.c
View file @ 115f4504
......@@ -292,12 +292,10 @@ int __init tx3912fb_init(void)
return -ENOMEM;
fb_info.node = NODEV;
fb_info.currcon = -1;
fb_info.fbops = &tx3912fb_ops;
fb_info.var = tx3912fb_var;
fb_info.fix = tx3912fb_fix;
fb_info.pseudo_palette = pseudo_palette;
fb_info.updatevar = gen_update_var;
fb_info.flags = FBINFO_FLAG_DEFAULT;
/* Clear the framebuffer */
......
drivers/video/vesafb.c
View file @ 115f4504
......@@ -348,7 +348,6 @@ int __init vesafb_init(void)
fb_info.fbops = &vesafb_ops;
fb_info.var = vesafb_defined;
fb_info.fix = vesafb_fix;
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_info.pseudo_palette = pseudo_palette;
fb_info.flags = FBINFO_FLAG_DEFAULT;
......
drivers/video/vfb.c
View file @ 115f4504
......@@ -439,9 +439,6 @@ int __init vfb_init(void)
fb_info.pseudo_palette = &vfb_pseudo_palette;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.currcon = -1;
fb_info.updatevar = gen_update_var;
fb_alloc_cmap(&fb_info.cmap, 256, 0);
if (register_framebuffer(&fb_info) < 0) {
......
drivers/video/vga16fb.c
View file @ 115f4504
......@@ -27,10 +27,22 @@
#include <video/fbcon.h>
#include <video/fbcon-vga-planes.h>
#include <video/fbcon-vga.h>
#include <video/fbcon-cfb4.h>
#include <video/fbcon-cfb8.h>
#include "vga.h"
#define dac_reg (0x3c8)
#define dac_val (0x3c9)
#define GRAPHICS_ADDR_REG 0x3ce /* Graphics address register. */
#define GRAPHICS_DATA_REG 0x3cf /* Graphics data register. */
#define SET_RESET_INDEX 0 /* Set/Reset Register index. */
#define ENABLE_SET_RESET_INDEX 1 /* Enable Set/Reset Register index. */
#define DATA_ROTATE_INDEX 3 /* Data Rotate Register index. */
#define GRAPHICS_MODE_INDEX 5 /* Graphics Mode Register index. */
#define BIT_MASK_INDEX 8 /* Bit Mask Register index. */
#define dac_reg (VGA_PEL_IW)
#define dac_val (VGA_PEL_D)
#define VGA_FB_PHYS 0xA0000
#define VGA_FB_PHYS_LEN 65536
......@@ -41,11 +53,9 @@
* card parameters
*/
static struct vga16fb_info {
struct fb_info fb_info;
char *video_vbase; /* 0xa0000 map address */
int isVGA;
static struct fb_info vga16fb;
static struct vga16fb_par {
/* structure holding original VGA register settings when the
screen is blanked */
struct {
......@@ -62,145 +72,246 @@ static struct vga16fb_info {
unsigned char ModeControl; /* CRT-Controller:17h */
unsigned char ClockingMode; /* Seq-Controller:01h */
} vga_state;
int palette_blanked;
int vesa_blanked;
} vga16fb;
struct vga16fb_par {
int palette_blanked, vesa_blanked, mode, isVGA;
u8 misc, pel_msk, vss, clkdiv;
u8 crtc[VGA_CRT_C];
u8 atc[VGA_ATT_C];
u8 gdc[VGA_GFX_C];
u8 seq[VGA_SEQ_C];
u8 misc;
u8 vss;
struct fb_var_screeninfo var;
};
} vga16_par;
/* --------------------------------------------------------------------- */
static struct fb_var_screeninfo vga16fb_defined = {
640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
0,0, /* virtual -> visible no offset */
4, /* depth -> load bits_per_pixel */
0, /* greyscale ? */
{0,0,0}, /* R */
{0,0,0}, /* G */
{0,0,0}, /* B */
{0,0,0}, /* transparency */
0, /* standard pixel format */
FB_ACTIVATE_NOW,
-1,-1,
0,
39721, 48, 16, 39, 8,
96, 2, 0, /* No sync info */
FB_VMODE_NONINTERLACED,
{0,0,0,0,0,0}
.xres = 640,
.yres = 480,
.xres_virtual = 640,
.yres_virtual = 480,
.bits_per_pixel = 4,
.activate = FB_ACTIVATE_NOW,
.height = -1,
.width = -1,
.pixclock = 39721,
.left_margin = 48,
.right_margin = 16,
.upper_margin = 39,
.lower_margin = 8,
.hsync_len = 96,
.vsync_len = 2,
.vmode = FB_VMODE_NONINTERLACED,
};
/* name should not depend on EGA/VGA */
static struct fb_fix_screeninfo vga16fb_fix __initdata = {
.id = "VGA16 VGA",
.smem_start = VGA_FB_PHYS,
.smem_len = VGA_FB_PHYS_LEN,
.type = FB_TYPE_VGA_PLANES,
.type_aux = FB_AUX_VGA_PLANES_VGA4,
.visual = FB_VISUAL_PSEUDOCOLOR,
.xpanstep = 8,
.ypanstep = 1,
.line_length = 640/8,
.accel = FB_ACCEL_NONE
};
static struct display disp;
static struct { u_short blue, green, red, pad; } palette[256];
/* --------------------------------------------------------------------- */
/* The VGA's weird architecture often requires that we read a byte and
write a byte to the same location. It doesn't matter *what* byte
we write, however. This is because all the action goes on behind
the scenes in the VGA's 32-bit latch register, and reading and writing
video memory just invokes latch behavior.
To avoid race conditions (is this necessary?), reading and writing
the memory byte should be done with a single instruction. One
suitable instruction is the x86 bitwise OR. The following
read-modify-write routine should optimize to one such bitwise
OR. */
static inline void rmw(volatile char *p)
{
readb(p);
writeb(1, p);
}
static void vga16fb_pan_var(struct fb_info *info, struct fb_var_screeninfo *var)
/* Set the Graphics Mode Register. Bits 0-1 are write mode, bit 3 is
read mode. */
static inline void setmode(int mode)
{
u32 pos = (var->xres_virtual * var->yoffset + var->xoffset) >> 3;
outb(VGA_CRTC_START_HI, VGA_CRT_IC);
outb(pos >> 8, VGA_CRT_DC);
outb(VGA_CRTC_START_LO, VGA_CRT_IC);
outb(pos & 0xFF, VGA_CRT_DC);
#if 0
/* if someone supports xoffset in bit resolution */
inb(VGA_IS1_RC); /* reset flip-flop */
outb(VGA_ATC_PEL, VGA_ATT_IW);
outb(xoffset & 7, VGA_ATT_IW);
inb(VGA_IS1_RC);
outb(0x20, VGA_ATT_IW);
#endif
outb(GRAPHICS_MODE_INDEX, GRAPHICS_ADDR_REG);
outb(mode, GRAPHICS_DATA_REG);
}
static int vga16fb_update_var(int con, struct fb_info *info)
/* Select the Bit Mask Register. */
static inline void selectmask(void)
{
vga16fb_pan_var(info, &fb_display[con].var);
return 0;
outb(BIT_MASK_INDEX, GRAPHICS_ADDR_REG);
}
static int vga16fb_get_fix(struct fb_fix_screeninfo *fix, int con,
struct fb_info *info)
/* Set the value of the Bit Mask Register. It must already have been
selected with selectmask(). */
static inline void setmask(int mask)
{
struct display *p;
outb(mask, GRAPHICS_DATA_REG);
}
if (con < 0)
p = &disp;
else
p = fb_display + con;
memset(fix, 0, sizeof(struct fb_fix_screeninfo));
strcpy(fix->id,"VGA16 VGA");
fix->smem_start = VGA_FB_PHYS;
fix->smem_len = VGA_FB_PHYS_LEN;
fix->type = FB_TYPE_VGA_PLANES;
fix->visual = FB_VISUAL_PSEUDOCOLOR;
fix->xpanstep = 8;
fix->ypanstep = 1;
fix->ywrapstep = 0;
fix->line_length = p->var.xres_virtual / 8;
return 0;
/* Set the Data Rotate Register. Bits 0-2 are rotate count, bits 3-4
are logical operation (0=NOP, 1=AND, 2=OR, 3=XOR). */
static inline void setop(int op)
{
outb(DATA_ROTATE_INDEX, GRAPHICS_ADDR_REG);
outb(op, GRAPHICS_DATA_REG);
}
/* Set the Enable Set/Reset Register. The code here always uses value
0xf for this register. */
static inline void setsr(int sr)
{
outb(ENABLE_SET_RESET_INDEX, GRAPHICS_ADDR_REG);
outb(sr, GRAPHICS_DATA_REG);
}
static int vga16fb_get_var(struct fb_var_screeninfo *var, int con,
struct fb_info *info)
/* Set the Set/Reset Register. */
static inline void setcolor(int color)
{
if(con==-1)
memcpy(var, &vga16fb_defined, sizeof(struct fb_var_screeninfo));
outb(SET_RESET_INDEX, GRAPHICS_ADDR_REG);
outb(color, GRAPHICS_DATA_REG);
}
/* Set the value in the Graphics Address Register. */
static inline void setindex(int index)
{
outb(index, GRAPHICS_ADDR_REG);
}
static void vga16fb_pan_var(struct fb_info *info,
struct fb_var_screeninfo *var)
{
struct display *p;
u32 xoffset, pos;
p = (info->currcon < 0) ? info->disp : fb_display + info->currcon;
xoffset = var->xoffset;
if (info->var.bits_per_pixel == 8) {
pos = (info->var.xres_virtual * var->yoffset + xoffset) >> 2;
} else if (info->var.bits_per_pixel == 0) {
int fh = fontheight(p);
if (!fh) fh = 16;
pos = (info->var.xres_virtual * (var->yoffset / fh) + xoffset) >> 3;
} else {
if (info->var.nonstd)
xoffset--;
pos = (info->var.xres_virtual * var->yoffset + xoffset) >> 3;
}
vga_io_wcrt(VGA_CRTC_START_HI, pos >> 8);
vga_io_wcrt(VGA_CRTC_START_LO, pos & 0xFF);
/* if we support CFB4, then we must! support xoffset with pixel granularity */
/* if someone supports xoffset in bit resolution */
vga_io_r(VGA_IS1_RC); /* reset flip-flop */
vga_io_w(VGA_ATT_IW, VGA_ATC_PEL);
if (var->bits_per_pixel == 8)
vga_io_w(VGA_ATT_IW, (xoffset & 3) << 1);
else
*var=fb_display[con].var;
vga_io_w(VGA_ATT_IW, xoffset & 7);
vga_io_r(VGA_IS1_RC);
vga_io_w(VGA_ATT_IW, 0x20);
}
static int vga16fb_update_var(int con, struct fb_info *info)
{
vga16fb_pan_var(info, &info->var);
return 0;
}
static void vga16fb_set_disp(int con, struct vga16fb_info *info)
static void vga16fb_update_fix(struct fb_info *info)
{
if (info->var.bits_per_pixel == 4) {
if (info->var.nonstd) {
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.line_length = info->var.xres_virtual / 2;
} else {
info->fix.type = FB_TYPE_VGA_PLANES;
info->fix.type_aux = FB_AUX_VGA_PLANES_VGA4;
info->fix.line_length = info->var.xres_virtual / 8;
}
} else if (info->var.bits_per_pixel == 0) {
info->fix.type = FB_TYPE_TEXT;
info->fix.type_aux = FB_AUX_TEXT_CGA;
info->fix.line_length = info->var.xres_virtual / 4;
} else { /* 8bpp */
if (info->var.nonstd) {
info->fix.type = FB_TYPE_VGA_PLANES;
info->fix.type_aux = FB_AUX_VGA_PLANES_CFB8;
info->fix.line_length = info->var.xres_virtual / 4;
} else {
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.line_length = info->var.xres_virtual;
}
}
}
static void vga16fb_set_disp(int con, struct fb_info *info)
{
struct fb_fix_screeninfo fix;
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
struct display *display;
if (con < 0)
display = &disp;
else
display = fb_display + con;
display = (con < 0) ? info->disp : fb_display + con;
vga16fb_get_fix(&fix, con, &info->fb_info);
display->visual = fix.visual;
display->type = fix.type;
display->type_aux = fix.type_aux;
display->ypanstep = fix.ypanstep;
display->ywrapstep = fix.ywrapstep;
display->line_length = fix.line_length;
display->next_line = fix.line_length;
if (con != info->currcon) {
display->dispsw = &fbcon_dummy;
return;
}
if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR ||
info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
display->can_soft_blank = info->fbops->fb_blank ? 1 : 0;
display->dispsw_data = NULL;
} else {
display->can_soft_blank = 0;
display->dispsw_data = info->pseudo_palette;
}
display->var = info->var;
vga16fb_update_fix(info);
display->next_line = info->fix.line_length;
display->can_soft_blank = 1;
display->inverse = 0;
if (info->isVGA)
display->dispsw = &fbcon_vga_planes;
else
display->dispsw = &fbcon_ega_planes;
display->scrollmode = SCROLL_YREDRAW;
}
static void vga16fb_encode_var(struct fb_var_screeninfo *var,
const struct vga16fb_par *par,
const struct vga16fb_info *info)
{
*var = par->var;
switch (info->fix.type) {
#ifdef FBCON_HAS_VGA_PLANES
case FB_TYPE_VGA_PLANES:
if (info->fix.type_aux == FB_AUX_VGA_PLANES_VGA4) {
display->dispsw = &fbcon_vga_planes;
} else
display->dispsw = &fbcon_vga8_planes;
break;
#endif
#ifdef FBCON_HAS_VGA
case FB_TYPE_TEXT:
display->dispsw = &fbcon_vga;
break;
#endif
default: /* only FB_TYPE_PACKED_PIXELS */
switch (info->var.bits_per_pixel) {
#ifdef FBCON_HAS_CFB4
case 4:
display->dispsw = &fbcon_cfb4;
break;
#endif
#ifdef FBCON_HAS_CFB8
case 8:
display->dispsw = &fbcon_cfb8;
break;
#endif
default:
display->dispsw = &fbcon_dummy;
}
break;
}
}
static void vga16fb_clock_chip(struct vga16fb_par *par,
unsigned int pixclock,
const struct vga16fb_info *info)
const struct fb_info *info,
int mul, int div)
{
static struct {
u32 pixclock;
......@@ -214,6 +325,7 @@ static void vga16fb_clock_chip(struct vga16fb_par *par,
{ 0 /* bad */, 0x00, 0x00}};
int err;
pixclock = (pixclock * mul) / div;
best = vgaclocks;
err = pixclock - best->pixclock;
if (err < 0) err = -err;
......@@ -228,25 +340,90 @@ static void vga16fb_clock_chip(struct vga16fb_par *par,
}
}
par->misc |= best->misc;
par->seq[VGA_SEQ_CLOCK_MODE] |= best->seq_clock_mode;
par->var.pixclock = best->pixclock;
par->clkdiv = best->seq_clock_mode;
pixclock = (best->pixclock * div) / mul;
}
#define FAIL(X) return -EINVAL
static int vga16fb_decode_var(const struct fb_var_screeninfo *var,
struct vga16fb_par *par,
const struct vga16fb_info *info)
#define MODE_SKIP4 1
#define MODE_8BPP 2
#define MODE_CFB 4
#define MODE_TEXT 8
static int vga16fb_check_var(struct fb_var_screeninfo *var,
struct fb_info *info)
{
#ifdef FBCON_HAS_VGA
struct display *p = (info->currcon < 0) ? info->disp : (fb_display + info->currcon);
#endif
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
u32 xres, right, hslen, left, xtotal;
u32 yres, lower, vslen, upper, ytotal;
u32 vxres, xoffset, vyres, yoffset;
u32 pos;
u8 r7, rMode;
int i;
if (var->bits_per_pixel != 4)
int shift;
int mode;
u32 maxmem;
par->pel_msk = 0xFF;
if (var->bits_per_pixel == 4) {
if (var->nonstd) {
#ifdef FBCON_HAS_CFB4
if (!par->isVGA)
return -EINVAL;
shift = 3;
mode = MODE_SKIP4 | MODE_CFB;
maxmem = 16384;
par->pel_msk = 0x0F;
#else
return -EINVAL;
#endif
} else {
#ifdef FBCON_HAS_VGA_PLANES
shift = 3;
mode = 0;
maxmem = 65536;
#else
return -EINVAL;
#endif
}
} else if (var->bits_per_pixel == 8) {
if (!par->isVGA)
return -EINVAL; /* no support on EGA */
shift = 2;
if (var->nonstd) {
#ifdef FBCON_HAS_VGA_PLANES
mode = MODE_8BPP | MODE_CFB;
maxmem = 65536;
#else
return -EINVAL;
#endif
} else {
#ifdef FBCON_HAS_CFB8
mode = MODE_SKIP4 | MODE_8BPP | MODE_CFB;
maxmem = 16384;
#else
return -EINVAL;
#endif
}
}
#ifdef FBCON_HAS_VGA
else if (var->bits_per_pixel == 0) {
int fh;
shift = 3;
mode = MODE_TEXT;
fh = fontheight(p);
if (!fh)
fh = 16;
maxmem = 32768 * fh;
}
#endif
else
return -EINVAL;
xres = (var->xres + 7) & ~7;
vxres = (var->xres_virtual + 0xF) & ~0xF;
xoffset = (var->xoffset + 7) & ~7;
......@@ -259,18 +436,18 @@ static int vga16fb_decode_var(const struct fb_var_screeninfo *var,
if (xres + xoffset > vxres)
xoffset = vxres - xres;
par->var.xres = xres;
par->var.right_margin = right;
par->var.hsync_len = hslen;
par->var.left_margin = left;
par->var.xres_virtual = vxres;
par->var.xoffset = xoffset;
xres >>= 3;
right >>= 3;
hslen >>= 3;
left >>= 3;
vxres >>= 3;
var->xres = xres;
var->right_margin = right;
var->hsync_len = hslen;
var->left_margin = left;
var->xres_virtual = vxres;
var->xoffset = xoffset;
xres >>= shift;
right >>= shift;
hslen >>= shift;
left >>= shift;
vxres >>= shift;
xtotal = xres + right + hslen + left;
if (xtotal >= 256)
FAIL("xtotal too big");
......@@ -299,19 +476,19 @@ static int vga16fb_decode_var(const struct fb_var_screeninfo *var,
if (yres > vyres)
vyres = yres;
if (vxres * vyres > 65536) {
vyres = 65536 / vxres;
if (vxres * vyres > maxmem) {
vyres = maxmem / vxres;
if (vyres < yres)
return -ENOMEM;
}
if (yoffset + yres > vyres)
yoffset = vyres - yres;
par->var.yres = yres;
par->var.lower_margin = lower;
par->var.vsync_len = vslen;
par->var.upper_margin = upper;
par->var.yres_virtual = vyres;
par->var.yoffset = yoffset;
var->yres = yres;
var->lower_margin = lower;
var->vsync_len = vslen;
var->upper_margin = upper;
var->yres_virtual = vyres;
var->yoffset = yoffset;
if (var->vmode & FB_VMODE_DOUBLE) {
yres <<= 1;
......@@ -339,12 +516,13 @@ static int vga16fb_decode_var(const struct fb_var_screeninfo *var,
if (ytotal & 0x200) r7 |= 0x20;
par->crtc[VGA_CRTC_PRESET_ROW] = 0;
par->crtc[VGA_CRTC_MAX_SCAN] = 0x40; /* 1 scanline, no linecmp */
par->var.vmode = var->vmode;
if (var->vmode & FB_VMODE_DOUBLE)
par->crtc[VGA_CRTC_MAX_SCAN] |= 0x80;
par->crtc[VGA_CRTC_CURSOR_START] = 0x20;
par->crtc[VGA_CRTC_CURSOR_END] = 0x00;
pos = yoffset * vxres + (xoffset >> 3);
if ((mode & (MODE_CFB | MODE_8BPP)) == MODE_CFB)
xoffset--;
pos = yoffset * vxres + (xoffset >> shift);
par->crtc[VGA_CRTC_START_HI] = pos >> 8;
par->crtc[VGA_CRTC_START_LO] = pos & 0xFF;
par->crtc[VGA_CRTC_CURSOR_HI] = 0x00;
......@@ -372,170 +550,236 @@ static int vga16fb_decode_var(const struct fb_var_screeninfo *var,
if (vxres >= 512)
FAIL("vxres too long");
par->crtc[VGA_CRTC_OFFSET] = vxres >> 1;
par->crtc[VGA_CRTC_UNDERLINE] = 0x1F;
par->crtc[VGA_CRTC_MODE] = rMode | 0xE3;
if (mode & MODE_SKIP4)
par->crtc[VGA_CRTC_UNDERLINE] = 0x5F; /* 256, cfb8 */
else
par->crtc[VGA_CRTC_UNDERLINE] = 0x1F; /* 16, vgap */
par->crtc[VGA_CRTC_MODE] = rMode | ((mode & MODE_TEXT) ? 0xA3 : 0xE3);
par->crtc[VGA_CRTC_LINE_COMPARE] = 0xFF;
par->crtc[VGA_CRTC_OVERFLOW] = r7;
par->vss = 0x00; /* 3DA */
for (i = 0x00; i < 0x10; i++)
par->atc[i] = i;
par->atc[VGA_ATC_MODE] = 0x81;
par->atc[VGA_ATC_OVERSCAN] = 0x00; /* 0 for EGA, 0xFF for VGA */
par->atc[VGA_ATC_PLANE_ENABLE] = 0x0F;
par->atc[VGA_ATC_PEL] = xoffset & 7;
par->atc[VGA_ATC_COLOR_PAGE] = 0x00;
par->misc = 0xC3; /* enable CPU, ports 0x3Dx, positive sync */
par->var.sync = var->sync;
par->misc = 0xE3; /* enable CPU, ports 0x3Dx, positive sync */
if (var->sync & FB_SYNC_HOR_HIGH_ACT)
par->misc &= ~0x40;
if (var->sync & FB_SYNC_VERT_HIGH_ACT)
par->misc &= ~0x80;
par->seq[VGA_SEQ_CLOCK_MODE] = 0x01;
par->seq[VGA_SEQ_PLANE_WRITE] = 0x0F;
par->seq[VGA_SEQ_CHARACTER_MAP] = 0x00;
par->seq[VGA_SEQ_MEMORY_MODE] = 0x06;
par->gdc[VGA_GFX_SR_VALUE] = 0x00;
par->gdc[VGA_GFX_SR_ENABLE] = 0x0F;
par->gdc[VGA_GFX_COMPARE_VALUE] = 0x00;
par->gdc[VGA_GFX_DATA_ROTATE] = 0x20;
par->gdc[VGA_GFX_PLANE_READ] = 0;
par->gdc[VGA_GFX_MODE] = 0x00;
par->gdc[VGA_GFX_MISC] = 0x05;
par->gdc[VGA_GFX_COMPARE_MASK] = 0x0F;
par->gdc[VGA_GFX_BIT_MASK] = 0xFF;
vga16fb_clock_chip(par, var->pixclock, info);
par->var.bits_per_pixel = 4;
par->var.grayscale = var->grayscale;
par->var.red.offset = par->var.green.offset = par->var.blue.offset =
par->var.transp.offset = 0;
par->var.red.length = par->var.green.length = par->var.blue.length =
(info->isVGA) ? 6 : 2;
par->var.transp.length = 0;
par->var.nonstd = 0;
par->var.activate = FB_ACTIVATE_NOW;
par->var.height = -1;
par->var.width = -1;
par->var.accel_flags = 0;
par->mode = mode;
if (mode & MODE_8BPP)
/* pixel clock == vga clock / 2 */
vga16fb_clock_chip(par, var->pixclock, info, 1, 2);
else
/* pixel clock == vga clock */
vga16fb_clock_chip(par, var->pixclock, info, 1, 1);
var->red.offset = var->green.offset = var->blue.offset =
var->transp.offset = 0;
var->red.length = var->green.length = var->blue.length =
(par->isVGA) ? 6 : 2;
var->transp.length = 0;
var->activate = FB_ACTIVATE_NOW;
var->height = -1;
var->width = -1;
var->accel_flags = 0;
return 0;
}
#undef FAIL
static int vga16fb_set_par(const struct vga16fb_par *par,
struct vga16fb_info *info)
static void vga16fb_load_font(struct display* p) {
int chars;
unsigned char* font;
unsigned char* dest;
if (!p || !p->fontdata)
return;
chars = 256;
font = p->fontdata;
dest = vga16fb.screen_base;
vga_io_wseq(0x00, 0x01);
vga_io_wseq(VGA_SEQ_PLANE_WRITE, 0x04);
vga_io_wseq(VGA_SEQ_MEMORY_MODE, 0x07);
vga_io_wseq(0x00, 0x03);
vga_io_wgfx(VGA_GFX_MODE, 0x00);
vga_io_wgfx(VGA_GFX_MISC, 0x04);
while (chars--) {
int i;
for (i = fontheight(p); i > 0; i--)
writeb(*font++, dest++);
dest += 32 - fontheight(p);
}
vga_io_wseq(0x00, 0x01);
vga_io_wseq(VGA_SEQ_PLANE_WRITE, 0x03);
vga_io_wseq(VGA_SEQ_MEMORY_MODE, 0x03);
vga_io_wseq(0x00, 0x03);
vga_io_wgfx(VGA_GFX_MODE, 0x10);
vga_io_wgfx(VGA_GFX_MISC, 0x06);
}
static int vga16fb_set_par(struct fb_info *info)
{
int i;
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
struct display *p = (info->currcon < 0) ? info->disp : (fb_display + info->currcon);
u8 gdc[VGA_GFX_C];
u8 seq[VGA_SEQ_C];
u8 atc[VGA_ATT_C];
int fh, i;
seq[VGA_SEQ_CLOCK_MODE] = 0x01 | par->clkdiv;
if (par->mode & MODE_TEXT)
seq[VGA_SEQ_PLANE_WRITE] = 0x03;
else
seq[VGA_SEQ_PLANE_WRITE] = 0x0F;
seq[VGA_SEQ_CHARACTER_MAP] = 0x00;
if (par->mode & MODE_TEXT)
seq[VGA_SEQ_MEMORY_MODE] = 0x03;
else if (par->mode & MODE_SKIP4)
seq[VGA_SEQ_MEMORY_MODE] = 0x0E;
else
seq[VGA_SEQ_MEMORY_MODE] = 0x06;
gdc[VGA_GFX_SR_VALUE] = 0x00;
gdc[VGA_GFX_SR_ENABLE] = 0x00;
gdc[VGA_GFX_COMPARE_VALUE] = 0x00;
gdc[VGA_GFX_DATA_ROTATE] = 0x00;
gdc[VGA_GFX_PLANE_READ] = 0;
if (par->mode & MODE_TEXT) {
gdc[VGA_GFX_MODE] = 0x10;
gdc[VGA_GFX_MISC] = 0x06;
} else {
if (par->mode & MODE_CFB)
gdc[VGA_GFX_MODE] = 0x40;
else
gdc[VGA_GFX_MODE] = 0x00;
gdc[VGA_GFX_MISC] = 0x05;
}
gdc[VGA_GFX_COMPARE_MASK] = 0x0F;
gdc[VGA_GFX_BIT_MASK] = 0xFF;
for (i = 0x00; i < 0x10; i++)
atc[i] = i;
if (par->mode & MODE_TEXT)
atc[VGA_ATC_MODE] = 0x04;
else if (par->mode & MODE_8BPP)
atc[VGA_ATC_MODE] = 0x41;
else
atc[VGA_ATC_MODE] = 0x81;
atc[VGA_ATC_OVERSCAN] = 0x00; /* 0 for EGA, 0xFF for VGA */
atc[VGA_ATC_PLANE_ENABLE] = 0x0F;
if (par->mode & MODE_8BPP)
atc[VGA_ATC_PEL] = (info->var.xoffset & 3) << 1;
else
atc[VGA_ATC_PEL] = info->var.xoffset & 7;
atc[VGA_ATC_COLOR_PAGE] = 0x00;
if (par->mode & MODE_TEXT) {
fh = fontheight(p);
if (!fh)
fh = 16;
par->crtc[VGA_CRTC_MAX_SCAN] = (par->crtc[VGA_CRTC_MAX_SCAN]
& ~0x1F) | (fh - 1);
}
outb(inb(VGA_MIS_R) | 0x01, VGA_MIS_W);
vga_io_w(VGA_MIS_W, vga_io_r(VGA_MIS_R) | 0x01);
/* Enable graphics register modification */
if (!info->isVGA) {
outb(0x00, EGA_GFX_E0);
outb(0x01, EGA_GFX_E1);
if (!par->isVGA) {
vga_io_w(EGA_GFX_E0, 0x00);
vga_io_w(EGA_GFX_E1, 0x01);
}
/* update misc output register */
outb(par->misc, VGA_MIS_W);
vga_io_w(VGA_MIS_W, par->misc);
/* synchronous reset on */
outb(0x00, VGA_SEQ_I);
outb(0x01, VGA_SEQ_D);
vga_io_wseq(0x00, 0x01);
if (par->isVGA)
vga_io_w(VGA_PEL_MSK, par->pel_msk);
/* write sequencer registers */
outb(1, VGA_SEQ_I);
outb(par->seq[1] | 0x20, VGA_SEQ_D);
vga_io_wseq(VGA_SEQ_CLOCK_MODE, seq[VGA_SEQ_CLOCK_MODE] | 0x20);
for (i = 2; i < VGA_SEQ_C; i++) {
outb(i, VGA_SEQ_I);
outb(par->seq[i], VGA_SEQ_D);
vga_io_wseq(i, seq[i]);
}
/* synchronous reset off */
outb(0x00, VGA_SEQ_I);
outb(0x03, VGA_SEQ_D);
vga_io_wseq(0x00, 0x03);
/* deprotect CRT registers 0-7 */
outb(0x11, VGA_CRT_IC);
outb(par->crtc[0x11], VGA_CRT_DC);
vga_io_wcrt(VGA_CRTC_V_SYNC_END, par->crtc[VGA_CRTC_V_SYNC_END]);
/* write CRT registers */
for (i = 0; i < VGA_CRT_C; i++) {
outb(i, VGA_CRT_IC);
outb(par->crtc[i], VGA_CRT_DC);
for (i = 0; i < VGA_CRTC_REGS; i++) {
vga_io_wcrt(i, par->crtc[i]);
}
/* write graphics controller registers */
for (i = 0; i < VGA_GFX_C; i++) {
outb(i, VGA_GFX_I);
outb(par->gdc[i], VGA_GFX_D);
vga_io_wgfx(i, gdc[i]);
}
/* write attribute controller registers */
for (i = 0; i < VGA_ATT_C; i++) {
inb_p(VGA_IS1_RC); /* reset flip-flop */
outb_p(i, VGA_ATT_IW);
outb_p(par->atc[i], VGA_ATT_IW);
vga_io_r(VGA_IS1_RC); /* reset flip-flop */
vga_io_wattr(i, atc[i]);
}
if (par->mode & MODE_TEXT)
vga16fb_load_font(p);
/* Wait for screen to stabilize. */
mdelay(50);
outb(0x01, VGA_SEQ_I);
outb(par->seq[1], VGA_SEQ_D);
vga_io_wseq(VGA_SEQ_CLOCK_MODE, seq[VGA_SEQ_CLOCK_MODE]);
inb(VGA_IS1_RC);
outb(0x20, VGA_ATT_IW);
vga_io_r(VGA_IS1_RC);
vga_io_w(VGA_ATT_IW, 0x20);
return 0;
}
static int vga16fb_set_var(struct fb_var_screeninfo *var, int con,
struct fb_info *fb)
struct fb_info *info)
{
struct vga16fb_info *info = (struct vga16fb_info*)fb;
struct vga16fb_par par;
struct display *display;
int err;
if (con < 0)
display = fb->disp;
display = info->disp;
else
display = fb_display + con;
if ((err = vga16fb_decode_var(var, &par, info)) != 0)
if ((err = vga16fb_check_var(var, info)) != 0)
return err;
vga16fb_encode_var(var, &par, info);
if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST)
return 0;
if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
u32 oldxres, oldyres, oldvxres, oldvyres, oldbpp;
oldxres = display->var.xres;
oldyres = display->var.yres;
oldvxres = display->var.xres_virtual;
oldvyres = display->var.yres_virtual;
oldbpp = display->var.bits_per_pixel;
display->var = *var;
if (oldxres != var->xres || oldyres != var->yres ||
oldvxres != var->xres_virtual || oldvyres != var->yres_virtual ||
oldbpp != var->bits_per_pixel) {
vga16fb_set_disp(con, info);
if (info->fb_info.changevar)
info->fb_info.changevar(con);
u32 oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldnonstd;
oldxres = info->var.xres;
oldyres = info->var.yres;
oldvxres = info->var.xres_virtual;
oldvyres = info->var.yres_virtual;
oldbpp = info->var.bits_per_pixel;
oldnonstd = info->var.nonstd;
info->var = *var;
if (con == info->currcon)
vga16fb_set_par(info);
vga16fb_set_disp(con, info);
if (oldxres != var->xres ||
oldyres != var->yres ||
oldvxres != var->xres_virtual ||
oldvyres != var->yres_virtual ||
oldbpp != var->bits_per_pixel ||
oldnonstd != var->nonstd) {
if (info->changevar)
info->changevar(con);
}
if (con == info->fb_info.currcon)
vga16fb_set_par(&par, info);
}
return 0;
}
......@@ -544,31 +788,13 @@ static void ega16_setpalette(int regno, unsigned red, unsigned green, unsigned b
static unsigned char map[] = { 000, 001, 010, 011 };
int val;
val = map[red>>14] | ((map[green>>14]) << 1) | ((map[blue>>14]) << 2);
inb_p(0x3DA); /* ! 0x3BA */
outb_p(regno, 0x3C0);
outb_p(val, 0x3C0);
inb_p(0x3DA); /* some clones need it */
outb_p(0x20, 0x3C0); /* unblank screen */
}
static int vga16_getcolreg(unsigned regno, unsigned *red, unsigned *green,
unsigned *blue, unsigned *transp,
struct fb_info *fb_info)
{
/*
* Read a single color register and split it into colors/transparent.
* Return != 0 for invalid regno.
*/
if (regno >= 16)
return 1;
*red = palette[regno].red;
*green = palette[regno].green;
*blue = palette[regno].blue;
*transp = 0;
return 0;
return;
val = map[red>>14] | ((map[green>>14]) << 1) | ((map[blue>>14]) << 2);
vga_io_r(VGA_IS1_RC); /* ! 0x3BA */
vga_io_wattr(regno, val);
vga_io_r(VGA_IS1_RC); /* some clones need it */
vga_io_w(VGA_ATT_IW, 0x20); /* unblank screen */
}
static void vga16_setpalette(int regno, unsigned red, unsigned green, unsigned blue)
......@@ -581,8 +807,9 @@ static void vga16_setpalette(int regno, unsigned red, unsigned green, unsigned b
static int vga16fb_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue, unsigned transp,
struct fb_info *fb_info)
struct fb_info *info)
{
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
int gray;
/*
......@@ -592,53 +819,35 @@ static int vga16fb_setcolreg(unsigned regno, unsigned red, unsigned green,
* != 0 for invalid regno.
*/
if (regno >= 16)
if (regno >= 256)
return 1;
palette[regno].red = red;
palette[regno].green = green;
palette[regno].blue = blue;
if (fb_info->currcon < 0)
gray = disp.var.grayscale;
if (info->currcon < 0)
gray = info->disp->var.grayscale;
else
gray = fb_display[fb_info->currcon].var.grayscale;
gray = fb_display[info->currcon].var.grayscale;
if (gray) {
/* gray = 0.30*R + 0.59*G + 0.11*B */
red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
}
if (((struct vga16fb_info *) fb_info)->isVGA)
if (par->isVGA)
vga16_setpalette(regno,red,green,blue);
else
ega16_setpalette(regno,red,green,blue);
return 0;
}
static int vga16fb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
struct fb_info *info)
{
if (con == info->currcon) /* current console? */
return fb_get_cmap(cmap, kspc, vga16_getcolreg, info);
else if (fb_display[con].cmap.len) /* non default colormap? */
fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
else
fb_copy_cmap(fb_default_cmap(16),
cmap, kspc ? 0 : 2);
return 0;
}
static int vga16fb_pan_display(struct fb_var_screeninfo *var, int con,
struct fb_info *info)
{
if (var->xoffset + fb_display[con].var.xres > fb_display[con].var.xres_virtual ||
var->yoffset + fb_display[con].var.yres > fb_display[con].var.yres_virtual)
if (var->xoffset + info->var.xres > info->var.xres_virtual ||
var->yoffset + info->var.yres > info->var.yres_virtual)
return -EINVAL;
if (con == info->currcon)
vga16fb_pan_var(info, var);
fb_display[con].var.xoffset = var->xoffset;
fb_display[con].var.yoffset = var->yoffset;
fb_display[con].var.vmode &= ~FB_VMODE_YWRAP;
info->var.xoffset = var->xoffset;
info->var.yoffset = var->yoffset;
info->var.vmode &= ~FB_VMODE_YWRAP;
return 0;
}
......@@ -646,59 +855,49 @@ static int vga16fb_pan_display(struct fb_var_screeninfo *var, int con,
blanking code was originally by Huang shi chao, and modified by
Christoph Rimek (chrimek@toppoint.de) and todd j. derr
(tjd@barefoot.org) for Linux. */
#define attrib_port 0x3c0
#define seq_port_reg 0x3c4
#define seq_port_val 0x3c5
#define gr_port_reg 0x3ce
#define gr_port_val 0x3cf
#define video_misc_rd 0x3cc
#define video_misc_wr 0x3c2
#define vga_video_port_reg 0x3d4
#define vga_video_port_val 0x3d5
static void vga_vesa_blank(struct vga16fb_info *info, int mode)
#define attrib_port VGA_ATC_IW
#define seq_port_reg VGA_SEQ_I
#define seq_port_val VGA_SEQ_D
#define gr_port_reg VGA_GFX_I
#define gr_port_val VGA_GFX_D
#define video_misc_rd VGA_MIS_R
#define video_misc_wr VGA_MIS_W
#define vga_video_port_reg VGA_CRT_IC
#define vga_video_port_val VGA_CRT_DC
static void vga_vesa_blank(struct vga16fb_par *par, int mode)
{
unsigned char SeqCtrlIndex;
unsigned char CrtCtrlIndex;
cli();
SeqCtrlIndex = inb_p(seq_port_reg);
CrtCtrlIndex = inb_p(vga_video_port_reg);
//cli();
SeqCtrlIndex = vga_io_r(seq_port_reg);
CrtCtrlIndex = vga_io_r(vga_video_port_reg);
/* save original values of VGA controller registers */
if(!info->vesa_blanked) {
info->vga_state.CrtMiscIO = inb_p(video_misc_rd);
sti();
outb_p(0x00,vga_video_port_reg); /* HorizontalTotal */
info->vga_state.HorizontalTotal = inb_p(vga_video_port_val);
outb_p(0x01,vga_video_port_reg); /* HorizDisplayEnd */
info->vga_state.HorizDisplayEnd = inb_p(vga_video_port_val);
outb_p(0x04,vga_video_port_reg); /* StartHorizRetrace */
info->vga_state.StartHorizRetrace = inb_p(vga_video_port_val);
outb_p(0x05,vga_video_port_reg); /* EndHorizRetrace */
info->vga_state.EndHorizRetrace = inb_p(vga_video_port_val);
outb_p(0x07,vga_video_port_reg); /* Overflow */
info->vga_state.Overflow = inb_p(vga_video_port_val);
outb_p(0x10,vga_video_port_reg); /* StartVertRetrace */
info->vga_state.StartVertRetrace = inb_p(vga_video_port_val);
outb_p(0x11,vga_video_port_reg); /* EndVertRetrace */
info->vga_state.EndVertRetrace = inb_p(vga_video_port_val);
outb_p(0x17,vga_video_port_reg); /* ModeControl */
info->vga_state.ModeControl = inb_p(vga_video_port_val);
outb_p(0x01,seq_port_reg); /* ClockingMode */
info->vga_state.ClockingMode = inb_p(seq_port_val);
if(!par->vesa_blanked) {
par->vga_state.CrtMiscIO = vga_io_r(video_misc_rd);
//sti();
par->vga_state.HorizontalTotal = vga_io_rcrt(0x00); /* HorizontalTotal */
par->vga_state.HorizDisplayEnd = vga_io_rcrt(0x01); /* HorizDisplayEnd */
par->vga_state.StartHorizRetrace = vga_io_rcrt(0x04); /* StartHorizRetrace */
par->vga_state.EndHorizRetrace = vga_io_rcrt(0x05); /* EndHorizRetrace */
par->vga_state.Overflow = vga_io_rcrt(0x07); /* Overflow */
par->vga_state.StartVertRetrace = vga_io_rcrt(0x10); /* StartVertRetrace */
par->vga_state.EndVertRetrace = vga_io_rcrt(0x11); /* EndVertRetrace */
par->vga_state.ModeControl = vga_io_rcrt(0x17); /* ModeControl */
par->vga_state.ClockingMode = vga_io_rseq(0x01); /* ClockingMode */
}
/* assure that video is enabled */
/* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */
cli();
outb_p(0x01,seq_port_reg);
outb_p(info->vga_state.ClockingMode | 0x20,seq_port_val);
//cli();
vga_io_wseq(0x01, par->vga_state.ClockingMode | 0x20);
/* test for vertical retrace in process.... */
if ((info->vga_state.CrtMiscIO & 0x80) == 0x80)
outb_p(info->vga_state.CrtMiscIO & 0xef,video_misc_wr);
if ((par->vga_state.CrtMiscIO & 0x80) == 0x80)
vga_io_w(video_misc_wr, par->vga_state.CrtMiscIO & 0xef);
/*
* Set <End of vertical retrace> to minimum (0) and
......@@ -711,7 +910,7 @@ static void vga_vesa_blank(struct vga16fb_info *info, int mode)
outb_p(0x11,vga_video_port_reg); /* EndVertRetrace */
outb_p(0x40,vga_video_port_val); /* minimum (bits 0..3) */
outb_p(0x07,vga_video_port_reg); /* Overflow */
outb_p(info->vga_state.Overflow | 0x84,vga_video_port_val); /* bits 9,10 of vert. retrace */
outb_p(par->vga_state.Overflow | 0x84,vga_video_port_val); /* bits 9,10 of vert. retrace */
}
if (mode & VESA_HSYNC_SUSPEND) {
......@@ -729,44 +928,44 @@ static void vga_vesa_blank(struct vga16fb_info *info, int mode)
/* restore both index registers */
outb_p(SeqCtrlIndex,seq_port_reg);
outb_p(CrtCtrlIndex,vga_video_port_reg);
sti();
//sti();
}
static void vga_vesa_unblank(struct vga16fb_info *info)
static void vga_vesa_unblank(struct vga16fb_par *par)
{
unsigned char SeqCtrlIndex;
unsigned char CrtCtrlIndex;
cli();
SeqCtrlIndex = inb_p(seq_port_reg);
CrtCtrlIndex = inb_p(vga_video_port_reg);
//cli();
SeqCtrlIndex = vga_io_r(seq_port_reg);
CrtCtrlIndex = vga_io_r(vga_video_port_reg);
/* restore original values of VGA controller registers */
outb_p(info->vga_state.CrtMiscIO,video_misc_wr);
outb_p(0x00,vga_video_port_reg); /* HorizontalTotal */
outb_p(info->vga_state.HorizontalTotal,vga_video_port_val);
outb_p(0x01,vga_video_port_reg); /* HorizDisplayEnd */
outb_p(info->vga_state.HorizDisplayEnd,vga_video_port_val);
outb_p(0x04,vga_video_port_reg); /* StartHorizRetrace */
outb_p(info->vga_state.StartHorizRetrace,vga_video_port_val);
outb_p(0x05,vga_video_port_reg); /* EndHorizRetrace */
outb_p(info->vga_state.EndHorizRetrace,vga_video_port_val);
outb_p(0x07,vga_video_port_reg); /* Overflow */
outb_p(info->vga_state.Overflow,vga_video_port_val);
outb_p(0x10,vga_video_port_reg); /* StartVertRetrace */
outb_p(info->vga_state.StartVertRetrace,vga_video_port_val);
outb_p(0x11,vga_video_port_reg); /* EndVertRetrace */
outb_p(info->vga_state.EndVertRetrace,vga_video_port_val);
outb_p(0x17,vga_video_port_reg); /* ModeControl */
outb_p(info->vga_state.ModeControl,vga_video_port_val);
outb_p(0x01,seq_port_reg); /* ClockingMode */
outb_p(info->vga_state.ClockingMode,seq_port_val);
vga_io_w(video_misc_wr, par->vga_state.CrtMiscIO);
/* HorizontalTotal */
vga_io_wcrt(0x00, par->vga_state.HorizontalTotal);
/* HorizDisplayEnd */
vga_io_wcrt(0x01, par->vga_state.HorizDisplayEnd);
/* StartHorizRetrace */
vga_io_wcrt(0x04, par->vga_state.StartHorizRetrace);
/* EndHorizRetrace */
vga_io_wcrt(0x05, par->vga_state.EndHorizRetrace);
/* Overflow */
vga_io_wcrt(0x07, par->vga_state.Overflow);
/* StartVertRetrace */
vga_io_wcrt(0x10, par->vga_state.StartVertRetrace);
/* EndVertRetrace */
vga_io_wcrt(0x11, par->vga_state.EndVertRetrace);
/* ModeControl */
vga_io_wcrt(0x17, par->vga_state.ModeControl);
/* ClockingMode */
vga_io_wseq(0x01, par->vga_state.ClockingMode);
/* restore index/control registers */
outb_p(SeqCtrlIndex,seq_port_reg);
outb_p(CrtCtrlIndex,vga_video_port_reg);
sti();
vga_io_w(seq_port_reg, SeqCtrlIndex);
vga_io_w(vga_video_port_reg, CrtCtrlIndex);
//sti();
}
static void vga_pal_blank(void)
......@@ -782,50 +981,96 @@ static void vga_pal_blank(void)
}
/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
static int vga16fb_blank(int blank, struct fb_info *fb_info)
static int vga16fb_blank(int blank, struct fb_info *info)
{
struct vga16fb_info *info = (struct vga16fb_info*)fb_info;
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
switch (blank) {
case 0: /* Unblank */
if (info->vesa_blanked) {
vga_vesa_unblank(info);
info->vesa_blanked = 0;
if (par->vesa_blanked) {
vga_vesa_unblank(par);
par->vesa_blanked = 0;
}
if (info->palette_blanked) {
do_install_cmap(fb_info->currcon, fb_info);
info->palette_blanked = 0;
if (par->palette_blanked) {
do_install_cmap(info->currcon, info);
par->palette_blanked = 0;
}
break;
case 1: /* blank */
vga_pal_blank();
info->palette_blanked = 1;
par->palette_blanked = 1;
break;
default: /* VESA blanking */
vga_vesa_blank(info, blank-1);
info->vesa_blanked = 1;
vga_vesa_blank(par, blank-1);
par->vesa_blanked = 1;
break;
}
return 0;
}
void vga16fb_imageblit(struct fb_info *info, struct fb_image *image)
{
char *where = info->screen_base + (image->dx/image->width) + image->dy * info->fix.line_length;
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
u8 *cdat = image->data;
int y;
if (par->isVGA) {
setmode(2);
setop(0);
setsr(0xf);
setcolor(image->fg_color);
selectmask();
setmask(0xff);
writeb(image->bg_color, where);
rmb();
readb(where); /* fill latches */
setmode(3);
wmb();
for (y = 0; y < image->height; y++, where += info->fix.line_length)
writeb(cdat[y], where);
wmb();
} else {
setmode(0);
setop(0);
setsr(0xf);
setcolor(image->bg_color);
selectmask();
setmask(0xff);
for (y = 0; y < image->height; y++, where += info->fix.line_length)
rmw(where);
where -= info->fix.line_length * y;
setcolor(image->fg_color);
selectmask();
for (y = 0; y < image->height; y++, where += info->fix.line_length)
if (cdat[y]) {
setmask(cdat[y]);
rmw(where);
}
}
}
static struct fb_ops vga16fb_ops = {
.owner = THIS_MODULE,
.fb_get_fix = vga16fb_get_fix,
.fb_get_var = vga16fb_get_var,
.fb_set_var = vga16fb_set_var,
.fb_get_cmap = vga16fb_get_cmap,
.fb_set_cmap = gen_set_cmap,
.fb_setcolreg = vga16fb_setcolreg,
.fb_pan_display =vga16fb_pan_display,
.fb_blank = vga16fb_blank,
.owner = THIS_MODULE,
.fb_set_var = vga16fb_set_var,
.fb_check_var = vga16fb_check_var,
.fb_set_par = vga16fb_set_par,
.fb_get_cmap = gen_get_cmap,
.fb_set_cmap = gen_set_cmap,
.fb_setcolreg = vga16fb_setcolreg,
.fb_pan_display = vga16fb_pan_display,
.fb_blank = vga16fb_blank,
.fb_imageblit = vga16fb_imageblit,
};
int vga16fb_setup(char *options)
{
char *this_opt;
vga16fb.fb_info.fontname[0] = '\0';
vga16fb.fontname[0] = '\0';
if (!options || !*options)
return 0;
......@@ -834,95 +1079,70 @@ int vga16fb_setup(char *options)
if (!*this_opt) continue;
if (!strncmp(this_opt, "font:", 5))
strcpy(vga16fb.fb_info.fontname, this_opt+5);
strcpy(vga16fb.fontname, this_opt+5);
}
return 0;
}
static int vga16fb_switch(int con, struct fb_info *fb)
{
struct vga16fb_par par;
struct vga16fb_info *info = (struct vga16fb_info*)fb;
/* Do we have to save the colormap? */
if (fb_display[fb->currcon].cmap.len)
fb_get_cmap(&fb_display[fb->currcon].cmap, 1, vga16_getcolreg,
fb);
fb->currcon = con;
vga16fb_decode_var(&fb_display[con].var, &par, info);
vga16fb_set_par(&par, info);
vga16fb_set_disp(con, info);
/* Install new colormap */
do_install_cmap(con, fb);
/* vga16fb_update_var(con, fb); */
return 1;
}
int __init vga16fb_init(void)
{
int i,j;
int i;
printk(KERN_DEBUG "vga16fb: initializing\n");
/* XXX share VGA_FB_PHYS region with vgacon */
vga16fb.video_vbase = ioremap(VGA_FB_PHYS, VGA_FB_PHYS_LEN);
if (!vga16fb.video_vbase) {
vga16fb.screen_base = ioremap(VGA_FB_PHYS, VGA_FB_PHYS_LEN);
if (!vga16fb.screen_base) {
printk(KERN_ERR "vga16fb: unable to map device\n");
return -ENOMEM;
}
printk(KERN_INFO "vga16fb: mapped to 0x%p\n", vga16fb.video_vbase);
printk(KERN_INFO "vga16fb: mapped to 0x%p\n", vga16fb.screen_base);
vga16fb.isVGA = ORIG_VIDEO_ISVGA;
vga16fb.palette_blanked = 0;
vga16fb.vesa_blanked = 0;
vga16_par.isVGA = ORIG_VIDEO_ISVGA;
vga16_par.palette_blanked = 0;
vga16_par.vesa_blanked = 0;
i = vga16fb.isVGA? 6 : 2;
i = vga16_par.isVGA? 6 : 2;
vga16fb_defined.red.length = i;
vga16fb_defined.green.length = i;
vga16fb_defined.blue.length = i;
for(i = 0; i < 16; i++) {
j = color_table[i];
palette[i].red = default_red[j];
palette[i].green = default_grn[j];
palette[i].blue = default_blu[j];
}
/* XXX share VGA I/O region with vgacon and others */
disp.var = vga16fb_defined;
/* name should not depend on EGA/VGA */
strcpy(vga16fb.fb_info.modename, "VGA16 VGA");
vga16fb.fb_info.changevar = NULL;
vga16fb.fb_info.node = NODEV;
vga16fb.fb_info.fbops = &vga16fb_ops;
vga16fb.fb_info.screen_base = vga16fb.video_vbase;
vga16fb.fb_info.disp=&disp;
vga16fb.fb_info.currcon = -1;
vga16fb.fb_info.switch_con=&vga16fb_switch;
vga16fb.fb_info.updatevar=&vga16fb_update_var;
vga16fb.fb_info.flags=FBINFO_FLAG_DEFAULT;
strcpy(vga16fb.modename, "VGA16 VGA");
vga16fb.changevar = NULL;
vga16fb.node = NODEV;
vga16fb.fbops = &vga16fb_ops;
vga16fb.var = vga16fb_defined;
vga16fb.fix = vga16fb_fix;
vga16fb.par = &vga16_par;
vga16fb.disp = &disp;
vga16fb.currcon = -1;
vga16fb.switch_con = gen_switch;
vga16fb.updatevar=&vga16fb_update_var;
vga16fb.flags=FBINFO_FLAG_DEFAULT;
vga16fb_set_disp(-1, &vga16fb);
if (register_framebuffer(&vga16fb.fb_info)<0) {
iounmap(vga16fb.video_vbase);
if (register_framebuffer(&vga16fb) < 0) {
iounmap(vga16fb.screen_base);
return -EINVAL;
}
printk(KERN_INFO "fb%d: %s frame buffer device\n",
GET_FB_IDX(vga16fb.fb_info.node), vga16fb.fb_info.modename);
GET_FB_IDX(vga16fb.node), vga16fb.modename);
return 0;
}
static void __exit vga16fb_exit(void)
{
unregister_framebuffer(&vga16fb.fb_info);
iounmap(vga16fb.video_vbase);
unregister_framebuffer(&vga16fb);
iounmap(vga16fb.screen_base);
/* XXX unshare VGA regions */
}
......
include/linux/fb.h
View file @ 115f4504
......@@ -364,8 +364,6 @@ struct fb_info {
char fontname[40]; /* default font name */
devfs_handle_t devfs_handle; /* Devfs handle for new name */
devfs_handle_t devfs_lhandle; /* Devfs handle for compat. symlink */
int (*updatevar)(int, struct fb_info*);
/* tell fb to update the vars */
void *pseudo_palette; /* Fake palette of 16 colors and
the cursor's color for non
palette mode */
......
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