Commit 15b95a15 authored by Kalle Valo's avatar Kalle Valo

Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git

ath.git patches for 4.9. Major changes:

ath9k

* disable RNG by default
parents ffd74aca b9301505
......@@ -91,59 +91,37 @@ static int ath10k_ahb_clock_init(struct ath10k *ar)
{
struct ath10k_ahb *ar_ahb = ath10k_ahb_priv(ar);
struct device *dev;
int ret;
dev = &ar_ahb->pdev->dev;
ar_ahb->cmd_clk = clk_get(dev, "wifi_wcss_cmd");
ar_ahb->cmd_clk = devm_clk_get(dev, "wifi_wcss_cmd");
if (IS_ERR_OR_NULL(ar_ahb->cmd_clk)) {
ath10k_err(ar, "failed to get cmd clk: %ld\n",
PTR_ERR(ar_ahb->cmd_clk));
ret = ar_ahb->cmd_clk ? PTR_ERR(ar_ahb->cmd_clk) : -ENODEV;
goto out;
return ar_ahb->cmd_clk ? PTR_ERR(ar_ahb->cmd_clk) : -ENODEV;
}
ar_ahb->ref_clk = clk_get(dev, "wifi_wcss_ref");
ar_ahb->ref_clk = devm_clk_get(dev, "wifi_wcss_ref");
if (IS_ERR_OR_NULL(ar_ahb->ref_clk)) {
ath10k_err(ar, "failed to get ref clk: %ld\n",
PTR_ERR(ar_ahb->ref_clk));
ret = ar_ahb->ref_clk ? PTR_ERR(ar_ahb->ref_clk) : -ENODEV;
goto err_cmd_clk_put;
return ar_ahb->ref_clk ? PTR_ERR(ar_ahb->ref_clk) : -ENODEV;
}
ar_ahb->rtc_clk = clk_get(dev, "wifi_wcss_rtc");
ar_ahb->rtc_clk = devm_clk_get(dev, "wifi_wcss_rtc");
if (IS_ERR_OR_NULL(ar_ahb->rtc_clk)) {
ath10k_err(ar, "failed to get rtc clk: %ld\n",
PTR_ERR(ar_ahb->rtc_clk));
ret = ar_ahb->rtc_clk ? PTR_ERR(ar_ahb->rtc_clk) : -ENODEV;
goto err_ref_clk_put;
return ar_ahb->rtc_clk ? PTR_ERR(ar_ahb->rtc_clk) : -ENODEV;
}
return 0;
err_ref_clk_put:
clk_put(ar_ahb->ref_clk);
err_cmd_clk_put:
clk_put(ar_ahb->cmd_clk);
out:
return ret;
}
static void ath10k_ahb_clock_deinit(struct ath10k *ar)
{
struct ath10k_ahb *ar_ahb = ath10k_ahb_priv(ar);
if (!IS_ERR_OR_NULL(ar_ahb->cmd_clk))
clk_put(ar_ahb->cmd_clk);
if (!IS_ERR_OR_NULL(ar_ahb->ref_clk))
clk_put(ar_ahb->ref_clk);
if (!IS_ERR_OR_NULL(ar_ahb->rtc_clk))
clk_put(ar_ahb->rtc_clk);
ar_ahb->cmd_clk = NULL;
ar_ahb->ref_clk = NULL;
ar_ahb->rtc_clk = NULL;
......@@ -213,92 +191,51 @@ static int ath10k_ahb_rst_ctrl_init(struct ath10k *ar)
{
struct ath10k_ahb *ar_ahb = ath10k_ahb_priv(ar);
struct device *dev;
int ret;
dev = &ar_ahb->pdev->dev;
ar_ahb->core_cold_rst = reset_control_get(dev, "wifi_core_cold");
if (IS_ERR_OR_NULL(ar_ahb->core_cold_rst)) {
ar_ahb->core_cold_rst = devm_reset_control_get(dev, "wifi_core_cold");
if (IS_ERR(ar_ahb->core_cold_rst)) {
ath10k_err(ar, "failed to get core cold rst ctrl: %ld\n",
PTR_ERR(ar_ahb->core_cold_rst));
ret = ar_ahb->core_cold_rst ?
PTR_ERR(ar_ahb->core_cold_rst) : -ENODEV;
goto out;
return PTR_ERR(ar_ahb->core_cold_rst);
}
ar_ahb->radio_cold_rst = reset_control_get(dev, "wifi_radio_cold");
if (IS_ERR_OR_NULL(ar_ahb->radio_cold_rst)) {
ar_ahb->radio_cold_rst = devm_reset_control_get(dev, "wifi_radio_cold");
if (IS_ERR(ar_ahb->radio_cold_rst)) {
ath10k_err(ar, "failed to get radio cold rst ctrl: %ld\n",
PTR_ERR(ar_ahb->radio_cold_rst));
ret = ar_ahb->radio_cold_rst ?
PTR_ERR(ar_ahb->radio_cold_rst) : -ENODEV;
goto err_core_cold_rst_put;
return PTR_ERR(ar_ahb->radio_cold_rst);
}
ar_ahb->radio_warm_rst = reset_control_get(dev, "wifi_radio_warm");
if (IS_ERR_OR_NULL(ar_ahb->radio_warm_rst)) {
ar_ahb->radio_warm_rst = devm_reset_control_get(dev, "wifi_radio_warm");
if (IS_ERR(ar_ahb->radio_warm_rst)) {
ath10k_err(ar, "failed to get radio warm rst ctrl: %ld\n",
PTR_ERR(ar_ahb->radio_warm_rst));
ret = ar_ahb->radio_warm_rst ?
PTR_ERR(ar_ahb->radio_warm_rst) : -ENODEV;
goto err_radio_cold_rst_put;
return PTR_ERR(ar_ahb->radio_warm_rst);
}
ar_ahb->radio_srif_rst = reset_control_get(dev, "wifi_radio_srif");
if (IS_ERR_OR_NULL(ar_ahb->radio_srif_rst)) {
ar_ahb->radio_srif_rst = devm_reset_control_get(dev, "wifi_radio_srif");
if (IS_ERR(ar_ahb->radio_srif_rst)) {
ath10k_err(ar, "failed to get radio srif rst ctrl: %ld\n",
PTR_ERR(ar_ahb->radio_srif_rst));
ret = ar_ahb->radio_srif_rst ?
PTR_ERR(ar_ahb->radio_srif_rst) : -ENODEV;
goto err_radio_warm_rst_put;
return PTR_ERR(ar_ahb->radio_srif_rst);
}
ar_ahb->cpu_init_rst = reset_control_get(dev, "wifi_cpu_init");
if (IS_ERR_OR_NULL(ar_ahb->cpu_init_rst)) {
ar_ahb->cpu_init_rst = devm_reset_control_get(dev, "wifi_cpu_init");
if (IS_ERR(ar_ahb->cpu_init_rst)) {
ath10k_err(ar, "failed to get cpu init rst ctrl: %ld\n",
PTR_ERR(ar_ahb->cpu_init_rst));
ret = ar_ahb->cpu_init_rst ?
PTR_ERR(ar_ahb->cpu_init_rst) : -ENODEV;
goto err_radio_srif_rst_put;
return PTR_ERR(ar_ahb->cpu_init_rst);
}
return 0;
err_radio_srif_rst_put:
reset_control_put(ar_ahb->radio_srif_rst);
err_radio_warm_rst_put:
reset_control_put(ar_ahb->radio_warm_rst);
err_radio_cold_rst_put:
reset_control_put(ar_ahb->radio_cold_rst);
err_core_cold_rst_put:
reset_control_put(ar_ahb->core_cold_rst);
out:
return ret;
}
static void ath10k_ahb_rst_ctrl_deinit(struct ath10k *ar)
{
struct ath10k_ahb *ar_ahb = ath10k_ahb_priv(ar);
if (!IS_ERR_OR_NULL(ar_ahb->core_cold_rst))
reset_control_put(ar_ahb->core_cold_rst);
if (!IS_ERR_OR_NULL(ar_ahb->radio_cold_rst))
reset_control_put(ar_ahb->radio_cold_rst);
if (!IS_ERR_OR_NULL(ar_ahb->radio_warm_rst))
reset_control_put(ar_ahb->radio_warm_rst);
if (!IS_ERR_OR_NULL(ar_ahb->radio_srif_rst))
reset_control_put(ar_ahb->radio_srif_rst);
if (!IS_ERR_OR_NULL(ar_ahb->cpu_init_rst))
reset_control_put(ar_ahb->cpu_init_rst);
ar_ahb->core_cold_rst = NULL;
ar_ahb->radio_cold_rst = NULL;
ar_ahb->radio_warm_rst = NULL;
......@@ -572,6 +509,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar)
ar_ahb->irq = platform_get_irq_byname(pdev, "legacy");
if (ar_ahb->irq < 0) {
ath10k_err(ar, "failed to get irq number: %d\n", ar_ahb->irq);
ret = ar_ahb->irq;
goto err_clock_deinit;
}
......@@ -850,6 +788,7 @@ static int ath10k_ahb_probe(struct platform_device *pdev)
chip_id = ath10k_ahb_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
if (chip_id == 0xffffffff) {
ath10k_err(ar, "failed to get chip id\n");
ret = -ENODEV;
goto err_halt_device;
}
......
......@@ -39,7 +39,7 @@
* chooses what to send (buffer address, length). The destination
* side keeps a supply of "anonymous receive buffers" available and
* it handles incoming data as it arrives (when the destination
* recieves an interrupt).
* receives an interrupt).
*
* The sender may send a simple buffer (address/length) or it may
* send a small list of buffers. When a small list is sent, hardware
......@@ -433,6 +433,13 @@ void ath10k_ce_rx_update_write_idx(struct ath10k_ce_pipe *pipe, u32 nentries)
unsigned int nentries_mask = dest_ring->nentries_mask;
unsigned int write_index = dest_ring->write_index;
u32 ctrl_addr = pipe->ctrl_addr;
u32 cur_write_idx = ath10k_ce_dest_ring_write_index_get(ar, ctrl_addr);
/* Prevent CE ring stuck issue that will occur when ring is full.
* Make sure that write index is 1 less than read index.
*/
if ((cur_write_idx + nentries) == dest_ring->sw_index)
nentries -= 1;
write_index = CE_RING_IDX_ADD(nentries_mask, write_index, nentries);
ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index);
......
......@@ -68,6 +68,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA9887_HW_1_0_VERSION,
......@@ -87,6 +88,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA6174_HW_2_1_VERSION,
......@@ -105,6 +107,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA6174_HW_2_1_VERSION,
......@@ -123,6 +126,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA6174_HW_3_0_VERSION,
......@@ -141,6 +145,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA6174_HW_3_2_VERSION,
......@@ -160,6 +165,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA99X0_HW_2_0_DEV_VERSION,
......@@ -184,6 +190,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
},
{
.id = QCA9984_HW_1_0_DEV_VERSION,
......@@ -208,6 +215,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
},
{
.id = QCA9888_HW_2_0_DEV_VERSION,
......@@ -231,6 +239,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
},
{
.id = QCA9377_HW_1_0_DEV_VERSION,
......@@ -249,6 +258,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA9377_HW_1_1_DEV_VERSION,
......@@ -267,6 +277,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
},
{
.id = QCA4019_HW_1_0_DEV_VERSION,
......@@ -292,6 +303,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
},
};
......@@ -1960,6 +1972,9 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
goto err_hif_stop;
}
if (ar->max_num_vdevs >= 64)
ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
else
ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
INIT_LIST_HEAD(&ar->arvifs);
......
......@@ -201,10 +201,10 @@ struct ath10k_fw_stats_pdev {
/* PDEV stats */
s32 ch_noise_floor;
u32 tx_frame_count;
u32 rx_frame_count;
u32 rx_clear_count;
u32 cycle_count;
u32 tx_frame_count; /* Cycles spent transmitting frames */
u32 rx_frame_count; /* Cycles spent receiving frames */
u32 rx_clear_count; /* Total channel busy time, evidently */
u32 cycle_count; /* Total on-channel time */
u32 phy_err_count;
u32 chan_tx_power;
u32 ack_rx_bad;
......
......@@ -595,7 +595,7 @@ enum htt_rx_mpdu_status {
/* only accept EAPOL frames */
HTT_RX_IND_MPDU_STATUS_UNAUTH_PEER,
HTT_RX_IND_MPDU_STATUS_OUT_OF_SYNC,
/* Non-data in promiscous mode */
/* Non-data in promiscuous mode */
HTT_RX_IND_MPDU_STATUS_MGMT_CTRL,
HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR,
HTT_RX_IND_MPDU_STATUS_DECRYPT_ERR,
......@@ -900,7 +900,7 @@ struct htt_rx_in_ord_ind {
* Purpose: indicate how many 32-bit integers follow the message header
* - NUM_CHARS
* Bits 31:16
* Purpose: indicate how many 8-bit charaters follow the series of integers
* Purpose: indicate how many 8-bit characters follow the series of integers
*/
struct htt_rx_test {
u8 num_ints;
......@@ -1042,10 +1042,10 @@ struct htt_dbg_stats_wal_tx_stats {
/* illegal rate phy errors */
__le32 illgl_rate_phy_err;
/* wal pdev continous xretry */
/* wal pdev continuous xretry */
__le32 pdev_cont_xretry;
/* wal pdev continous xretry */
/* wal pdev continuous xretry */
__le32 pdev_tx_timeout;
/* wal pdev resets */
......
......@@ -1103,6 +1103,7 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
size_t hdr_len, crypto_len;
void *rfc1042;
bool is_first, is_last, is_amsdu;
int bytes_aligned = ar->hw_params.decap_align_bytes;
rxd = (void *)msdu->data - sizeof(*rxd);
hdr = (void *)rxd->rx_hdr_status;
......@@ -1119,8 +1120,8 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
hdr_len = ieee80211_hdrlen(hdr->frame_control);
crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
rfc1042 += round_up(hdr_len, 4) +
round_up(crypto_len, 4);
rfc1042 += round_up(hdr_len, bytes_aligned) +
round_up(crypto_len, bytes_aligned);
}
if (is_amsdu)
......
......@@ -85,7 +85,7 @@ const struct ath10k_hw_regs qca99x0_regs = {
.ce7_base_address = 0x0004bc00,
/* Note: qca99x0 supports upto 12 Copy Engines. Other than address of
* CE0 and CE1 no other copy engine is directly referred in the code.
* It is not really neccessary to assign address for newly supported
* It is not really necessary to assign address for newly supported
* CEs in this address table.
* Copy Engine Address
* CE8 0x0004c000
......
......@@ -284,7 +284,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
#define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)
#define QCA_REV_40XX(ar) ((ar)->hw_rev == ATH10K_HW_QCA4019)
/* Known pecularities:
/* Known peculiarities:
* - raw appears in nwifi decap, raw and nwifi appear in ethernet decap
* - raw have FCS, nwifi doesn't
* - ethernet frames have 802.11 header decapped and parts (base hdr, cipher
......@@ -408,6 +408,9 @@ struct ath10k_hw_params {
bool sw_decrypt_mcast_mgmt;
const struct ath10k_hw_ops *hw_ops;
/* Number of bytes used for alignment in rx_hdr_status of rx desc. */
int decap_align_bytes;
};
struct htt_rx_desc;
......
......@@ -2793,7 +2793,7 @@ static void ath10k_bss_disassoc(struct ieee80211_hw *hw,
ret = ath10k_wmi_vdev_down(ar, arvif->vdev_id);
if (ret)
ath10k_warn(ar, "faield to down vdev %i: %d\n",
ath10k_warn(ar, "failed to down vdev %i: %d\n",
arvif->vdev_id, ret);
arvif->def_wep_key_idx = -1;
......
......@@ -405,7 +405,7 @@ Fw Mode/SubMode Mask
* 1. target firmware would check magic number and if it's a match, firmware
* would consider the bits[0:15] are valid and base on that to calculate
* the end of DRAM. Early allocation would be located at that area and
* may be reclaimed when necesary
* may be reclaimed when necessary
* 2. if no magic number is found, early allocation would happen at "_end"
* symbol of ROM which is located before the app-data and might NOT be
* re-claimable. If this is adopted, link script should keep this in
......
......@@ -3514,6 +3514,12 @@ void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
continue;
}
/* mac80211 would have already asked us to stop beaconing and
* bring the vdev down, so continue in that case
*/
if (!arvif->is_up)
continue;
/* There are no completions for beacons so wait for next SWBA
* before telling mac80211 to decrement CSA counter
*
......
......@@ -55,7 +55,7 @@
* type.
*
* 6. Comment each parameter part of the WMI command/event structure by
* using the 2 stars at the begining of C comment instead of one star to
* using the 2 stars at the beginning of C comment instead of one star to
* enable HTML document generation using Doxygen.
*
*/
......@@ -2087,7 +2087,7 @@ struct wmi_resource_config {
* In offload mode target supports features like WOW, chatter and
* other protocol offloads. In order to support them some
* functionalities like reorder buffering, PN checking need to be
* done in target. This determines maximum number of peers suported
* done in target. This determines maximum number of peers supported
* by target in offload mode
*/
__le32 num_offload_peers;
......@@ -2268,7 +2268,7 @@ struct wmi_resource_config {
* Max. number of Tx fragments per MSDU
* This parameter controls the max number of Tx fragments per MSDU.
* This is sent by the target as part of the WMI_SERVICE_READY event
* and is overriden by the OS shim as required.
* and is overridden by the OS shim as required.
*/
__le32 max_frag_entries;
} __packed;
......@@ -2450,7 +2450,7 @@ struct wmi_resource_config_10x {
* Max. number of Tx fragments per MSDU
* This parameter controls the max number of Tx fragments per MSDU.
* This is sent by the target as part of the WMI_SERVICE_READY event
* and is overriden by the OS shim as required.
* and is overridden by the OS shim as required.
*/
__le32 max_frag_entries;
} __packed;
......@@ -2744,7 +2744,7 @@ struct wmi_init_cmd {
struct wmi_host_mem_chunks mem_chunks;
} __packed;
/* _10x stucture is from 10.X FW API */
/* _10x structure is from 10.X FW API */
struct wmi_init_cmd_10x {
struct wmi_resource_config_10x resource_config;
struct wmi_host_mem_chunks mem_chunks;
......@@ -3967,7 +3967,7 @@ struct wmi_pdev_stats_tx {
/* illegal rate phy errors */
__le32 illgl_rate_phy_err;
/* wal pdev continous xretry */
/* wal pdev continuous xretry */
__le32 pdev_cont_xretry;
/* wal pdev continous xretry */
......@@ -4222,10 +4222,10 @@ struct wmi_10_2_stats_event {
*/
struct wmi_pdev_stats_base {
__le32 chan_nf;
__le32 tx_frame_count;
__le32 rx_frame_count;
__le32 rx_clear_count;
__le32 cycle_count;
__le32 tx_frame_count; /* Cycles spent transmitting frames */
__le32 rx_frame_count; /* Cycles spent receiving frames */
__le32 rx_clear_count; /* Total channel busy time, evidently */
__le32 cycle_count; /* Total on-channel time */
__le32 phy_err_count;
__le32 chan_tx_pwr;
} __packed;
......@@ -4461,9 +4461,9 @@ struct wmi_vdev_start_request_cmd {
__le32 flags;
/* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
struct wmi_ssid ssid;
/* beacon/probe reponse xmit rate. Applicable for SoftAP. */
/* beacon/probe response xmit rate. Applicable for SoftAP. */
__le32 bcn_tx_rate;
/* beacon/probe reponse xmit power. Applicable for SoftAP. */
/* beacon/probe response xmit power. Applicable for SoftAP. */
__le32 bcn_tx_power;
/* number of p2p NOA descriptor(s) from scan entry */
__le32 num_noa_descriptors;
......@@ -4691,7 +4691,7 @@ enum wmi_vdev_param {
WMI_VDEV_PARAM_BEACON_INTERVAL,
/* Listen interval in TUs */
WMI_VDEV_PARAM_LISTEN_INTERVAL,
/* muticast rate in Mbps */
/* multicast rate in Mbps */
WMI_VDEV_PARAM_MULTICAST_RATE,
/* management frame rate in Mbps */
WMI_VDEV_PARAM_MGMT_TX_RATE,
......@@ -4822,7 +4822,7 @@ enum wmi_10x_vdev_param {
WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
/* Listen interval in TUs */
WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
/* muticast rate in Mbps */
/* multicast rate in Mbps */
WMI_10X_VDEV_PARAM_MULTICAST_RATE,
/* management frame rate in Mbps */
WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
......@@ -5067,7 +5067,7 @@ struct wmi_vdev_simple_event {
} __packed;
/* VDEV start response status codes */
/* VDEV succesfully started */
/* VDEV successfully started */
#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
/* requested VDEV not found */
......@@ -5383,7 +5383,7 @@ enum wmi_sta_ps_param_pspoll_count {
#define WMI_UAPSD_AC_TYPE_TRIG 1
#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
((type == WMI_UAPSD_AC_TYPE_DELI) ? (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
(type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
enum wmi_sta_ps_param_uapsd {
WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
......
......@@ -3520,7 +3520,7 @@ int ath6kl_wmi_set_pvb_cmd(struct wmi *wmi, u8 if_idx, u16 aid,
ret = ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_AP_SET_PVB_CMDID,
NO_SYNC_WMIFLAG);
return 0;
return ret;
}
int ath6kl_wmi_set_rx_frame_format_cmd(struct wmi *wmi, u8 if_idx,
......
......@@ -180,7 +180,7 @@ config ATH9K_HTC_DEBUGFS
config ATH9K_HWRNG
bool "Random number generator support"
depends on ATH9K && (HW_RANDOM = y || HW_RANDOM = ATH9K)
default y
default n
---help---
This option incorporates the ADC register output as a source of
randomness into Linux entropy pool (/dev/urandom and /dev/random)
......
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