Commit 1c3fb9b8 authored by Andrea Merello's avatar Andrea Merello Committed by John W. Linville

rtl8180: fix enabled interrupt mask for rtl8187se

When preparing the bitfield to write to HW register, the high-priority
queue error interrupt bit is set two times, and the beacon queue
TX-OK interrupt is not enabled.

Currently this have no functional impact because the high-priority
queue is not used at all, and the beacon queue is not used yet.

This patch removes high-priority queue bits and it adds the
beacon queue missing bit.
It removes also the management queue bits because it is not used.

This was found by static code analyzer.
Reported-by: default avatarFengguang Wu <fengguang.wu@intel.com>
Reported-by: default avatarJulia Lawall <julia.lawall@lip6.fr>
Signed-off-by: default avatarAndrea Merello <andrea.merello@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 222aaffe
......@@ -683,9 +683,8 @@ static void rtl8180_int_enable(struct ieee80211_hw *dev)
struct rtl8180_priv *priv = dev->priv;
if (priv->chip_family == RTL818X_CHIP_FAMILY_RTL8187SE) {
rtl818x_iowrite32(priv, &priv->map->IMR, IMR_TMGDOK |
IMR_TBDER | IMR_THPDER |
IMR_THPDER | IMR_THPDOK |
rtl818x_iowrite32(priv, &priv->map->IMR,
IMR_TBDER | IMR_TBDOK |
IMR_TVODER | IMR_TVODOK |
IMR_TVIDER | IMR_TVIDOK |
IMR_TBEDER | IMR_TBEDOK |
......
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