drm/radeon: sun/hainan chips do not have UVD (v2)

Skip UVD handling on them.

v2: split has_uvd tracking into separate patch
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/radeon/si.c

@@ -2635,9 +2635,11 @@ static void si_gpu_init(struct radeon_device *rdev)
 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);
 	WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);
 	WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);
+	if (rdev->has_uvd) {
 		WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);
 		WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
 		WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
+	}
 
 	si_tiling_mode_table_init(rdev);
 
@@ -5213,6 +5215,7 @@ static int si_startup(struct radeon_device *rdev)
 		return r;
 	}
 
+	if (rdev->has_uvd) {
 		r = rv770_uvd_resume(rdev);
 		if (!r) {
 			r = radeon_fence_driver_start_ring(rdev,
@@ -5222,6 +5225,7 @@ static int si_startup(struct radeon_device *rdev)
 		}
 		if (r)
 			rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0;
+	}
 
 	/* Enable IRQ */
 	r = si_irq_init(rdev);
@@ -5280,6 +5284,7 @@ static int si_startup(struct radeon_device *rdev)
 	if (r)
 		return r;
 
+	if (rdev->has_uvd) {
 		ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
 		if (ring->ring_size) {
 			r = radeon_ring_init(rdev, ring, ring->ring_size,
@@ -5291,6 +5296,7 @@ static int si_startup(struct radeon_device *rdev)
 			if (r)
 				DRM_ERROR("radeon: failed initializing UVD (%d).\n", r);
 		}
+	}
 
 	r = radeon_ib_pool_init(rdev);
 	if (r) {
@@ -5338,8 +5344,10 @@ int si_suspend(struct radeon_device *rdev)
 	radeon_vm_manager_fini(rdev);
 	si_cp_enable(rdev, false);
 	cayman_dma_stop(rdev);
+	if (rdev->has_uvd) {
 		r600_uvd_rbc_stop(rdev);
 		radeon_uvd_suspend(rdev);
+	}
 	si_irq_suspend(rdev);
 	radeon_wb_disable(rdev);
 	si_pcie_gart_disable(rdev);
@@ -5427,12 +5435,14 @@ int si_init(struct radeon_device *rdev)
 	ring->ring_obj = NULL;
 	r600_ring_init(rdev, ring, 64 * 1024);
 
+	if (rdev->has_uvd) {
 		r = radeon_uvd_init(rdev);
 		if (!r) {
 			ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
 			ring->ring_obj = NULL;
 			r600_ring_init(rdev, ring, 4096);
 		}
+	}
 
 	rdev->ih.ring_obj = NULL;
 	r600_ih_ring_init(rdev, 64 * 1024);
@@ -5479,6 +5489,7 @@ void si_fini(struct radeon_device *rdev)
 	radeon_vm_manager_fini(rdev);
 	radeon_ib_pool_fini(rdev);
 	radeon_irq_kms_fini(rdev);
+	if (rdev->has_uvd)
 		radeon_uvd_fini(rdev);
 	si_pcie_gart_fini(rdev);
 	r600_vram_scratch_fini(rdev);