Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
nexedi
linux
Commits
1e935c59
Commit
1e935c59
authored
Jan 22, 2003
by
Justin T. Gibbs
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Update Aic7xxx and Aic79xx driver documentation.
parent
28c19d50
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
256 additions
and
147 deletions
+256
-147
Documentation/scsi/aic79xx.txt
Documentation/scsi/aic79xx.txt
+140
-84
Documentation/scsi/aic7xxx.txt
Documentation/scsi/aic7xxx.txt
+116
-63
No files found.
Documentation/scsi/aic79xx.txt
View file @
1e935c59
====================================================================
= Adaptec Ultra320 Family Manager Set v1.
1.1
=
= Adaptec Ultra320 Family Manager Set v1.
3.0
=
= =
= README for =
= The Linux Operating System =
...
...
@@ -27,6 +27,10 @@ The following information is available in this file:
Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to
Ultra320 SCSI Card (two external VHDC
and one internal 68-pin)
Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to
Ultra320 SCSI Card (two external VHDC
and one internal 68-pin) based on the
AIC-7902B ASIC
Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to
Ultra320 SCSI Card (one external
68-pin, two internal 68-pin, one
...
...
@@ -39,12 +43,28 @@ The following information is available in this file:
Ultra320 SCSI ASIC
AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to
Ultra320 SCSI ASIC
AIC-7902B Dual Channel 64-bit PCI-X 133MHz to
Ultra320 SCSI ASIC
2. Version History
(V1.3.0, January 2003) Full regression testing for all U320 products
completed.
(V1.3.0 ALPHA, November 2002) Initial Alpha release.
Added abort and target/lun reset error recovery handler and
interrupt coalessing.
(V1.2.0, November 2002) Added support for Domain Validation and
Hewlett-Packard version of the 39320D and AIC-7902 adapters.
Support for previous adapters has not been fully tested and should
only be used at the customer's own risk.
(V1.1.1, September 2002) Added support for the Linux 2.5.X kernel series
(V1.1.0, August 2002) Added support for four additional SCSI
products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.
(V1.1, August 2002) Added support for four additional SCSI
products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.
...
...
@@ -56,20 +76,21 @@ The following information is available in this file:
- 320MB/s transfer rates
- Packetized SCSI Protocol at 160MB/s and 320MB/s
- Quick Arbitration Selection (QAS)
- Initiator Mode (target mode not currently
supported)
- Support for the PCI-x standard up to 133MHz
- Support for the PCI v2.2 standard
- Retained Training Information (Rev B. ASIC only)
- Interrupt Coalessing
- Initiator Mode (target mode not currently
supported)
- Support for the PCI-X standard up to 133MHz
- Support for the PCI v2.2 standard
2.2. Operating System Support:
- Redhat Linux 7.2, 7.3, Advanced Server 2.1
- SuSE Linux 7.3, 8.0
, Enterprise Server 7
- Redhat Linux 7.2, 7.3,
8.0,
Advanced Server 2.1
- SuSE Linux 7.3, 8.0, 8.1
, Enterprise Server 7
- only Intel and AMD x86 supported at this time
- >4GB memory configurations supported.
- >4GB memory configurations supported.
Refer to the User's Guide for more details on this.
3. Command Line Options
WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS
...
...
@@ -77,7 +98,7 @@ The following information is available in this file:
USE THEM WITH CAUTION.
Edit the file "modules.conf" in the directory /etc and add/edit a
line containing 'options aic79xx=[command[,command...]]' where
line containing 'options aic79xx
aic79xx
=[command[,command...]]' where
'command' is one or more of the following:
-----------------------------------------------------------------
Option: verbose
...
...
@@ -88,6 +109,9 @@ The following information is available in this file:
-----------------------------------------------------------------
Option: debug:[value]
Definition: Enables various levels of debugging information
The bit definitions for the debugging mask can
be found in drivers/scsi/aic7xxx/aic79xx.h under
the "Debug" heading.
Possible Values: 0x0000 = no debugging, 0xffff = full debugging
Default Value: 0x0000
-----------------------------------------------------------------
...
...
@@ -114,120 +138,140 @@ The following information is available in this file:
Possible Values: This option is a flag
Default Value: disabled
-----------------------------------------------------------------
Option: global_tag_depth
Option: global_tag_depth
Definition: Global tag depth for all targets on all busses.
This option sets the default tag depth which
may be selectively overridden vi the tag_info
option.
This option sets the default tag depth which
may be selectively overridden vi the tag_info
option.
Possible Values: 1 - 253
Default Value: 32
-----------------------------------------------------------------
Option: tag_info:{{value[,value...]}[,{value[,value...]}...]}
Definition: Set the per-target tagged queue depth on a
per controller basis. Both controllers and targets
may be ommitted indicating that they should retain
the default tag depth.
per controller basis. Both controllers and targets
may be ommitted indicating that they should retain
the default tag depth.
Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}
On Controller 0
specifies a tag depth of 16 for target 0
specifies a tag depth of 64 for target 3
specifies a tag depth of 8 for targets 4 and 5
leaves target 6 at the default
specifies a tag depth of 32 for targets 1,2,7-15
All other targets retain the default depth.
tag_info:{{},{32,,32}}
On Controller 1
specifies a tag depth of 32 for targets 0 and 2
All other targets retain the default depth.
On Controller 0
specifies a tag depth of 16 for target 0
specifies a tag depth of 64 for target 3
specifies a tag depth of 8 for targets 4 and 5
leaves target 6 at the default
specifies a tag depth of 32 for targets 1,2,7-15
All other targets retain the default depth.
tag_info:{{},{32,,32}}
On Controller 1
specifies a tag depth of 32 for targets 0 and 2
All other targets retain the default depth.
Possible Values: 1 - 253
Default Value: 32
-----------------------------------------------------------------
Option: rd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]}
Definition: Enable read streaming on a per target basis.
The rd_strm_bitmask is a 16 bit hex value in which
each bit represents a target. Setting the target's
each bit represents a target. Setting the target's
bit to '1' enables read streaming for that
target. Controllers may be ommitted indicating that
they should retain the default read streaming setting.
Example: rd_strm:{0x0041}
On Controller 0
enables read streaming for targets 0 and 6.
disables read streaming for targets 1-5,7-15.
All other targets retain the default read
streaming setting.
Example: rd_strm:{0x0023,,0xFFFF}
On Controller 0
enables read streaming for targets 1,2, and 5.
disables read streaming for targets 3,4,6-15.
On Controller 2
enables read streaming for all targets.
All other targets retain the default read
streaming setting.
they should retain the default read streaming setting.
Example: rd_strm:{0x0041}
On Controller 0
enables read streaming for targets 0 and 6.
disables read streaming for targets 1-5,7-15.
All other targets retain the default read
streaming setting.
Example: rd_strm:{0x0023,,0xFFFF}
On Controller 0
enables read streaming for targets 1,2, and 5.
disables read streaming for targets 3,4,6-15.
On Controller 2
enables read streaming for all targets.
All other targets retain the default read
streaming setting.
Possible Values: 0x0000 - 0xffff
Default Value: 0x0000
-----------------------------------------------------------------
Option: dv: {value[,value...]}
Definition: Set Domain Validation Policy on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default read streaming setting.
Example: dv:{-1,0,,1,1,0}
On Controller 0 leave DV at its default setting.
On Controller 1 disable DV.
Skip configuration on Controller 2.
On Controllers 3 and 4 enable DV.
On Controller 5 disable DV.
Possible Values: < 0 Use setting from serial EEPROM.
0 Disable DV
> 0 Enable DV
Default Value: DV Serial EEPROM configuration setting.
-----------------------------------------------------------------
Option: seltime:[value]
Definition: Specifies the selection timeout value
Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
Default Value: 0
-----------------------------------------------------------------
*** The following three options should only be changed at ***
*** the direction of a technical support representative. ***
-----------------------------------------------------------------
Option: precomp: {value[,value...]}
Definition: Set IO Cell precompensation value on a per-controller
basis.
basis.
Controllers may be ommitted indicating that
they should retain the default precompensation setting.
Example: precomp:{0x1}
On Controller 0 set precompensation to 1.
Example: precomp:{1,,7}
On Controller 0 set precompensation to 1.
On Controller 2 set precompensation to 8.
they should retain the default precompensation setting.
Example: precomp:{0x1}
On Controller 0 set precompensation to 1.
Example: precomp:{1,,7}
On Controller 0 set precompensation to 1.
On Controller 2 set precompensation to 8.
Possible Values: 0 - 7
Default Value: Varies based on chip revision
-----------------------------------------------------------------
Option: slewrate: {value[,value...]}
Definition: Set IO Cell slew rate on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default slew rate setting.
Example: slewrate:{0x1}
On Controller 0 set slew rate to 1.
Example: slewrate :{1,,8}
On Controller 0 set slew rate to 1.
On Controller 2 set slew rate to 8.
they should retain the default slew rate setting.
Example: slewrate:{0x1}
On Controller 0 set slew rate to 1.
Example: slewrate :{1,,8}
On Controller 0 set slew rate to 1.
On Controller 2 set slew rate to 8.
Possible Values: 0 - 15
Default Value: Varies based on chip revision
-----------------------------------------------------------------
Option: amplitude: {value[,value...]}
Definition: Set IO Cell signal amplitude on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default read streaming setting.
Example: amplitude:{0x1}
On Controller 0 set amplitude to 1.
Example: amplitude :{1,,7}
On Controller 0 set amplitude to 1.
On Controller 2 set amplitude to 7.
they should retain the default read streaming setting.
Example: amplitude:{0x1}
On Controller 0 set amplitude to 1.
Example: amplitude :{1,,7}
On Controller 0 set amplitude to 1.
On Controller 2 set amplitude to 7.
Possible Values: 1 - 7
Default Value: Varies based on chip revision
-----------------------------------------------------------------
Option: seltime:[value]
Definition: Specifies the selection timeout value
Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
Default Value: 0
-----------------------------------------------------------------
Example: 'options aic79xx=verbose,rd_strm:{{0x0041}}'
enables verbose output in the driver and turns read streaming on
for targets 0 and 6 of Controller 0.
Example: 'options aic79xx
aic79xx
=verbose,rd_strm:{{0x0041}}'
enables verbose output in the driver and turns read streaming on
for targets 0 and 6 of Controller 0.
4. Additional Notes
4.1. Known/Unresolved or FYI Issues
* Domain Validation is not implemented.
* Under SuSE Linux Enterprise 7, the driver may fail to operate
correctly due to a problem with PCI interrupt routing in the
Linux kernel. Please contact SuSE for an updated Linux
kernel.
* Under SuSE Linux Enterprise 7, the driver may fail to operate
correctly due to a problem with PCI interrupt routing in the
Linux kernel. Please contact SuSE for an updated Linux
kernel.
4.2. Third-Party Compatibility Issues
...
...
@@ -240,6 +284,18 @@ The following information is available in this file:
* PCI Hot Plug is untested and may cause the operating system
to stop responding.
* Luns that are not numbered contiguously starting with 0 might not
be automatically probed during system startup. This is a limitation
of the OS. Please contact your Linux vendor for instructions on
manually probing non-contiguous luns.
* Using the Driver Update Disk version of this package during OS
installation under RedHat might result in two versions of this
driver being installed into the system module directory. This
might cause problems with the /sbin/mkinitrd program and/or
other RPM packages that try to install system modules. The best
way to correct this once the system is running is to install
the latest RPM package version of this driver, available from
http://www.adaptec.com.
5. Contacting Adaptec
...
...
@@ -316,7 +372,7 @@ The following information is available in this file:
-------------------------------------------------------------------
(c) 200
2
Adaptec, Inc. All Rights Reserved. No part of this
(c) 200
3
Adaptec, Inc. All Rights Reserved. No part of this
publication may be reproduced, stored in a retrieval system, or
transmitted in any form or by any means, electronic, mechanical,
photocopying, recording or otherwise, without prior written consent
...
...
Documentation/scsi/aic7xxx.txt
View file @
1e935c59
====================================================================
= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.
10
=
= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.
28
=
= README for =
= The Linux Operating System =
====================================================================
...
...
@@ -7,8 +7,9 @@
The following information is available in this file:
1. Supported Hardware
2. Command Line Options
3. Contacting Adaptec
2. Version History
3. Command Line Options
4. Contacting Adaptec
1. Supported Hardware
...
...
@@ -44,52 +45,52 @@ The following information is available in this file:
5. Block Move Instruction Support - Doubles the speed of certain
sequencer operations.
6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch
performance.
performance.
7. Queuing Registers - Allows queuing of new transactions without
pausing the sequencer.
pausing the sequencer.
8. Multiple Target IDs - Allows the controller to respond to selection
as a target on multiple SCSI IDs.
Controller Chip Host-Bus Int-Connectors Ext-Connectors Notes
--------------------------------------------------------------------------
AHA-274X[A] aic7770 EISA
SE-50M
SE-HD50F
AHA-274X[A]W aic7770 EISA
SE-HD68F
SE-HD68F
SE-50M
AHA-274X[A]T aic7770 EISA 2 X SE-50M
SE-HD50F
AHA-2842 aic7770 VL SE-50M
SE-HD50F
AHA-2940AU aic7860 PCI/32 SE-50M
SE-HD50F
AHA-274X[A] aic7770 EISA
SE-50M
SE-HD50F
AHA-274X[A]W aic7770 EISA
SE-HD68F
SE-HD68F
SE-50M
AHA-274X[A]T aic7770 EISA 2 X SE-50M
SE-HD50F
AHA-2842 aic7770 VL SE-50M
SE-HD50F
AHA-2940AU aic7860 PCI/32 SE-50M
SE-HD50F
AVA-2902I aic7860 PCI/32 SE-50M
AVA-2902E aic7860 PCI/32 SE-50M
AVA-2906 aic7856 PCI/32 SE-50M
SE-DB25F
APC-7850 aic7850 PCI/32 SE-50M
1
AVA-2906 aic7856 PCI/32 SE-50M
SE-DB25F
APC-7850 aic7850 PCI/32 SE-50M
1
AVA-2940 aic7860 PCI/32 SE-50M
AHA-2920B aic7860 PCI/32 SE-50M
AHA-2930B aic7860 PCI/32 SE-50M
AHA-2920C aic7856 PCI/32 SE-50M
SE-HD50F
AHA-2920C aic7856 PCI/32 SE-50M
SE-HD50F
AHA-2930C aic7860 PCI/32 SE-50M
AHA-2930C aic7860 PCI/32 SE-50M
AHA-2910C aic7860 PCI/32 SE-50M
AHA-2915C aic7860 PCI/32 SE-50M
AHA-2940AU/CN aic7860 PCI/32 SE-50M
SE-HD50F
AHA-2944W aic7870 PCI/32 HVD-HD68F
HVD-HD68F
HVD-50M
AHA-3940W aic7870 PCI/32 2 X SE-HD68F
SE-HD68F 2
AHA-2940AU/CN aic7860 PCI/32 SE-50M
SE-HD50F
AHA-2944W aic7870 PCI/32 HVD-HD68F
HVD-HD68F
HVD-50M
AHA-3940W aic7870 PCI/32 2 X SE-HD68F
SE-HD68F 2
AHA-2940UW aic7880 PCI/32 SE-HD68F
SE-50M
SE-HD68F
AHA-2940U aic7880 PCI/32 SE-50M
SE-HD50F
SE-50M
SE-HD68F
AHA-2940U aic7880 PCI/32 SE-50M
SE-HD50F
AHA-2940D aic7880 PCI/32
A
HA-2940 A/T aic7880 PCI/32
a
HA-2940 A/T aic7880 PCI/32
AHA-2940D A/T aic7880 PCI/32
AHA-3940UW aic7880 PCI/32 2 X SE-HD68F
SE-HD68F 3
AHA-3940UW aic7880 PCI/32 2 X SE-HD68F
SE-HD68F 3
AHA-3940UWD aic7880 PCI/32 2 X SE-HD68F 2 X SE-VHD68F 3
AHA-3940U aic7880 PCI/32 2 X SE-50M
SE-HD50F 3
AHA-2944UW aic7880 PCI/32 HVD-HD68F
HVD-HD68F
HVD-50M
AHA-3940U aic7880 PCI/32 2 X SE-50M
SE-HD50F 3
AHA-2944UW aic7880 PCI/32 HVD-HD68F
HVD-HD68F
HVD-50M
AHA-3944UWD aic7880 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F 3
AHA-4944UW aic7880 PCI/32
AHA-2930UW aic7880 PCI/32
AHA-2940UW Pro aic7880 PCI/32 SE-HD68F
SE-HD68F 4
SE-50M
AHA-2940UW Pro aic7880 PCI/32 SE-HD68F
SE-HD68F 4
SE-50M
AHA-2940UW/CN aic7880 PCI/32
AHA-2940UDual aic7895 PCI/32
AHA-2940UWDual aic7895 PCI/32
...
...
@@ -98,30 +99,30 @@ The following information is available in this file:
AHA-3940AUWD aic7895 PCI/32
AHA-3940AU aic7895 PCI/32
AHA-3944AUWD aic7895 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F
AHA-2940U2B aic7890 PCI/32 LVD-HD68F
LVD-HD68F
AHA-2940U2B aic7890 PCI/32 LVD-HD68F
LVD-HD68F
AHA-2940U2 OEM aic7891 PCI/64
AHA-2940U2W aic7890 PCI/32 LVD-HD68F
LVD-HD68F
SE-HD68F
SE-50M
AHA-2950U2B aic7891 PCI/64 LVD-HD68F
LVD-HD68F
AHA-2930U2 aic7890 PCI/32 LVD-HD68F
SE-HD50F
SE-50M
AHA-2940U2W aic7890 PCI/32 LVD-HD68F
LVD-HD68F
SE-HD68F
SE-50M
AHA-2950U2B aic7891 PCI/64 LVD-HD68F
LVD-HD68F
AHA-2930U2 aic7890 PCI/32 LVD-HD68F
SE-HD50F
SE-50M
AHA-3950U2B aic7897 PCI/64
AHA-3950U2D aic7897 PCI/64
AHA-29160 aic7892 PCI/64-66
AHA-29160 CPQ aic7892 PCI/64-66
AHA-29160N aic7892 PCI/32 LVD-HD68F
SE-HD50F
SE-50M
AHA-29160N aic7892 PCI/32 LVD-HD68F
SE-HD50F
SE-50M
AHA-29160LP aic7892 PCI/64-66
AHA-19160 aic7892 PCI/64-66
AHA-29150LP aic7892 PCI/64-66
AHA-29130LP aic7892 PCI/64-66
AHA-3960D aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
LVD-50M
LVD-50M
AHA-3960D CPQ aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
LVD-50M
LVD-50M
AHA-39160 aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
LVD-50M
LVD-50M
1. No BIOS support
2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus
...
...
@@ -129,14 +130,22 @@ The following information is available in this file:
4. All three SCSI connectors may be used simultaneously without
SCSI "stub" effects.
2. Command Line Options
2. Version History
6.2.28 - Domain Validation Fixes
PCI parity error disable
Enhanced Memory Mapped I/O probe
6.2.20 - Added Domain Validation
3. Command Line Options
WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS
INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.
USE THEM WITH CAUTION.
Edit the file "modules.conf" in the directory /etc and add/edit a
line containing 'options aic7xxx=[command[,command...]]' where
line containing 'options aic7xxx
aic7xxx
=[command[,command...]]' where
'command' is one or more of the following:
-----------------------------------------------------------------
Option: verbose
...
...
@@ -149,6 +158,30 @@ The following information is available in this file:
Definition: Enables various levels of debugging information
Possible Values: 0x0000 = no debugging, 0xffff = full debugging
Default Value: 0x0000
-----------------------------------------------------------------
Option: no_probe
Definition: Do not probe for EISA/VLB controllers.
This is a toggle. If the driver is compiled
to not probe EISA/VLB controllers by default,
specifying "no_probe" will enable this probing.
If the driver is compiled to probe EISA/VLB
controllers by default, specifying "no_probe"
will disable this probing.
Possible Values: This option is a toggle
Default Value: EISA/VLB probing is disabled by default.
-----------------------------------------------------------------
Option: pci_parity
Definition: Toggles the detection of PCI parity errors.
On many motherboards with VIA chipsets,
PCI parity is not generated correctly on the
PCI bus. It is impossible for the hardware to
differentiate between these "spurious" parity
errors and real parity errors. The symptom of
this problem is a stream of the message:
"scsi0: Data Parity Error Detected during address or write data phase"
output by the driver.
Possible Values: This option is a toggle
Default Value: PCI Parity Error reporting is disabled
-----------------------------------------------------------------
Option: no_reset
Definition: Do not reset the bus during the initial probe
...
...
@@ -173,33 +206,33 @@ The following information is available in this file:
Possible Values: This option is a flag
Default Value: disabled
-----------------------------------------------------------------
Option: global_tag_depth
Option: global_tag_depth:[value]
Definition: Global tag depth for all targets on all busses.
This option sets the default tag depth which
may be selectively overridden vi the tag_info
option.
This option sets the default tag depth which
may be selectively overridden vi the tag_info
option.
Possible Values: 1 - 253
Default Value: 32
-----------------------------------------------------------------
Option: tag_info:{{value[,value...]}[,{value[,value...]}...]}
Definition: Set the per-target tagged queue depth on a
per controller basis. Both controllers and targets
may be ommitted indicating that they should retain
the default tag depth.
per controller basis. Both controllers and targets
may be ommitted indicating that they should retain
the default tag depth.
Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}
On Controller 0
specifies a tag depth of 16 for target 0
specifies a tag depth of 64 for target 3
specifies a tag depth of 8 for targets 4 and 5
leaves target 6 at the default
specifies a tag depth of 32 for targets 1,2,7-15
All other targets retain the default depth.
On Controller 0
specifies a tag depth of 16 for target 0
specifies a tag depth of 64 for target 3
specifies a tag depth of 8 for targets 4 and 5
leaves target 6 at the default
specifies a tag depth of 32 for targets 1,2,7-15
All other targets retain the default depth.
tag_info:{{},{32,,32}}
On Controller 1
specifies a tag depth of 32 for targets 0 and 2
All other targets retain the default depth.
tag_info:{{},{32,,32}}
On Controller 1
specifies a tag depth of 32 for targets 0 and 2
All other targets retain the default depth.
Possible Values: 1 - 253
Default Value: 32
-----------------------------------------------------------------
...
...
@@ -208,10 +241,30 @@ The following information is available in this file:
Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
Default Value: 0
-----------------------------------------------------------------
Option: dv: {value[,value...]}
Definition: Set Domain Validation Policy on a per-controller basis.
Controllers may be ommitted indicating that
they should retain the default read streaming setting.
Example: dv:{-1,0,,1,1,0}
On Controller 0 leave DV at its default setting.
On Controller 1 disable DV.
Skip configuration on Controller 2.
On Controllers 3 and 4 enable DV.
On Controller 5 disable DV.
Possible Values: < 0 Use setting from serial EEPROM.
0 Disable DV
> 0 Enable DV
Default Value: SCSI-Select setting on controllers with a SCSI Select
option for DV. Otherwise, on for controllers supporting
U160 speeds and off for all other controller types.
-----------------------------------------------------------------
Example: 'options aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1"
enables verbose logging, Disable EISA/VLB probing,
and set tag depth on Controller 1/Target 2 to 10 tags.
Example:
'options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1"
enables verbose logging, Disable EISA/VLB probing,
and set tag depth on Controller 1/Target 2 to 10 tags.
3. Contacting Adaptec
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment