Commit 1fed884d authored by Viresh Kumar's avatar Viresh Kumar Committed by Ralf Baechle

MIPS: loongsoon32: Migrate to new 'set-state' interface

Migrate loongsoon32 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: linaro-kernel@lists.linaro.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Patchwork: https://patchwork.linux-mips.org/patch/10609/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e3280b2a
...@@ -126,26 +126,34 @@ static irqreturn_t ls1x_clockevent_isr(int irq, void *devid) ...@@ -126,26 +126,34 @@ static irqreturn_t ls1x_clockevent_isr(int irq, void *devid)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static void ls1x_clockevent_set_mode(enum clock_event_mode mode, static int ls1x_clockevent_set_state_periodic(struct clock_event_device *cd)
struct clock_event_device *cd)
{ {
raw_spin_lock(&ls1x_timer_lock); raw_spin_lock(&ls1x_timer_lock);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
ls1x_pwmtimer_set_period(ls1x_jiffies_per_tick); ls1x_pwmtimer_set_period(ls1x_jiffies_per_tick);
ls1x_pwmtimer_restart(); ls1x_pwmtimer_restart();
case CLOCK_EVT_MODE_RESUME:
__raw_writel(INT_EN | CNT_EN, timer_base + PWM_CTRL); __raw_writel(INT_EN | CNT_EN, timer_base + PWM_CTRL);
break; raw_spin_unlock(&ls1x_timer_lock);
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_SHUTDOWN: return 0;
}
static int ls1x_clockevent_tick_resume(struct clock_event_device *cd)
{
raw_spin_lock(&ls1x_timer_lock);
__raw_writel(INT_EN | CNT_EN, timer_base + PWM_CTRL);
raw_spin_unlock(&ls1x_timer_lock);
return 0;
}
static int ls1x_clockevent_set_state_shutdown(struct clock_event_device *cd)
{
raw_spin_lock(&ls1x_timer_lock);
__raw_writel(__raw_readl(timer_base + PWM_CTRL) & ~CNT_EN, __raw_writel(__raw_readl(timer_base + PWM_CTRL) & ~CNT_EN,
timer_base + PWM_CTRL); timer_base + PWM_CTRL);
break;
default:
break;
}
raw_spin_unlock(&ls1x_timer_lock); raw_spin_unlock(&ls1x_timer_lock);
return 0;
} }
static int ls1x_clockevent_set_next(unsigned long evt, static int ls1x_clockevent_set_next(unsigned long evt,
...@@ -165,7 +173,10 @@ static struct clock_event_device ls1x_clockevent = { ...@@ -165,7 +173,10 @@ static struct clock_event_device ls1x_clockevent = {
.rating = 300, .rating = 300,
.irq = LS1X_TIMER_IRQ, .irq = LS1X_TIMER_IRQ,
.set_next_event = ls1x_clockevent_set_next, .set_next_event = ls1x_clockevent_set_next,
.set_mode = ls1x_clockevent_set_mode, .set_state_shutdown = ls1x_clockevent_set_state_shutdown,
.set_state_periodic = ls1x_clockevent_set_state_periodic,
.set_state_oneshot = ls1x_clockevent_set_state_shutdown,
.tick_resume = ls1x_clockevent_tick_resume,
}; };
static struct irqaction ls1x_pwmtimer_irqaction = { static struct irqaction ls1x_pwmtimer_irqaction = {
......
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