Commit 24c6cf51 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://kernel.bkbits.net/davem/net-2.5

into home.osdl.org:/home/torvalds/v2.5/linux
parents b08d296b 7b259082
...@@ -718,6 +718,15 @@ CONFIG_HAMACHI=m ...@@ -718,6 +718,15 @@ CONFIG_HAMACHI=m
CONFIG_YELLOWFIN=m CONFIG_YELLOWFIN=m
CONFIG_R8169=m CONFIG_R8169=m
CONFIG_SK98LIN=m CONFIG_SK98LIN=m
CONFIG_CONFIG_SK98LIN_T1=y
CONFIG_CONFIG_SK98LIN_T2=y
CONFIG_CONFIG_SK98LIN_T3=y
CONFIG_CONFIG_SK98LIN_T4=y
CONFIG_CONFIG_SK98LIN_T5=y
CONFIG_CONFIG_SK98LIN_T6=y
CONFIG_CONFIG_SK98LIN_T7=y
CONFIG_CONFIG_SK98LIN_T8=y
CONFIG_CONFIG_SK98LIN_T9=y
CONFIG_TIGON3=m CONFIG_TIGON3=m
# #
...@@ -999,6 +1008,7 @@ CONFIG_I2C_ALI15X3=m ...@@ -999,6 +1008,7 @@ CONFIG_I2C_ALI15X3=m
CONFIG_I2C_AMD756=m CONFIG_I2C_AMD756=m
CONFIG_I2C_AMD8111=m CONFIG_I2C_AMD8111=m
CONFIG_I2C_I801=m CONFIG_I2C_I801=m
CONFIG_I2C_NFORCE2=m
CONFIG_I2C_PIIX4=m CONFIG_I2C_PIIX4=m
CONFIG_I2C_SIS96X=m CONFIG_I2C_SIS96X=m
CONFIG_I2C_VIAPRO=m CONFIG_I2C_VIAPRO=m
...@@ -1543,6 +1553,7 @@ CONFIG_HAVE_DEC_LOCK=y ...@@ -1543,6 +1553,7 @@ CONFIG_HAVE_DEC_LOCK=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_DCFLUSH is not set # CONFIG_DEBUG_DCFLUSH is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_STACK_DEBUG is not set # CONFIG_STACK_DEBUG is not set
# #
......
This diff is collapsed.
/* /*
* tg3.c: Broadcom Tigon3 ethernet driver. * tg3.c: Broadcom Tigon3 ethernet driver.
* *
* Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com) * Copyright (C) 2001, 2002, 2003 David S. Miller (davem@redhat.com)
* Copyright (C) 2001, 2002 Jeff Garzik (jgarzik@pobox.com) * Copyright (C) 2001, 2002 Jeff Garzik (jgarzik@pobox.com)
*/ */
...@@ -57,8 +57,8 @@ ...@@ -57,8 +57,8 @@
#define DRV_MODULE_NAME "tg3" #define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": " #define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "1.7" #define DRV_MODULE_VERSION "1.8"
#define DRV_MODULE_RELDATE "July 23, 2003" #define DRV_MODULE_RELDATE "August 1, 2003"
#define TG3_DEF_MAC_MODE 0 #define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0 #define TG3_DEF_RX_MODE 0
...@@ -3103,6 +3103,7 @@ static void tg3_chip_reset(struct tg3 *tp) ...@@ -3103,6 +3103,7 @@ static void tg3_chip_reset(struct tg3 *tp)
u32 val; u32 val;
u32 flags_save; u32 flags_save;
if (!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
/* Force NVRAM to settle. /* Force NVRAM to settle.
* This deals with a chip bug which can result in EEPROM * This deals with a chip bug which can result in EEPROM
* corruption. * corruption.
...@@ -3117,6 +3118,7 @@ static void tg3_chip_reset(struct tg3 *tp) ...@@ -3117,6 +3118,7 @@ static void tg3_chip_reset(struct tg3 *tp)
udelay(10); udelay(10);
} }
} }
}
/* /*
* We must avoid the readl() that normally takes place. * We must avoid the readl() that normally takes place.
...@@ -3207,7 +3209,8 @@ static int tg3_halt(struct tg3 *tp) ...@@ -3207,7 +3209,8 @@ static int tg3_halt(struct tg3 *tp)
udelay(10); udelay(10);
} }
if (i >= 100000) { if (i >= 100000 &&
!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
printk(KERN_ERR PFX "tg3_halt timed out for %s, " printk(KERN_ERR PFX "tg3_halt timed out for %s, "
"firmware will not restart magic=%08x\n", "firmware will not restart magic=%08x\n",
tp->dev->name, val); tp->dev->name, val);
...@@ -3951,7 +3954,8 @@ static int tg3_reset_hw(struct tg3 *tp) ...@@ -3951,7 +3954,8 @@ static int tg3_reset_hw(struct tg3 *tp)
break; break;
udelay(10); udelay(10);
} }
if (i >= 100000) { if (i >= 100000 &&
!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
printk(KERN_ERR PFX "tg3_reset_hw timed out for %s, " printk(KERN_ERR PFX "tg3_reset_hw timed out for %s, "
"firmware will not restart magic=%08x\n", "firmware will not restart magic=%08x\n",
tp->dev->name, val); tp->dev->name, val);
...@@ -5569,6 +5573,9 @@ static void __devinit tg3_nvram_init(struct tg3 *tp) ...@@ -5569,6 +5573,9 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
{ {
int j; int j;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704)
return;
tw32(GRC_EEPROM_ADDR, tw32(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET | (EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD << (EEPROM_DEFAULT_CLOCK_PERIOD <<
...@@ -5641,6 +5648,11 @@ static int __devinit tg3_nvram_read(struct tg3 *tp, ...@@ -5641,6 +5648,11 @@ static int __devinit tg3_nvram_read(struct tg3 *tp,
{ {
int i, saw_done_clear; int i, saw_done_clear;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
printk(KERN_ERR PFX "Attempt to do nvram_read on Sun 5704\n");
return -EINVAL;
}
if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
return tg3_nvram_read_using_eeprom(tp, offset, val); return tg3_nvram_read_using_eeprom(tp, offset, val);
...@@ -5909,6 +5921,14 @@ static void __devinit tg3_read_partno(struct tg3 *tp) ...@@ -5909,6 +5921,14 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
unsigned char vpd_data[256]; unsigned char vpd_data[256];
int i; int i;
if (tp->tg3_flags2 & TG3_FLG2_SUN_5704) {
/* Sun decided not to put the necessary bits in the
* NVRAM of their onboard tg3 parts :(
*/
strcpy(tp->board_part_number, "Sun 5704");
return;
}
for (i = 0; i < 256; i += 4) { for (i = 0; i < 256; i += 4) {
u32 tmp; u32 tmp;
...@@ -5965,6 +5985,34 @@ static void __devinit tg3_read_partno(struct tg3 *tp) ...@@ -5965,6 +5985,34 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
strcpy(tp->board_part_number, "none"); strcpy(tp->board_part_number, "none");
} }
#ifdef CONFIG_SPARC64
static int __devinit tg3_is_sun_5704(struct tg3 *tp)
{
struct pci_dev *pdev = tp->pdev;
struct pcidev_cookie *pcp = pdev->sysdata;
if (pcp != NULL) {
int node = pcp->prom_node;
u32 venid, devid;
int err;
err = prom_getproperty(node, "subsystem-vendor-id",
(char *) &venid, sizeof(venid));
if (err == 0 || err == -1)
return 0;
err = prom_getproperty(node, "subsystem-id",
(char *) &devid, sizeof(devid));
if (err == 0 || err == -1)
return 0;
if (venid == PCI_VENDOR_ID_SUN &&
devid == PCI_DEVICE_ID_TIGON3_5704)
return 1;
}
return 0;
}
#endif
static int __devinit tg3_get_invariants(struct tg3 *tp) static int __devinit tg3_get_invariants(struct tg3 *tp)
{ {
u32 misc_ctrl_reg; u32 misc_ctrl_reg;
...@@ -5973,6 +6021,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) ...@@ -5973,6 +6021,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
u16 pci_cmd; u16 pci_cmd;
int err; int err;
#ifdef CONFIG_SPARC64
if (tg3_is_sun_5704(tp))
tp->tg3_flags2 |= TG3_FLG2_SUN_5704;
#endif
/* If we have an AMD 762 or Intel ICH/ICH0 chipset, write /* If we have an AMD 762 or Intel ICH/ICH0 chipset, write
* reordering to the mailbox registers done by the host * reordering to the mailbox registers done by the host
* controller can cause major troubles. We read back from * controller can cause major troubles. We read back from
...@@ -6337,7 +6390,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) ...@@ -6337,7 +6390,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
dev->dev_addr[5] = (lo >> 0) & 0xff; dev->dev_addr[5] = (lo >> 0) & 0xff;
} }
/* Next, try NVRAM. */ /* Next, try NVRAM. */
else if (!tg3_nvram_read(tp, mac_offset + 0, &hi) && else if (!(tp->tg3_flags & TG3_FLG2_SUN_5704) &&
!tg3_nvram_read(tp, mac_offset + 0, &hi) &&
!tg3_nvram_read(tp, mac_offset + 4, &lo)) { !tg3_nvram_read(tp, mac_offset + 4, &lo)) {
dev->dev_addr[0] = ((hi >> 16) & 0xff); dev->dev_addr[0] = ((hi >> 16) & 0xff);
dev->dev_addr[1] = ((hi >> 24) & 0xff); dev->dev_addr[1] = ((hi >> 24) & 0xff);
......
...@@ -1823,6 +1823,7 @@ struct tg3 { ...@@ -1823,6 +1823,7 @@ struct tg3 {
#define TG3_FLAG_INIT_COMPLETE 0x80000000 #define TG3_FLAG_INIT_COMPLETE 0x80000000
u32 tg3_flags2; u32 tg3_flags2;
#define TG3_FLG2_RESTART_TIMER 0x00000001 #define TG3_FLG2_RESTART_TIMER 0x00000001
#define TG3_FLG2_SUN_5704 0x00000002
u32 split_mode_max_reqs; u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3 #define SPLIT_MODE_5704_MAX_REQ 3
......
...@@ -158,6 +158,7 @@ struct pci_pbm_info { ...@@ -158,6 +158,7 @@ struct pci_pbm_info {
struct linux_prom_pci_intmap pbm_intmap[PROM_PCIIMAP_MAX]; struct linux_prom_pci_intmap pbm_intmap[PROM_PCIIMAP_MAX];
int num_pbm_intmap; int num_pbm_intmap;
struct linux_prom_pci_intmask pbm_intmask; struct linux_prom_pci_intmask pbm_intmask;
u64 ino_bitmap;
/* PBM I/O and Memory space resources. */ /* PBM I/O and Memory space resources. */
struct resource io_space; struct resource io_space;
......
...@@ -27,11 +27,11 @@ extern unsigned long loops_per_jiffy; ...@@ -27,11 +27,11 @@ extern unsigned long loops_per_jiffy;
#ifdef notdef #ifdef notdef
#define mdelay(n) (\ #define mdelay(n) (\
{unsigned long msec=(n); while (msec--) udelay(1000);}) {unsigned long __ms=(n); while (__ms--) udelay(1000);})
#else #else
#define mdelay(n) (\ #define mdelay(n) (\
(__builtin_constant_p(n) && (n)<=MAX_UDELAY_MS) ? udelay((n)*1000) : \ (__builtin_constant_p(n) && (n)<=MAX_UDELAY_MS) ? udelay((n)*1000) : \
({unsigned long msec=(n); while (msec--) udelay(1000);})) ({unsigned long __ms=(n); while (__ms--) udelay(1000);}))
#endif #endif
#ifndef ndelay #ifndef ndelay
......
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