Commit 28bf41a1 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt

Merge remote-tracking branch 'agust/next' into next

From Anatolij Gustschin:
<<
There are some changes for mpc5121 generic platform code
to support mpc5125 SoC and DTS files for ac14xx and
MPC5125-TWR boards.
>>
parents fba2369e fdeaf0e2
/*
* Device Tree Source for the MPC5121e based ac14xx board
*
* Copyright 2012 Anatolij Gustschin <agust@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "mpc5121.dtsi"
/ {
model = "ac14xx";
compatible = "ifm,ac14xx", "fsl,mpc5121";
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &serial0;
serial1 = &serial7;
spi4 = &spi4;
spi5 = &spi5;
};
cpus {
PowerPC,5121@0 {
timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
bus-frequency = <160000000>; /* 160 MHz csb bus */
clock-frequency = <400000000>; /* 400 MHz ppc core */
};
};
memory {
reg = <0x00000000 0x10000000>; /* 256MB at 0 */
};
nfc@40000000 {
status = "disabled";
};
localbus@80000020 {
ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
device-width = <2>;
partition@0 {
label = "dtb-kernel-production";
reg = <0x00000000 0x00400000>;
};
partition@1 {
label = "filesystem-production";
reg = <0x00400000 0x03400000>;
};
partition@2 {
label = "recovery";
reg = <0x03800000 0x00700000>;
};
partition@3 {
label = "uboot-code";
reg = <0x03f00000 0x00040000>;
};
partition@4 {
label = "uboot-env1";
reg = <0x03f40000 0x00020000>;
};
partition@5 {
label = "uboot-env2";
reg = <0x03f60000 0x00020000>;
};
};
fram@1,0 {
compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
reg = <1 0x00000000 0x00010000>;
};
asi@2,0 {
/* masters mapping: CS, CS offset, size */
reg = <2 0x00000000 0x00080000
6 0x00000000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "ifm,ac14xx-asi-fpga";
gpios = <
&gpio_pic 26 0 /* prog */
&gpio_pic 27 0 /* done */
&gpio_pic 10 0 /* reset */
>;
master@1 {
interrupts = <20 0x2>;
interrupt-parent = <&gpio_pic>;
chipselect = <2 0x00009000 0x00009100>;
label = "AS-i master 1";
};
master@2 {
interrupts = <21 0x2>;
interrupt-parent = <&gpio_pic>;
chipselect = <6 0x00009000 0x00009100>;
label = "AS-i master 2";
};
};
netx@3,0 {
compatible = "ifm,netx";
reg = <0x3 0x00000000 0x00020000>;
chipselect = <3 0x00101140 0x00203100>;
interrupts = <17 0x8>;
gpios = <&gpio_pic 15 0>;
};
safety@5,0 {
compatible = "ifm,safety";
reg = <0x5 0x00000000 0x00010000>;
chipselect = <5 0x00009000 0x00009100>;
interrupts = <22 0x2>;
interrupt-parent = <&gpio_pic>;
gpios = <
&gpio_pic 12 0 /* prog */
&gpio_pic 11 0 /* done */
>;
};
};
soc@80000000 {
clock@f00 {
compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
};
/*
* GPIO PIC:
* interrupts cell = <pin nr, sense>
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
gpio_pic: gpio@1100 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sdhc@1500 {
cd-gpios = <&gpio_pic 23 0>; /* card detect */
wp-gpios = <&gpio_pic 24 0>; /* write protect */
wp-inverted; /* WP active high */
};
i2c@1700 {
/* use Fast-mode */
clock-frequency = <400000>;
at24@30 {
compatible = "at24,24c01";
reg = <0x30>;
};
at24@31 {
compatible = "at24,24c01";
reg = <0x31>;
};
temp@48 {
compatible = "ad,ad7414";
reg = <0x48>;
};
at24@50 {
compatible = "at24,24c01";
reg = <0x50>;
};
at24@51 {
compatible = "at24,24c01";
reg = <0x51>;
};
at24@52 {
compatible = "at24,24c01";
reg = <0x52>;
};
at24@53 {
compatible = "at24,24c01";
reg = <0x53>;
};
at24@54 {
compatible = "at24,24c01";
reg = <0x54>;
};
at24@55 {
compatible = "at24,24c01";
reg = <0x55>;
};
at24@56 {
compatible = "at24,24c01";
reg = <0x56>;
};
at24@57 {
compatible = "at24,24c01";
reg = <0x57>;
};
rtc@68 {
compatible = "stm,m41t00";
reg = <0x68>;
};
};
axe_pic: axe-base@2000 {
compatible = "fsl,mpc5121-axe-base";
reg = <0x2000 0x100>;
interrupts = <42 0x8>;
interrupt-controller;
#interrupt-cells = <2>;
};
axe-app {
compatible = "fsl,mpc5121-axe-app";
interrupt-parent = <&axe_pic>;
interrupts = <
/* soft interrupts */
0 0x0 1 0x0 2 0x0 3 0x0
4 0x0 5 0x0 6 0x0 7 0x0
/* fifo interrupts */
8 0x0 9 0x0 10 0x0 11 0x0
>;
};
display@2100 {
edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
};
can@2300 {
status = "disabled";
};
can@2380 {
status = "disabled";
};
viu@2400 {
status = "disabled";
};
mdio@2800 {
phy0: ethernet-phy@1f {
compatible = "smsc,lan8700";
reg = <0x1f>;
};
};
enet: ethernet@2800 {
phy-handle = <&phy0>;
};
usb@3000 {
status = "disabled";
};
usb@4000 {
status = "disabled";
};
/* PSC3 serial port A, aka ttyPSC0 */
serial0: psc@11300 {
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <512>;
fsl,tx-fifo-size = <512>;
};
/* PSC4 in SPI mode */
spi4: psc@11400 {
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <768>;
fsl,tx-fifo-size = <768>;
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
cs-gpios = <&gpio_pic 25 0>;
flash: m25p128@0 {
compatible = "st,m25p128";
spi-max-frequency = <20000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "spi-flash0";
reg = <0x00000000 0x01000000>;
};
};
};
/* PSC5 in SPI mode */
spi5: psc@11500 {
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
fsl,mode = "spi-master";
fsl,rx-fifo-size = <128>;
fsl,tx-fifo-size = <128>;
#address-cells = <1>;
#size-cells = <0>;
lcd@0 {
compatible = "ilitek,ili922x";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
};
};
/* PSC7 serial port C, aka ttyPSC2 */
serial7: psc@11700 {
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <512>;
fsl,tx-fifo-size = <512>;
};
matrix_keypad@0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <1>;
gpio-activelow;
col-gpios-binary;
col-switch-delay-ms = <200>;
col-gpios = <&gpio_pic 1 0>; /* pin1 */
row-gpios = <&gpio_pic 2 0 /* pin2 */
&gpio_pic 3 0 /* pin3 */
&gpio_pic 4 0>; /* pin4 */
linux,keymap = <0x0000006e /* FN LEFT */
0x01000067 /* UP */
0x02000066 /* FN RIGHT */
0x00010069 /* LEFT */
0x0101006a /* DOWN */
0x0201006c>; /* RIGHT */
};
};
leds {
compatible = "gpio-leds";
backlight {
label = "backlight";
gpios = <&gpio_pic 0 0>;
default-state = "keep";
};
green {
label = "green";
gpios = <&gpio_pic 18 0>;
default-state = "keep";
};
red {
label = "red";
gpios = <&gpio_pic 19 0>;
default-state = "keep";
};
};
};
...@@ -384,7 +384,7 @@ pscfifo@11f00 { ...@@ -384,7 +384,7 @@ pscfifo@11f00 {
interrupts = <40 0x8>; interrupts = <40 0x8>;
}; };
dma@14000 { dma0: dma@14000 {
compatible = "fsl,mpc5121-dma"; compatible = "fsl,mpc5121-dma";
reg = <0x14000 0x1800>; reg = <0x14000 0x1800>;
interrupts = <65 0x8>; interrupts = <65 0x8>;
......
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
/ { / {
model = "mpc5121ads"; model = "mpc5121ads";
compatible = "fsl,mpc5121ads"; compatible = "fsl,mpc5121ads", "fsl,mpc5121";
nfc@40000000 { nfc@40000000 {
/* /*
......
/*
* STx/Freescale ADS5125 MPC5125 silicon
*
* Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
*
* Reworked by Matteo Facchinetti (engineering@sirius-es.it)
* Copyright (C) 2013 Sirius Electronic Systems
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "mpc5125twr"; // In BSP "mpc5125ads"
compatible = "fsl,mpc5125ads", "fsl,mpc5125";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&ipic>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
ethernet0 = &eth0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5125@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>; // 32 bytes
i-cache-line-size = <0x20>; // 32 bytes
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
bus-frequency = <198000000>; // 198 MHz csb bus
clock-frequency = <396000000>; // 396 MHz ppc core
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; // 256MB at 0
};
sram@30000000 {
compatible = "fsl,mpc5121-sram";
reg = <0x30000000 0x08000>; // 32K at 0x30000000
};
soc@80000000 {
compatible = "fsl,mpc5121-immr";
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
ranges = <0x0 0x80000000 0x400000>;
reg = <0x80000000 0x400000>;
bus-frequency = <66000000>; // 66 MHz ips bus
// IPIC
// interrupts cell = <intr #, sense>
// sense values match linux IORESOURCE_IRQ_* defines:
// sense == 8: Level, low assertion
// sense == 2: Edge, high-to-low change
//
ipic: interrupt-controller@c00 {
compatible = "fsl,mpc5121-ipic", "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0xc00 0x100>;
};
rtc@a00 { // Real time clock
compatible = "fsl,mpc5121-rtc";
reg = <0xa00 0x100>;
interrupts = <79 0x8 80 0x8>;
};
reset@e00 { // Reset module
compatible = "fsl,mpc5125-reset";
reg = <0xe00 0x100>;
};
clock@f00 { // Clock control
compatible = "fsl,mpc5121-clock";
reg = <0xf00 0x100>;
};
pmc@1000{ // Power Management Controller
compatible = "fsl,mpc5121-pmc";
reg = <0x1000 0x100>;
interrupts = <83 0x2>;
};
gpio0: gpio@1100 {
compatible = "fsl,mpc5125-gpio";
reg = <0x1100 0x080>;
interrupts = <78 0x8>;
};
gpio1: gpio@1180 {
compatible = "fsl,mpc5125-gpio";
reg = <0x1180 0x080>;
interrupts = <86 0x8>;
};
can@1300 { // CAN rev.2
compatible = "fsl,mpc5121-mscan";
interrupts = <12 0x8>;
reg = <0x1300 0x80>;
};
can@1380 {
compatible = "fsl,mpc5121-mscan";
interrupts = <13 0x8>;
reg = <0x1380 0x80>;
};
sdhc@1500 {
compatible = "fsl,mpc5121-sdhc";
interrupts = <8 0x8>;
reg = <0x1500 0x100>;
};
i2c@1700 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1700 0x20>;
interrupts = <0x9 0x8>;
};
i2c@1720 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1720 0x20>;
interrupts = <0xa 0x8>;
};
i2c@1740 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1740 0x20>;
interrupts = <0xb 0x8>;
};
i2ccontrol@1760 {
compatible = "fsl,mpc5121-i2c-ctrl";
reg = <0x1760 0x8>;
};
diu@2100 {
compatible = "fsl,mpc5121-diu";
reg = <0x2100 0x100>;
interrupts = <64 0x8>;
};
mdio@2800 {
compatible = "fsl,mpc5121-fec-mdio";
reg = <0x2800 0x800>;
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <1>;
};
};
eth0: ethernet@2800 {
compatible = "fsl,mpc5125-fec";
reg = <0x2800 0x800>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <4 0x8>;
phy-handle = < &phy0 >;
phy-connection-type = "rmii";
};
// IO control
ioctl@a000 {
compatible = "fsl,mpc5125-ioctl";
reg = <0xA000 0x1000>;
};
usb@3000 {
compatible = "fsl,mpc5121-usb2-dr";
reg = <0x3000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <43 0x8>;
dr_mode = "host";
phy_type = "ulpi";
};
// 5125 PSCs are not 52xx or 5121 PSC compatible
// PSC1 uart0 aka ttyPSC0
serial@11100 {
compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
reg = <0x11100 0x100>;
interrupts = <40 0x8>;
fsl,rx-fifo-size = <16>;
fsl,tx-fifo-size = <16>;
};
// PSC9 uart1 aka ttyPSC1
serial@11900 {
compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
reg = <0x11900 0x100>;
interrupts = <40 0x8>;
fsl,rx-fifo-size = <16>;
fsl,tx-fifo-size = <16>;
};
pscfifo@11f00 {
compatible = "fsl,mpc5121-psc-fifo";
reg = <0x11f00 0x100>;
interrupts = <40 0x8>;
};
dma@14000 {
compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
reg = <0x14000 0x1800>;
interrupts = <65 0x8>;
};
};
};
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
/ { / {
model = "pdm360ng"; model = "pdm360ng";
compatible = "ifm,pdm360ng"; compatible = "ifm,pdm360ng", "fsl,mpc5121";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
interrupt-parent = <&ipic>; interrupt-parent = <&ipic>;
......
...@@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y ...@@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_PPC_CHRP is not set # CONFIG_PPC_CHRP is not set
CONFIG_PPC_MPC512x=y CONFIG_PPC_MPC512x=y
CONFIG_MPC5121_ADS=y CONFIG_MPC5121_ADS=y
CONFIG_MPC5121_GENERIC=y CONFIG_MPC512x_GENERIC=y
CONFIG_PDM360NG=y CONFIG_PDM360NG=y
# CONFIG_PPC_PMAC is not set # CONFIG_PPC_PMAC is not set
CONFIG_NO_HZ=y CONFIG_NO_HZ=y
......
...@@ -15,16 +15,16 @@ config MPC5121_ADS ...@@ -15,16 +15,16 @@ config MPC5121_ADS
help help
This option enables support for the MPC5121E ADS board. This option enables support for the MPC5121E ADS board.
config MPC5121_GENERIC config MPC512x_GENERIC
bool "Generic support for simple MPC5121 based boards" bool "Generic support for simple MPC512x based boards"
depends on PPC_MPC512x depends on PPC_MPC512x
select DEFAULT_UIMAGE select DEFAULT_UIMAGE
help help
This option enables support for simple MPC5121 based boards This option enables support for simple MPC512x based boards
which do not need custom platform specific setup. which do not need custom platform specific setup.
Compatible boards include: Protonic LVT base boards (ZANMCU Compatible boards include: Protonic LVT base boards (ZANMCU
and VICVT2). and VICVT2), Freescale MPC5125 Tower system.
config PDM360NG config PDM360NG
bool "ifm PDM360NG board" bool "ifm PDM360NG board"
......
...@@ -3,5 +3,5 @@ ...@@ -3,5 +3,5 @@
# #
obj-y += clock.o mpc512x_shared.o obj-y += clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
obj-$(CONFIG_PDM360NG) += pdm360ng.o obj-$(CONFIG_PDM360NG) += pdm360ng.o
...@@ -29,6 +29,8 @@ ...@@ -29,6 +29,8 @@
#include <asm/mpc5121.h> #include <asm/mpc5121.h>
#include <asm/clk_interface.h> #include <asm/clk_interface.h>
#include "mpc512x.h"
#undef CLK_DEBUG #undef CLK_DEBUG
static int clocks_initialized; static int clocks_initialized;
...@@ -683,8 +685,13 @@ static void psc_clks_init(void) ...@@ -683,8 +685,13 @@ static void psc_clks_init(void)
struct device_node *np; struct device_node *np;
struct platform_device *ofdev; struct platform_device *ofdev;
u32 reg; u32 reg;
const char *psc_compat;
psc_compat = mpc512x_select_psc_compat();
if (!psc_compat)
return;
for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { for_each_compatible_node(np, NULL, psc_compat) {
if (!of_property_read_u32(np, "reg", &reg)) { if (!of_property_read_u32(np, "reg", &reg)) {
int pscnum = (reg & 0xf00) >> 8; int pscnum = (reg & 0xf00) >> 8;
struct clk *clk = psc_dev_clk(pscnum); struct clk *clk = psc_dev_clk(pscnum);
......
...@@ -15,6 +15,7 @@ extern void __init mpc512x_init_IRQ(void); ...@@ -15,6 +15,7 @@ extern void __init mpc512x_init_IRQ(void);
extern void __init mpc512x_init(void); extern void __init mpc512x_init(void);
extern int __init mpc5121_clk_init(void); extern int __init mpc5121_clk_init(void);
void __init mpc512x_declare_of_platform_devices(void); void __init mpc512x_declare_of_platform_devices(void);
extern const char *mpc512x_select_psc_compat(void);
extern void mpc512x_restart(char *cmd); extern void mpc512x_restart(char *cmd);
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: John Rigby, <jrigby@freescale.com> * Author: John Rigby, <jrigby@freescale.com>
* *
* Description: * Description:
* MPC5121 SoC setup * MPC512x SoC setup
* *
* This is free software; you can redistribute it and/or modify it * This is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by * under the terms of the GNU General Public License as published by
...@@ -28,20 +28,22 @@ ...@@ -28,20 +28,22 @@
*/ */
static const char * const board[] __initconst = { static const char * const board[] __initconst = {
"prt,prtlvt", "prt,prtlvt",
"fsl,mpc5125ads",
"ifm,ac14xx",
NULL NULL
}; };
/* /*
* Called very early, MMU is off, device-tree isn't unflattened * Called very early, MMU is off, device-tree isn't unflattened
*/ */
static int __init mpc5121_generic_probe(void) static int __init mpc512x_generic_probe(void)
{ {
return of_flat_dt_match(of_get_flat_dt_root(), board); return of_flat_dt_match(of_get_flat_dt_root(), board);
} }
define_machine(mpc5121_generic) { define_machine(mpc512x_generic) {
.name = "MPC5121 generic", .name = "MPC512x generic",
.probe = mpc5121_generic_probe, .probe = mpc512x_generic_probe,
.init = mpc512x_init, .init = mpc512x_init,
.init_early = mpc512x_init_diu, .init_early = mpc512x_init_diu,
.setup_arch = mpc512x_setup_diu, .setup_arch = mpc512x_setup_diu,
......
...@@ -330,26 +330,34 @@ void __init mpc512x_init_IRQ(void) ...@@ -330,26 +330,34 @@ void __init mpc512x_init_IRQ(void)
static struct of_device_id __initdata of_bus_ids[] = { static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = "fsl,mpc5121-immr", }, { .compatible = "fsl,mpc5121-immr", },
{ .compatible = "fsl,mpc5121-localbus", }, { .compatible = "fsl,mpc5121-localbus", },
{ .compatible = "fsl,mpc5121-mbx", },
{ .compatible = "fsl,mpc5121-nfc", },
{ .compatible = "fsl,mpc5121-sram", },
{ .compatible = "fsl,mpc5121-pci", },
{ .compatible = "gpio-leds", },
{}, {},
}; };
void __init mpc512x_declare_of_platform_devices(void) void __init mpc512x_declare_of_platform_devices(void)
{ {
struct device_node *np;
if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
printk(KERN_ERR __FILE__ ": " printk(KERN_ERR __FILE__ ": "
"Error while probing of_platform bus\n"); "Error while probing of_platform bus\n");
np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
if (np) {
of_platform_device_create(np, NULL, NULL);
of_node_put(np);
}
} }
#define DEFAULT_FIFO_SIZE 16 #define DEFAULT_FIFO_SIZE 16
const char *mpc512x_select_psc_compat(void)
{
if (of_machine_is_compatible("fsl,mpc5121"))
return "fsl,mpc5121-psc";
if (of_machine_is_compatible("fsl,mpc5125"))
return "fsl,mpc5125-psc";
return NULL;
}
static unsigned int __init get_fifo_size(struct device_node *np, static unsigned int __init get_fifo_size(struct device_node *np,
char *prop_name) char *prop_name)
{ {
...@@ -375,9 +383,16 @@ void __init mpc512x_psc_fifo_init(void) ...@@ -375,9 +383,16 @@ void __init mpc512x_psc_fifo_init(void)
void __iomem *psc; void __iomem *psc;
unsigned int tx_fifo_size; unsigned int tx_fifo_size;
unsigned int rx_fifo_size; unsigned int rx_fifo_size;
const char *psc_compat;
int fifobase = 0; /* current fifo address in 32 bit words */ int fifobase = 0; /* current fifo address in 32 bit words */
for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { psc_compat = mpc512x_select_psc_compat();
if (!psc_compat) {
pr_err("%s: no compatible devices found\n", __func__);
return;
}
for_each_compatible_node(np, NULL, psc_compat) {
tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size"); tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size"); rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
......
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