Commit 2a3d6553 authored by Michael Ellerman's avatar Michael Ellerman

KVM: PPC: Tie KVM_CAP_PPC_HTM to the user-visible TM feature

Currently we use CPU_FTR_TM to decide if the CPU/kernel can support
TM (Transactional Memory), and if it's true we advertise that to
Qemu (or similar) via KVM_CAP_PPC_HTM.

PPC_FEATURE2_HTM is the user-visible feature bit, which indicates that
the CPU and kernel can support TM. Currently CPU_FTR_TM and
PPC_FEATURE2_HTM always have the same value, either true or false, so
using the former for KVM_CAP_PPC_HTM is correct.

However some Power9 CPUs can operate in a mode where TM is enabled but
TM suspended state is disabled. In this mode CPU_FTR_TM is true, but
PPC_FEATURE2_HTM is false. Instead a different PPC_FEATURE2 bit is
set, to indicate that this different mode of TM is available.

It is not safe to let guests use TM as-is, when the CPU is in this
mode. So to prevent that from happening, use PPC_FEATURE2_HTM to
determine the value of KVM_CAP_PPC_HTM.
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 31a4d448
...@@ -644,8 +644,8 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) ...@@ -644,8 +644,8 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
break; break;
#endif #endif
case KVM_CAP_PPC_HTM: case KVM_CAP_PPC_HTM:
r = cpu_has_feature(CPU_FTR_TM_COMP) && r = is_kvmppc_hv_enabled(kvm) &&
is_kvmppc_hv_enabled(kvm); (cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM_COMP);
break; break;
default: default:
r = 0; r = 0;
......
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