Skip to content

L
linux
Commit 2b7ad277 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files
Options

drm/amd/powerplay: check whether SMU IP is enabled before access 

Since on early phase of bringup, the SMU IP may be not enabled or
supported. Without this, we may hit null pointer dereference on
accessing smu->adev.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Tested-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1aad7078
Show whitespace changes
Inline Side-by-side
Showing with 113 additions and 153 deletions
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
View file @ 2b7ad277
...@@ -61,7 +61,6 @@ const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask ...@@ -61,7 +61,6 @@ const char *smu_get_feature_name(struct smu_context *smu, enum smu_feature_mask
size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)
{ {
struct amdgpu_device *adev = smu->adev;
size_t size = 0; size_t size = 0;
int ret = 0, i = 0; int ret = 0, i = 0;
uint32_t feature_mask[2] = { 0 }; uint32_t feature_mask[2] = { 0 };
...@@ -70,8 +69,8 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf) ...@@ -70,8 +69,8 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)
uint32_t sort_feature[SMU_FEATURE_COUNT]; uint32_t sort_feature[SMU_FEATURE_COUNT];
uint64_t hw_feature_count = 0; uint64_t hw_feature_count = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -155,10 +154,9 @@ int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask) ...@@ -155,10 +154,9 @@ int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask)
uint64_t feature_2_enabled = 0; uint64_t feature_2_enabled = 0;
uint64_t feature_2_disabled = 0; uint64_t feature_2_disabled = 0;
uint64_t feature_enables = 0; uint64_t feature_enables = 0;
struct amdgpu_device *adev = smu->adev;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -436,11 +434,10 @@ bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) ...@@ -436,11 +434,10 @@ bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type)
int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
bool gate) bool gate)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
switch (block_type) { switch (block_type) {
case AMD_IP_BLOCK_TYPE_UVD: case AMD_IP_BLOCK_TYPE_UVD:
...@@ -577,11 +574,10 @@ bool is_support_sw_smu(struct amdgpu_device *adev) ...@@ -577,11 +574,10 @@ bool is_support_sw_smu(struct amdgpu_device *adev)
int smu_sys_get_pp_table(struct smu_context *smu, void **table) int smu_sys_get_pp_table(struct smu_context *smu, void **table)
{ {
struct smu_table_context *smu_table = &smu->smu_table; struct smu_table_context *smu_table = &smu->smu_table;
struct amdgpu_device *adev = smu->adev;
uint32_t powerplay_table_size; uint32_t powerplay_table_size;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!smu_table->power_play_table && !smu_table->hardcode_pptable) if (!smu_table->power_play_table && !smu_table->hardcode_pptable)
return -EINVAL; return -EINVAL;
...@@ -603,12 +599,11 @@ int smu_sys_get_pp_table(struct smu_context *smu, void **table) ...@@ -603,12 +599,11 @@ int smu_sys_get_pp_table(struct smu_context *smu, void **table)
int smu_sys_set_pp_table(struct smu_context *smu, void *buf, size_t size) int smu_sys_set_pp_table(struct smu_context *smu, void *buf, size_t size)
{ {
struct smu_table_context *smu_table = &smu->smu_table; struct smu_table_context *smu_table = &smu->smu_table;
struct amdgpu_device *adev = smu->adev;
ATOM_COMMON_TABLE_HEADER *header = (ATOM_COMMON_TABLE_HEADER *)buf; ATOM_COMMON_TABLE_HEADER *header = (ATOM_COMMON_TABLE_HEADER *)buf;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (header->usStructureSize != size) { if (header->usStructureSize != size) {
pr_err("pp table size not matched !\n"); pr_err("pp table size not matched !\n");
...@@ -1622,15 +1617,11 @@ static int smu_resume(void *handle) ...@@ -1622,15 +1617,11 @@ static int smu_resume(void *handle)
int smu_display_configuration_change(struct smu_context *smu, int smu_display_configuration_change(struct smu_context *smu,
const struct amd_pp_display_configuration *display_config) const struct amd_pp_display_configuration *display_config)
{ {
struct amdgpu_device *adev = smu->adev;
int index = 0; int index = 0;
int num_of_active_display = 0; int num_of_active_display = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!is_support_sw_smu(smu->adev))
return -EINVAL;
if (!display_config) if (!display_config)
return -EINVAL; return -EINVAL;
...@@ -1691,15 +1682,11 @@ int smu_get_current_clocks(struct smu_context *smu, ...@@ -1691,15 +1682,11 @@ int smu_get_current_clocks(struct smu_context *smu,
struct amd_pp_clock_info *clocks) struct amd_pp_clock_info *clocks)
{ {
struct amd_pp_simple_clock_info simple_clocks = {0}; struct amd_pp_simple_clock_info simple_clocks = {0};
struct amdgpu_device *adev = smu->adev;
struct smu_clock_info hw_clocks; struct smu_clock_info hw_clocks;
int ret = 0; int ret = 0;
if (!is_support_sw_smu(smu->adev)) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!adev->pm.dpm_enabled)
return -EINVAL;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -1855,11 +1842,10 @@ int smu_handle_task(struct smu_context *smu, ...@@ -1855,11 +1842,10 @@ int smu_handle_task(struct smu_context *smu,
enum amd_pp_task task_id, enum amd_pp_task task_id,
bool lock_needed) bool lock_needed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (lock_needed) if (lock_needed)
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -1894,12 +1880,11 @@ int smu_switch_power_profile(struct smu_context *smu, ...@@ -1894,12 +1880,11 @@ int smu_switch_power_profile(struct smu_context *smu,
bool en) bool en)
{ {
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
struct amdgpu_device *adev = smu->adev;
long workload; long workload;
uint32_t index; uint32_t index;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!(type < PP_SMC_POWER_PROFILE_CUSTOM)) if (!(type < PP_SMC_POWER_PROFILE_CUSTOM))
return -EINVAL; return -EINVAL;
...@@ -1929,11 +1914,10 @@ int smu_switch_power_profile(struct smu_context *smu, ...@@ -1929,11 +1914,10 @@ int smu_switch_power_profile(struct smu_context *smu,
enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu)
{ {
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
struct amdgpu_device *adev = smu->adev;
enum amd_dpm_forced_level level; enum amd_dpm_forced_level level;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!smu->is_apu && !smu_dpm_ctx->dpm_context) if (!smu->is_apu && !smu_dpm_ctx->dpm_context)
return -EINVAL; return -EINVAL;
...@@ -1948,11 +1932,10 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) ...@@ -1948,11 +1932,10 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu)
int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level)
{ {
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!smu->is_apu && !smu_dpm_ctx->dpm_context) if (!smu->is_apu && !smu_dpm_ctx->dpm_context)
return -EINVAL; return -EINVAL;
...@@ -1976,11 +1959,10 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev ...@@ -1976,11 +1959,10 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev
int smu_set_display_count(struct smu_context *smu, uint32_t count) int smu_set_display_count(struct smu_context *smu, uint32_t count)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
ret = smu_init_display_count(smu, count); ret = smu_init_display_count(smu, count);
...@@ -1995,11 +1977,10 @@ int smu_force_clk_levels(struct smu_context *smu, ...@@ -1995,11 +1977,10 @@ int smu_force_clk_levels(struct smu_context *smu,
bool lock_needed) bool lock_needed)
{ {
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) {
pr_debug("force clock level is for dpm manual mode only.\n"); pr_debug("force clock level is for dpm manual mode only.\n");
...@@ -2031,6 +2012,9 @@ int smu_set_mp1_state(struct smu_context *smu, ...@@ -2031,6 +2012,9 @@ int smu_set_mp1_state(struct smu_context *smu,
uint16_t msg; uint16_t msg;
int ret; int ret;
if (!smu->pm_enabled)
return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
switch (mp1_state) { switch (mp1_state) {
...@@ -2067,11 +2051,10 @@ int smu_set_mp1_state(struct smu_context *smu, ...@@ -2067,11 +2051,10 @@ int smu_set_mp1_state(struct smu_context *smu,
int smu_set_df_cstate(struct smu_context *smu, int smu_set_df_cstate(struct smu_context *smu,
enum pp_df_cstate state) enum pp_df_cstate state)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!smu->ppt_funcs || !smu->ppt_funcs->set_df_cstate) if (!smu->ppt_funcs || !smu->ppt_funcs->set_df_cstate)
return 0; return 0;
...@@ -2089,11 +2072,10 @@ int smu_set_df_cstate(struct smu_context *smu, ...@@ -2089,11 +2072,10 @@ int smu_set_df_cstate(struct smu_context *smu,
int smu_allow_xgmi_power_down(struct smu_context *smu, bool en) int smu_allow_xgmi_power_down(struct smu_context *smu, bool en)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!smu->ppt_funcs || !smu->ppt_funcs->allow_xgmi_power_down) if (!smu->ppt_funcs || !smu->ppt_funcs->allow_xgmi_power_down)
return 0; return 0;
...@@ -2127,10 +2109,9 @@ int smu_set_watermarks_for_clock_ranges(struct smu_context *smu, ...@@ -2127,10 +2109,9 @@ int smu_set_watermarks_for_clock_ranges(struct smu_context *smu,
struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges) struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges)
{ {
void *table = smu->smu_table.watermarks_table; void *table = smu->smu_table.watermarks_table;
struct amdgpu_device *adev = smu->adev;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (!table) if (!table)
return -EINVAL; return -EINVAL;
...@@ -2155,11 +2136,10 @@ int smu_set_watermarks_for_clock_ranges(struct smu_context *smu, ...@@ -2155,11 +2136,10 @@ int smu_set_watermarks_for_clock_ranges(struct smu_context *smu,
int smu_set_ac_dc(struct smu_context *smu) int smu_set_ac_dc(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
/* controlled by firmware */ /* controlled by firmware */
if (smu->dc_controlled_by_gpio) if (smu->dc_controlled_by_gpio)
...@@ -2219,11 +2199,10 @@ const struct amdgpu_ip_block_version smu_v12_0_ip_block = ...@@ -2219,11 +2199,10 @@ const struct amdgpu_ip_block_version smu_v12_0_ip_block =
int smu_load_microcode(struct smu_context *smu) int smu_load_microcode(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2237,11 +2216,10 @@ int smu_load_microcode(struct smu_context *smu) ...@@ -2237,11 +2216,10 @@ int smu_load_microcode(struct smu_context *smu)
int smu_check_fw_status(struct smu_context *smu) int smu_check_fw_status(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2269,11 +2247,10 @@ int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled) ...@@ -2269,11 +2247,10 @@ int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled)
int smu_set_fan_speed_rpm(struct smu_context *smu, uint32_t speed) int smu_set_fan_speed_rpm(struct smu_context *smu, uint32_t speed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2290,12 +2267,11 @@ int smu_get_power_limit(struct smu_context *smu, ...@@ -2290,12 +2267,11 @@ int smu_get_power_limit(struct smu_context *smu,
bool def, bool def,
bool lock_needed) bool lock_needed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (lock_needed) { if (lock_needed) {
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
} }
...@@ -2311,11 +2287,10 @@ int smu_get_power_limit(struct smu_context *smu, ...@@ -2311,11 +2287,10 @@ int smu_get_power_limit(struct smu_context *smu,
int smu_set_power_limit(struct smu_context *smu, uint32_t limit) int smu_set_power_limit(struct smu_context *smu, uint32_t limit)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2329,11 +2304,10 @@ int smu_set_power_limit(struct smu_context *smu, uint32_t limit) ...@@ -2329,11 +2304,10 @@ int smu_set_power_limit(struct smu_context *smu, uint32_t limit)
int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2347,11 +2321,10 @@ int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, ch ...@@ -2347,11 +2321,10 @@ int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, ch
int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type) int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2365,11 +2338,10 @@ int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type) ...@@ -2365,11 +2338,10 @@ int smu_get_od_percentage(struct smu_context *smu, enum smu_clk_type type)
int smu_set_od_percentage(struct smu_context *smu, enum smu_clk_type type, uint32_t value) int smu_set_od_percentage(struct smu_context *smu, enum smu_clk_type type, uint32_t value)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2385,11 +2357,10 @@ int smu_od_edit_dpm_table(struct smu_context *smu, ...@@ -2385,11 +2357,10 @@ int smu_od_edit_dpm_table(struct smu_context *smu,
enum PP_OD_DPM_TABLE_COMMAND type, enum PP_OD_DPM_TABLE_COMMAND type,
long *input, uint32_t size) long *input, uint32_t size)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2405,11 +2376,10 @@ int smu_read_sensor(struct smu_context *smu, ...@@ -2405,11 +2376,10 @@ int smu_read_sensor(struct smu_context *smu,
enum amd_pp_sensors sensor, enum amd_pp_sensors sensor,
void *data, uint32_t *size) void *data, uint32_t *size)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2423,11 +2393,10 @@ int smu_read_sensor(struct smu_context *smu, ...@@ -2423,11 +2393,10 @@ int smu_read_sensor(struct smu_context *smu,
int smu_get_power_profile_mode(struct smu_context *smu, char *buf) int smu_get_power_profile_mode(struct smu_context *smu, char *buf)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2444,11 +2413,10 @@ int smu_set_power_profile_mode(struct smu_context *smu, ...@@ -2444,11 +2413,10 @@ int smu_set_power_profile_mode(struct smu_context *smu,
uint32_t param_size, uint32_t param_size,
bool lock_needed) bool lock_needed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (lock_needed) if (lock_needed)
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2465,11 +2433,10 @@ int smu_set_power_profile_mode(struct smu_context *smu, ...@@ -2465,11 +2433,10 @@ int smu_set_power_profile_mode(struct smu_context *smu,
int smu_get_fan_control_mode(struct smu_context *smu) int smu_get_fan_control_mode(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2483,11 +2450,10 @@ int smu_get_fan_control_mode(struct smu_context *smu) ...@@ -2483,11 +2450,10 @@ int smu_get_fan_control_mode(struct smu_context *smu)
int smu_set_fan_control_mode(struct smu_context *smu, int value) int smu_set_fan_control_mode(struct smu_context *smu, int value)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2501,11 +2467,10 @@ int smu_set_fan_control_mode(struct smu_context *smu, int value) ...@@ -2501,11 +2467,10 @@ int smu_set_fan_control_mode(struct smu_context *smu, int value)
int smu_get_fan_speed_percent(struct smu_context *smu, uint32_t *speed) int smu_get_fan_speed_percent(struct smu_context *smu, uint32_t *speed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2519,11 +2484,10 @@ int smu_get_fan_speed_percent(struct smu_context *smu, uint32_t *speed) ...@@ -2519,11 +2484,10 @@ int smu_get_fan_speed_percent(struct smu_context *smu, uint32_t *speed)
int smu_set_fan_speed_percent(struct smu_context *smu, uint32_t speed) int smu_set_fan_speed_percent(struct smu_context *smu, uint32_t speed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2537,11 +2501,10 @@ int smu_set_fan_speed_percent(struct smu_context *smu, uint32_t speed) ...@@ -2537,11 +2501,10 @@ int smu_set_fan_speed_percent(struct smu_context *smu, uint32_t speed)
int smu_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) int smu_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2555,11 +2518,10 @@ int smu_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) ...@@ -2555,11 +2518,10 @@ int smu_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed)
int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk) int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2573,11 +2535,10 @@ int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk) ...@@ -2573,11 +2535,10 @@ int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk)
int smu_set_active_display_count(struct smu_context *smu, uint32_t count) int smu_set_active_display_count(struct smu_context *smu, uint32_t count)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
if (smu->ppt_funcs->set_active_display_count) if (smu->ppt_funcs->set_active_display_count)
ret = smu->ppt_funcs->set_active_display_count(smu, count); ret = smu->ppt_funcs->set_active_display_count(smu, count);
...@@ -2589,11 +2550,10 @@ int smu_get_clock_by_type(struct smu_context *smu, ...@@ -2589,11 +2550,10 @@ int smu_get_clock_by_type(struct smu_context *smu,
enum amd_pp_clock_type type, enum amd_pp_clock_type type,
struct amd_pp_clocks *clocks) struct amd_pp_clocks *clocks)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2608,11 +2568,10 @@ int smu_get_clock_by_type(struct smu_context *smu, ...@@ -2608,11 +2568,10 @@ int smu_get_clock_by_type(struct smu_context *smu,
int smu_get_max_high_clocks(struct smu_context *smu, int smu_get_max_high_clocks(struct smu_context *smu,
struct amd_pp_simple_clock_info *clocks) struct amd_pp_simple_clock_info *clocks)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2628,11 +2587,10 @@ int smu_get_clock_by_type_with_latency(struct smu_context *smu, ...@@ -2628,11 +2587,10 @@ int smu_get_clock_by_type_with_latency(struct smu_context *smu,
enum smu_clk_type clk_type, enum smu_clk_type clk_type,
struct pp_clock_levels_with_latency *clocks) struct pp_clock_levels_with_latency *clocks)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2648,11 +2606,10 @@ int smu_get_clock_by_type_with_voltage(struct smu_context *smu, ...@@ -2648,11 +2606,10 @@ int smu_get_clock_by_type_with_voltage(struct smu_context *smu,
enum amd_pp_clock_type type, enum amd_pp_clock_type type,
struct pp_clock_levels_with_voltage *clocks) struct pp_clock_levels_with_voltage *clocks)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2668,11 +2625,10 @@ int smu_get_clock_by_type_with_voltage(struct smu_context *smu, ...@@ -2668,11 +2625,10 @@ int smu_get_clock_by_type_with_voltage(struct smu_context *smu,
int smu_display_clock_voltage_request(struct smu_context *smu, int smu_display_clock_voltage_request(struct smu_context *smu,
struct pp_display_clock_request *clock_req) struct pp_display_clock_request *clock_req)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2687,11 +2643,10 @@ int smu_display_clock_voltage_request(struct smu_context *smu, ...@@ -2687,11 +2643,10 @@ int smu_display_clock_voltage_request(struct smu_context *smu,
int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disable_memory_clock_switch) int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disable_memory_clock_switch)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = -EINVAL; int ret = -EINVAL;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2705,11 +2660,10 @@ int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disabl ...@@ -2705,11 +2660,10 @@ int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disabl
int smu_notify_smu_enable_pwe(struct smu_context *smu) int smu_notify_smu_enable_pwe(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2724,11 +2678,10 @@ int smu_notify_smu_enable_pwe(struct smu_context *smu) ...@@ -2724,11 +2678,10 @@ int smu_notify_smu_enable_pwe(struct smu_context *smu)
int smu_set_xgmi_pstate(struct smu_context *smu, int smu_set_xgmi_pstate(struct smu_context *smu,
uint32_t pstate) uint32_t pstate)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2742,11 +2695,10 @@ int smu_set_xgmi_pstate(struct smu_context *smu, ...@@ -2742,11 +2695,10 @@ int smu_set_xgmi_pstate(struct smu_context *smu,
int smu_set_azalia_d3_pme(struct smu_context *smu) int smu_set_azalia_d3_pme(struct smu_context *smu)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2770,6 +2722,9 @@ bool smu_baco_is_support(struct smu_context *smu) ...@@ -2770,6 +2722,9 @@ bool smu_baco_is_support(struct smu_context *smu)
{ {
bool ret = false; bool ret = false;
if (!smu->pm_enabled)
return false;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
if (smu->ppt_funcs && smu->ppt_funcs->baco_is_support) if (smu->ppt_funcs && smu->ppt_funcs->baco_is_support)
...@@ -2796,6 +2751,9 @@ int smu_baco_enter(struct smu_context *smu) ...@@ -2796,6 +2751,9 @@ int smu_baco_enter(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
if (!smu->pm_enabled)
return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
if (smu->ppt_funcs->baco_enter) if (smu->ppt_funcs->baco_enter)
...@@ -2810,6 +2768,9 @@ int smu_baco_exit(struct smu_context *smu) ...@@ -2810,6 +2768,9 @@ int smu_baco_exit(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
if (!smu->pm_enabled)
return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
if (smu->ppt_funcs->baco_exit) if (smu->ppt_funcs->baco_exit)
...@@ -2824,6 +2785,9 @@ int smu_mode2_reset(struct smu_context *smu) ...@@ -2824,6 +2785,9 @@ int smu_mode2_reset(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
if (!smu->pm_enabled)
return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
if (smu->ppt_funcs->mode2_reset) if (smu->ppt_funcs->mode2_reset)
...@@ -2837,11 +2801,10 @@ int smu_mode2_reset(struct smu_context *smu) ...@@ -2837,11 +2801,10 @@ int smu_mode2_reset(struct smu_context *smu)
int smu_get_max_sustainable_clocks_by_dc(struct smu_context *smu, int smu_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
struct pp_smu_nv_clock_table *max_clocks) struct pp_smu_nv_clock_table *max_clocks)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2857,11 +2820,10 @@ int smu_get_uclk_dpm_states(struct smu_context *smu, ...@@ -2857,11 +2820,10 @@ int smu_get_uclk_dpm_states(struct smu_context *smu,
unsigned int *clock_values_in_khz, unsigned int *clock_values_in_khz,
unsigned int *num_states) unsigned int *num_states)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2876,10 +2838,9 @@ int smu_get_uclk_dpm_states(struct smu_context *smu, ...@@ -2876,10 +2838,9 @@ int smu_get_uclk_dpm_states(struct smu_context *smu,
enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu) enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu)
{ {
enum amd_pm_state_type pm_state = POWER_STATE_TYPE_DEFAULT; enum amd_pm_state_type pm_state = POWER_STATE_TYPE_DEFAULT;
struct amdgpu_device *adev = smu->adev;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
...@@ -2894,11 +2855,10 @@ enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu) ...@@ -2894,11 +2855,10 @@ enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu)
int smu_get_dpm_clock_table(struct smu_context *smu, int smu_get_dpm_clock_table(struct smu_context *smu,
struct dpm_clocks *clock_table) struct dpm_clocks *clock_table)
{ {
struct amdgpu_device *adev = smu->adev;
int ret = 0; int ret = 0;
if (!adev->pm.dpm_enabled) if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EINVAL; return -EOPNOTSUPP;
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7